[rpms/ceph] rawhide: fix FTBFS on riscv64 regression for rhbz#2515956

[rpms/ceph] rawhide: fix FTBFS on riscv64 regression for rhbz#2515956

[Jason Montleon]

A new commit has been pushed.

Repo   : rpms/ceph
Branch : rawhide
Commit : 0243943e7f1f24050615e90e33f3e20db4c4ff8b
Author : Jason Montleon <jason@montleon.com>
Date   : 2026-08-14T00:00:10-04:00
Stats  : +73/-1 in 2 file(s)
URL    : https://src.fedoraproject.org/rpms/ceph/c/0243943e7f1f24050615e90e33f3e20db4c4ff8b?branch=rawhide

Log:
fix FTBFS on riscv64 regression for rhbz#2515956

---
diff --git a/0068-add-riscv-support.patch b/0068-add-riscv-support.patch
new file mode 100644
index 0000000..4190b19
--- /dev/null
+++ b/0068-add-riscv-support.patch
@@ -0,0 +1,68 @@
+diff -uNr a/src/seastar/include/seastar/core/cacheline.hh b/src/seastar/include/seastar/core/cacheline.hh
+--- a/src/seastar/include/seastar/core/cacheline.hh	2026-03-02 05:59:04.000000000 -0500
++++ b/src/seastar/include/seastar/core/cacheline.hh	2026-08-13 15:55:18.480648218 -0400
+@@ -36,6 +36,8 @@
+     128;
+ #elif defined(__aarch64__)
+     128; // from Linux, may vary among different microarchitetures?
++#elif defined(__riscv)
++    64;
+ #else
+ #error "cache_line_size not defined for this architecture"
+ #endif
+diff -uNr a/src/seastar/include/seastar/core/memory.hh b/src/seastar/include/seastar/core/memory.hh
+--- a/src/seastar/include/seastar/core/memory.hh	2026-03-02 05:59:04.000000000 -0500
++++ b/src/seastar/include/seastar/core/memory.hh	2026-08-13 15:55:18.480759427 -0400
+@@ -137,6 +137,8 @@
+     1 << 21; // 2M
+ #elif defined(__PPC__)
+     1 << 24; // 16M
++#elif defined(__riscv)
++    1 << 21; // 2M
+ #else
+ #error "Huge page size is not defined for this architecture"
+ #endif
+diff -uNr a/src/seastar/include/seastar/util/spinlock.hh b/src/seastar/include/seastar/util/spinlock.hh
+--- a/src/seastar/include/seastar/util/spinlock.hh	2026-03-02 05:59:04.000000000 -0500
++++ b/src/seastar/include/seastar/util/spinlock.hh	2026-08-13 15:55:18.480825251 -0400
+@@ -64,6 +64,16 @@
+     __asm__ volatile("yield");
+ }
+ 
++#elif defined(__riscv)
++
++[[gnu::always_inline]]
++inline void cpu_relax() {
++    // Zihintpause `pause` hint, encoded directly so old assemblers without
++    // Zihintpause support still build. On cores that don't implement the hint
++    // it decodes as a NOP.
++    __asm__ volatile(".int 0x0100000F" : : : "memory");
++}
++
+ #else
+ 
+ [[gnu::always_inline]]
+diff -uNr a/src/seastar/src/core/reactor.cc b/src/seastar/src/core/reactor.cc
+--- a/src/seastar/src/core/reactor.cc	2026-03-02 05:59:04.000000000 -0500
++++ b/src/seastar/src/core/reactor.cc	2026-08-13 15:55:18.481060273 -0400
+@@ -4145,6 +4145,8 @@
+         ip = uc->uc_mcontext.gregs[REG_RIP];
+ #elif defined(__aarch64__)
+         ip = uc->uc_mcontext.pc;
++#elif defined(__riscv)
++        ip = uc->uc_mcontext.__gregs[REG_PC];
+ #else
+         ip = 0xBAD;
+ #endif
+diff -uNr a/src/seastar/src/core/thread.cc b/src/seastar/src/core/thread.cc
+--- a/src/seastar/src/core/thread.cc	2026-03-02 05:59:04.000000000 -0500
++++ b/src/seastar/src/core/thread.cc	2026-08-13 15:55:18.481286589 -0400
+@@ -300,6 +300,8 @@
+     asm(".cfi_undefined x30");
+ #elif defined(__s390x__)
+     asm(".cfi_undefined %r14");
++#elif defined(__riscv)
++    asm(".cfi_undefined ra");
+ #else
+     #warning "Backtracing from seastar threads may be broken"
+ #endif

diff --git a/ceph.spec b/ceph.spec
index 0971239..9f8474a 100644
--- a/ceph.spec
+++ b/ceph.spec
@@ -197,7 +197,7 @@ fi
 #################################################################################
 Name:		ceph
 Version:	21.1.0
-Release:	5%{?dist}
+Release:	6%{?dist}
 %if 0%{?fedora} || 0%{?rhel}
 Epoch:		2
 %endif
@@ -239,6 +239,7 @@ Patch:		0063-src-jaegertracing-opentelemetry-cpp-CMakeLists.txt.patch
 Patch:		0065-src-os-memstore-CMakelists.txt.patch
 Patch:		0066-src-lss-linux_syscall_support.h.patch
 Patch:		0067-src-os-CMakeLists.txt.patch
+Patch:		0068-add-riscv-support.patch
 
 # ceph 14.0.1 does not support 32-bit architectures, bugs #1727788, #1727787
 ExcludeArch:	i686 armv7hl
@@ -3202,6 +3203,9 @@ exit 0
 %endif
 
 %changelog
+* Thu Aug 13 2026 Jason Montleon <jason@montleon.com> - 2:21.1.0-6
+- rhbz#2515956, fix FTBFS on riscv64 regression
+
 * Mon Aug 10 2026 Kaleb S. KEITHLEY <kkeithle[at]redhat.com> - 2:21.1.0-5
 - rebuild for thrift 0.24.0