[rpms/uboot-tools] rawhide: Update to 2026.07 GA

[rpms/uboot-tools] rawhide: Update to 2026.07 GA

[Peter Robinson]

A new commit has been pushed.

Repo   : rpms/uboot-tools
Branch : rawhide
Commit : 9b96c029d85a3327582b27f18959ed8ccb638973
Author : Peter Robinson <pbrobinson@gmail.com>
Date   : 2026-07-07T07:33:54+01:00
Stats  : +611/-112 in 3 file(s)
URL    : https://src.fedoraproject.org/rpms/uboot-tools/c/9b96c029d85a3327582b27f18959ed8ccb638973?branch=rawhide

Log:
Update to 2026.07 GA

---
diff --git a/Fix-NVMe-not-only-on-Raspberry-Pi-5.patch b/Fix-NVMe-not-only-on-Raspberry-Pi-5.patch
index 67f0d6b..62f87ed 100644
--- a/Fix-NVMe-not-only-on-Raspberry-Pi-5.patch
+++ b/Fix-NVMe-not-only-on-Raspberry-Pi-5.patch
@@ -1,8 +1,84 @@
-From 9f926e07a9fc34d9c95fcc331867ee17d6a12105 Mon Sep 17 00:00:00 2001
-From: Torsten Duwe <duwe@suse.de>
-Date: Fri, 8 May 2026 17:42:39 +0200
-Subject: [PATCH 1/3] core: Skip parent device nodes without a DT reference
+From patchwork Mon Jul  6 17:21:47 2026
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+References: <20260706172028.C148E68BEB@verein.lst.de>
+Subject: [PATCH v2 1/4] core: Skip parent device nodes without a DT reference
  when looking for dma-ranges
+To: Neil Armstrong <neil.armstrong@linaro.org>,
+ Andrew Goodbody <andrew.goodbody@linaro.org>, Bin Meng <bmeng.cn@gmail.com>,
+ Simon Glass <sjg@chromium.org>
+Cc: Tom Rini <trini@konsulko.com>, Matthias Brugger <mbrugger@suse.com>,
+ Peter Robinson <pbrobinson@gmail.com>,
+ Mattijs Korpershoek <mkorpershoek@kernel.org>,
+ Marek Vasut <marek.vasut+renesas@mailbox.org>,
+ Heiko Schocher <hs@nabladev.com>, Svyatoslav Ryhel <clamor95@gmail.com>,
+ "Lucien.Jheng" <lucienzx159@gmail.com>, Rasmus Villemoes <ravi@prevas.dk>,
+ Martin Schwan <m.schwan@phytec.de>,
+ "Markus Schneider-Pargmann (TI.com)" <msp@baylibre.com>,
+ Prashant Kamble <prashant.kamble223@gmail.com>,
+ Denis Mukhin <dmukhin@ford.com>, Sughosh Ganu <sughosh.ganu@arm.com>,
+ u-boot@lists.denx.de
+Message-Id: <20260706172147.C934268B05@verein.lst.de>
+Date: Mon,  6 Jul 2026 19:21:47 +0200 (CEST)
+From: duwe@lst.de (Torsten Duwe)
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+From: Torsten Duwe <duwe@suse.de>
 
 If a device node got created dynamically, there is no guarantee that the
 parent node has an associated device tree node which could specify dma
@@ -45,35 +121,292 @@ index d365204ba11..b6d00cf4714 100644
  		return 0;
  
  	/*
--- 
-2.54.0
 
-From 960be63c0519239a2278cb5a6569398d0013f422 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 23 Jun 2026 10:55:17 +0100
-Subject: [PATCH 2/3] nvme: Fix missing address translation for PCIe inbound
+From patchwork Mon Jul  6 17:21:50 2026
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+References: <20260706172028.C148E68BEB@verein.lst.de>
+Subject: [PATCH v2 2/4] test: Add a unit test in phys_to_bus for dynamically
+ created device nodes
+To: Neil Armstrong <neil.armstrong@linaro.org>,
+ Andrew Goodbody <andrew.goodbody@linaro.org>, Bin Meng <bmeng.cn@gmail.com>,
+ Simon Glass <sjg@chromium.org>
+Cc: Tom Rini <trini@konsulko.com>, Matthias Brugger <mbrugger@suse.com>,
+ Peter Robinson <pbrobinson@gmail.com>,
+ Mattijs Korpershoek <mkorpershoek@kernel.org>,
+ Marek Vasut <marek.vasut+renesas@mailbox.org>,
+ Heiko Schocher <hs@nabladev.com>, Svyatoslav Ryhel <clamor95@gmail.com>,
+ "Lucien.Jheng" <lucienzx159@gmail.com>, Rasmus Villemoes <ravi@prevas.dk>,
+ Martin Schwan <m.schwan@phytec.de>,
+ "Markus Schneider-Pargmann (TI.com)" <msp@baylibre.com>,
+ Prashant Kamble <prashant.kamble223@gmail.com>,
+ Denis Mukhin <dmukhin@ford.com>, Sughosh Ganu <sughosh.ganu@arm.com>,
+ u-boot@lists.denx.de
+Message-Id: <20260706172150.464E868BEB@verein.lst.de>
+Date: Mon,  6 Jul 2026 19:21:50 +0200 (CEST)
+From: duwe@lst.de (Torsten Duwe)
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+
+From: Torsten Duwe <duwe@suse.de>
+
+In order to test whether device_get_dma_constraints() is now able to skip
+device nodes without a DT association, temporarily remove those on 2 newly-
+created nodes.
+
+Signed-off-by: Torsten Duwe <duwe@suse.de>
+---
+
+This test indeed makes a different whether the previous change is
+applied or not, but *only* reliably for the non-flat-tree case (!?).
+On the flat tree, it always fails after (reverse) applying it.
+
+Either the previous patch is incomplete, or, more likely, the test
+assumptions here are not all valid. Suggestions welcome (especially
+how to create device nodes from a device tree without a reference to
+their origin ;-)
+
+---
+ arch/sandbox/dts/test.dts |  9 +++++++++
+ test/dm/phys2bus.c        | 25 ++++++++++++++++++++++++-
+ 2 files changed, 33 insertions(+), 1 deletion(-)
+
+diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
+index 0887de4333b..1d92e85c739 100644
+--- a/arch/sandbox/dts/test.dts
++++ b/arch/sandbox/dts/test.dts
+@@ -656,6 +656,15 @@
+ 		subnode@0 {
+ 			compatible = "denx,u-boot-fdt-test";
+ 		};
++		bus@7 {
++			#address-cells = <1>;
++			#size-cells = <1>;
++			compatible = "denx,u-boot-test-bus";
++
++			subnode@8 {
++				  compatible = "denx,u-boot-fdt-test";
++			};
++		};
+ 	};
+ 
+ 	mmio-bus@1 {
+diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c
+index 67f33904943..858ed5410e2 100644
+--- a/test/dm/phys2bus.c
++++ b/test/dm/phys2bus.c
+@@ -15,7 +15,8 @@
+ 
+ static int dm_test_phys_to_bus(struct unit_test_state *uts)
+ {
+-	struct udevice *dev;
++	struct udevice *dev, *pdev;
++	ofnode psave, nsave;
+ 	ofnode node;
+ 
+ 	node = ofnode_path("/mmio-bus@0");
+@@ -31,6 +32,29 @@ static int dm_test_phys_to_bus(struct unit_test_state *uts)
+ 	ut_asserteq_addr((void*)0x1003ffffULL, (void*)dev_phys_to_bus(dev, 0x3ffff));
+ 	ut_asserteq_addr((void*)0x3ffffULL, (void*)(ulong)dev_bus_to_phys(dev, 0x1003ffff));
+ 
++#if CONFIG_IS_ENABLED(OF_REAL)
++	/* dma-ranges are on the grandparent bus node,
++	 *  OF nodes neither here nor at parent
++	 */
++	node = ofnode_path("/mmio-bus@0/bus@7");
++	ut_assert(ofnode_valid(node));
++	ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_BUS, node, &pdev));
++
++	/* pretend the devices were discovered dynamically and have no OF node */
++	psave = pdev->node_;
++	pdev->node_.np = NULL;
++	node = ofnode_path("/mmio-bus@0/bus@7/subnode@8");
++	ut_assert(ofnode_valid(node));
++	nsave = dev->node_;
++	dev->node_.np = NULL;
++	ut_assertok(uclass_get_device_by_ofnode(UCLASS_TEST_FDT, node, &dev));
++
++	ut_asserteq_addr((void *)0x1003ffffULL, (void *)dev_phys_to_bus(dev, 0x3ffff));
++	ut_asserteq_addr((void *)0x3ffffULL, (void *)(ulong)dev_bus_to_phys(dev, 0x1003ffff));
++
++	pdev->node_ = psave;
++	dev->node_ = nsave;
++#endif
+ 	return 0;
+ }
+ DM_TEST(dm_test_phys_to_bus, UTF_SCAN_PDATA | UTF_SCAN_FDT);
+
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+References: <20260706172028.C148E68BEB@verein.lst.de>
+Subject: [PATCH v2 3/4] nvme: Fix missing address translation for PCIe inbound
  access
+To: Neil Armstrong <neil.armstrong@linaro.org>,
+ Andrew Goodbody <andrew.goodbody@linaro.org>, Bin Meng <bmeng.cn@gmail.com>,
+ Simon Glass <sjg@chromium.org>
+Cc: Tom Rini <trini@konsulko.com>, Matthias Brugger <mbrugger@suse.com>,
+ Peter Robinson <pbrobinson@gmail.com>,
+ Mattijs Korpershoek <mkorpershoek@kernel.org>,
+ Marek Vasut <marek.vasut+renesas@mailbox.org>,
+ Heiko Schocher <hs@nabladev.com>, Svyatoslav Ryhel <clamor95@gmail.com>,
+ "Lucien.Jheng" <lucienzx159@gmail.com>, Rasmus Villemoes <ravi@prevas.dk>,
+ Martin Schwan <m.schwan@phytec.de>,
+ "Markus Schneider-Pargmann (TI.com)" <msp@baylibre.com>,
+ Prashant Kamble <prashant.kamble223@gmail.com>,
+ Denis Mukhin <dmukhin@ford.com>, Sughosh Ganu <sughosh.ganu@arm.com>,
+ u-boot@lists.denx.de
+Message-Id: <20260706172152.5257168BFE@verein.lst.de>
+Date: Mon,  6 Jul 2026 19:21:52 +0200 (CEST)
+From: duwe@lst.de (Torsten Duwe)
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+
+From: Torsten Duwe <duwe@suse.de>
 
 U-Boot currently does not account for PCIe bridges with a non-zero
 inbound access offset when talking NVMe, it only works on platforms
 where this offset happens to be zero.
 
 This patch enhances the NVMe driver with the ability to also handle
-these cases.
+these cases. It also removes the unused function nvme_get_features().
 
 Signed-off-by: Torsten Duwe <duwe@suse.de>
 Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
 Tested-by: Peter Robinson <pbrobinson@gmail.com>
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
 ---
- drivers/nvme/nvme.c | 32 ++++++++++++++++++++------------
- 1 file changed, 20 insertions(+), 12 deletions(-)
+I tried to consistently use uintptr_t when doing arithmetic on pointers
+and dma_addr_t to hold, well, DMA addresses ;)
+
+nvme_get_features mentions it's unused; so far it causes fruitless
+maintenance work and causes dead extra bytes in das U-Boot binary.
+It hasn't been neccessary for 9 years; one can revive it from git
+once needed.
+
+---
+ drivers/nvme/nvme.c | 71 +++++++++++++++++----------------------------
+ drivers/nvme/nvme.h |  3 ++
+ 2 files changed, 29 insertions(+), 45 deletions(-)
 
 diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
-index 147a104149e..6f5f58e4088 100644
+index 147a104149e..54284c0242b 100644
 --- a/drivers/nvme/nvme.c
 +++ b/drivers/nvme/nvme.c
-@@ -12,6 +12,7 @@
+@@ -8,10 +8,10 @@
+ #include <bootdev.h>
+ #include <cpu_func.h>
+ #include <dm.h>
+-#include <errno.h>
  #include <log.h>
  #include <malloc.h>
  #include <memalign.h>
@@ -81,127 +414,320 @@ index 147a104149e..6f5f58e4088 100644
  #include <time.h>
  #include <dm/device-internal.h>
  #include <linux/compat.h>
-@@ -44,6 +45,13 @@ static inline void nvme_invalidate_cache_aligned(uintptr_t addr, int length)
- 	invalidate_dcache_range(start_addr, end_addr);
- }
+@@ -101,6 +101,8 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
+ 			printf("Error: malloc prp_pool fail\n");
+ 			return -ENOMEM;
+ 		}
++		dev->prp_pool_dma = dev_phys_to_bus(dev->udev,
++						    (uintptr_t)dev->prp_pool);
+ 		dev->prp_entry_num = num_pages * (prps_per_page - 1) + 1;
+ 	}
  
-+/*
-+ * Convert a memory address to the value needed by the PCI device to
-+ * access the given location, taking into account inbound window
-+ * translations of PCI bridges:
-+ */
-+#define DEV_ADDR(a)		dev_phys_to_bus(dev->udev, (a))
-+
- static int nvme_wait_csts(struct nvme_dev *dev, u32 mask, u32 val)
- {
- 	int timeout;
-@@ -108,8 +116,8 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
+@@ -108,8 +110,10 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
  	i = 0;
  	while (nprps) {
  		if ((i == (prps_per_page - 1)) && nprps > 1) {
 -			*(prp_pool + i) = cpu_to_le64((ulong)prp_pool +
 -					page_size);
-+			*(prp_pool + i) = cpu_to_le64(DEV_ADDR((ulong)prp_pool +
-+								page_size));
++			dma_addr_t prp_pool_dma =
++			    dev_phys_to_bus(dev->udev, (uintptr_t)prp_pool);
++			*(prp_pool + i) = cpu_to_le64(prp_pool_dma +
++								page_size);
  			i = 0;
  			prp_pool = (u64 *)((uintptr_t)prp_pool + page_size);
  		}
-@@ -410,8 +418,8 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
+@@ -117,7 +121,7 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
+ 		dma_addr += page_size;
+ 		nprps--;
+ 	}
+-	*prp2 = (ulong)dev->prp_pool;
++	*prp2 = dev->prp_pool_dma;
+ 
+ 	flush_dcache_range((ulong)dev->prp_pool, (ulong)dev->prp_pool +
+ 			   num_pages * page_size);
+@@ -258,11 +262,15 @@ static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev,
+ 	nvmeq->cqes = (void *)memalign(4096, NVME_CQ_ALLOCATION);
+ 	if (!nvmeq->cqes)
+ 		goto free_nvmeq;
++	nvmeq->cq_dma_addr = dev_phys_to_bus(dev->udev,
++					     (uintptr_t)nvmeq->cqes);
+ 	memset((void *)nvmeq->cqes, 0, NVME_CQ_SIZE(depth));
+ 
+ 	nvmeq->sq_cmds = (void *)memalign(4096, NVME_SQ_SIZE(depth));
+ 	if (!nvmeq->sq_cmds)
+ 		goto free_queue;
++	nvmeq->sq_dma_addr = dev_phys_to_bus(dev->udev,
++					     (uintptr_t)nvmeq->sq_cmds);
+ 	memset((void *)nvmeq->sq_cmds, 0, NVME_SQ_SIZE(depth));
+ 
+ 	nvmeq->dev = dev;
+@@ -410,8 +416,8 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
  	dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
  
  	writel(aqa, &dev->bar->aqa);
 -	nvme_writeq((ulong)nvmeq->sq_cmds, &dev->bar->asq);
 -	nvme_writeq((ulong)nvmeq->cqes, &dev->bar->acq);
-+	nvme_writeq(DEV_ADDR((ulong)nvmeq->sq_cmds), &dev->bar->asq);
-+	nvme_writeq(DEV_ADDR((ulong)nvmeq->cqes), &dev->bar->acq);
++	nvme_writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
++	nvme_writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
  
  	result = nvme_enable_ctrl(dev);
  	if (result)
-@@ -437,7 +445,7 @@ static int nvme_alloc_cq(struct nvme_dev *dev, u16 qid,
+@@ -437,7 +443,7 @@ static int nvme_alloc_cq(struct nvme_dev *dev, u16 qid,
  
  	memset(&c, 0, sizeof(c));
  	c.create_cq.opcode = nvme_admin_create_cq;
 -	c.create_cq.prp1 = cpu_to_le64((ulong)nvmeq->cqes);
-+	c.create_cq.prp1 = cpu_to_le64(DEV_ADDR((ulong)nvmeq->cqes));
++	c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
  	c.create_cq.cqid = cpu_to_le16(qid);
  	c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
  	c.create_cq.cq_flags = cpu_to_le16(flags);
-@@ -454,7 +462,7 @@ static int nvme_alloc_sq(struct nvme_dev *dev, u16 qid,
+@@ -454,7 +460,7 @@ static int nvme_alloc_sq(struct nvme_dev *dev, u16 qid,
  
  	memset(&c, 0, sizeof(c));
  	c.create_sq.opcode = nvme_admin_create_sq;
 -	c.create_sq.prp1 = cpu_to_le64((ulong)nvmeq->sq_cmds);
-+	c.create_sq.prp1 = cpu_to_le64(DEV_ADDR((ulong)nvmeq->sq_cmds));
++	c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
  	c.create_sq.sqid = cpu_to_le16(qid);
  	c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
  	c.create_sq.sq_flags = cpu_to_le16(flags);
-@@ -476,14 +484,14 @@ int nvme_identify(struct nvme_dev *dev, unsigned nsid,
+@@ -464,13 +470,13 @@ static int nvme_alloc_sq(struct nvme_dev *dev, u16 qid,
+ }
+ 
+ int nvme_identify(struct nvme_dev *dev, unsigned nsid,
+-		  unsigned cns, dma_addr_t dma_addr)
++		  unsigned cns, dma_addr_t cpu_addr)
+ {
+ 	struct nvme_command c;
+ 	u32 page_size = dev->page_size;
++	dma_addr_t dma_addr = dev_phys_to_bus(dev->udev, cpu_addr);
+ 	int offset = dma_addr & (page_size - 1);
+ 	int length = sizeof(struct nvme_id_ctrl);
+-	dma_addr_t orig_dma_addr = dma_addr;
+ 	int ret;
+ 
  	memset(&c, 0, sizeof(c));
- 	c.identify.opcode = nvme_admin_identify;
- 	c.identify.nsid = cpu_to_le32(nsid);
--	c.identify.prp1 = cpu_to_le64(dma_addr);
-+	c.identify.prp1 = cpu_to_le64(DEV_ADDR(dma_addr));
- 
- 	length -= (page_size - offset);
- 	if (length <= 0) {
- 		c.identify.prp2 = 0;
- 	} else {
- 		dma_addr += (page_size - offset);
--		c.identify.prp2 = cpu_to_le64(dma_addr);
-+		c.identify.prp2 = cpu_to_le64(DEV_ADDR(dma_addr));
- 	}
+@@ -488,49 +494,22 @@ int nvme_identify(struct nvme_dev *dev, unsigned nsid,
  
  	c.identify.cns = cpu_to_le32(cns);
-@@ -508,7 +516,7 @@ int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
- 	memset(&c, 0, sizeof(c));
- 	c.features.opcode = nvme_admin_get_features;
- 	c.features.nsid = cpu_to_le32(nsid);
--	c.features.prp1 = cpu_to_le64(dma_addr);
-+	c.features.prp1 = cpu_to_le64(DEV_ADDR(dma_addr));
- 	c.features.fid = cpu_to_le32(fid);
  
- 	ret = nvme_submit_admin_cmd(dev, &c, result);
-@@ -534,7 +542,7 @@ int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
+-	nvme_invalidate_cache_aligned((uintptr_t)orig_dma_addr,
++	nvme_invalidate_cache_aligned((uintptr_t)cpu_addr,
+ 				      sizeof(struct nvme_id_ctrl));
+ 
+ 	ret = nvme_submit_admin_cmd(dev, &c, NULL);
+ 	if (!ret)
+-		nvme_invalidate_cache_aligned((uintptr_t)orig_dma_addr,
++		nvme_invalidate_cache_aligned((uintptr_t)cpu_addr,
+ 					      sizeof(struct nvme_id_ctrl));
+ 
+ 	return ret;
+ }
+ 
+-int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
+-		      dma_addr_t dma_addr, u32 *result)
+-{
+-	struct nvme_command c;
+-	int ret;
+-
+-	memset(&c, 0, sizeof(c));
+-	c.features.opcode = nvme_admin_get_features;
+-	c.features.nsid = cpu_to_le32(nsid);
+-	c.features.prp1 = cpu_to_le64(dma_addr);
+-	c.features.fid = cpu_to_le32(fid);
+-
+-	ret = nvme_submit_admin_cmd(dev, &c, result);
+-
+-	/*
+-	 * TODO: Add some cache invalidation when a DMA buffer is involved
+-	 * in the request, here and before the command gets submitted. The
+-	 * buffer size varies by feature, also some features use a different
+-	 * field in the command packet to hold the buffer address.
+-	 * Section 5.21.1 (Set Features command) in the NVMe specification
+-	 * details the buffer requirements for each feature.
+-	 *
+-	 * At the moment there is no user of this function.
+-	 */
+-
+-	return ret;
+-}
+-
+ int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
+-		      dma_addr_t dma_addr, u32 *result)
++		      dma_addr_t cpu_addr, u32 *result)
+ {
+ 	struct nvme_command c;
++	dma_addr_t dma_addr = dev_phys_to_bus(dev->udev, cpu_addr);
  
  	memset(&c, 0, sizeof(c));
  	c.features.opcode = nvme_admin_set_features;
--	c.features.prp1 = cpu_to_le64(dma_addr);
-+	c.features.prp1 = cpu_to_le64(DEV_ADDR(dma_addr));
- 	c.features.fid = cpu_to_le32(fid);
- 	c.features.dword11 = cpu_to_le32(dword11);
+@@ -769,7 +748,7 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr,
+ 	u64 prp2;
+ 	u64 total_len = blkcnt << desc->log2blksz;
+ 	u64 temp_len = total_len;
+-	uintptr_t temp_buffer = (uintptr_t)buffer;
++	uintptr_t dma_addr = dev_phys_to_bus(udev, (uintptr_t)buffer);
+ 
+ 	u64 slba = blknr;
+ 	u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
+@@ -797,19 +776,19 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr,
+ 		}
  
-@@ -802,8 +810,8 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr,
+ 		if (nvme_setup_prps(dev, &prp2,
+-				    lbas << ns->lba_shift, temp_buffer))
++				    lbas << ns->lba_shift, dma_addr))
+ 			return -EIO;
  		c.rw.slba = cpu_to_le64(slba);
  		slba += lbas;
  		c.rw.length = cpu_to_le16(lbas - 1);
 -		c.rw.prp1 = cpu_to_le64(temp_buffer);
--		c.rw.prp2 = cpu_to_le64(prp2);
-+		c.rw.prp1 = cpu_to_le64(DEV_ADDR(temp_buffer));
-+		c.rw.prp2 = cpu_to_le64(DEV_ADDR(prp2));
++		c.rw.prp1 = cpu_to_le64(dma_addr);
+ 		c.rw.prp2 = cpu_to_le64(prp2);
  		status = nvme_submit_sync_cmd(dev->queues[NVME_IO_Q],
  				&c, NULL, IO_TIMEOUT);
  		if (status)
--- 
-2.54.0
+ 			break;
+ 		temp_len -= (u32)lbas << ns->lba_shift;
+-		temp_buffer += lbas << ns->lba_shift;
++		dma_addr += lbas << ns->lba_shift;
+ 	}
+ 
+ 	if (read)
+@@ -884,6 +863,8 @@ int nvme_init(struct udevice *udev)
+ 		printf("Error: %s: Out of memory!\n", udev->name);
+ 		goto free_queue;
+ 	}
++
++	ndev->prp_pool_dma = dev_phys_to_bus(udev, (uintptr_t)ndev->prp_pool);
+ 	ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+ 
+ 	ret = nvme_setup_io_queues(ndev);
+diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
+index bc1d612dde4..7c6ed4d9b55 100644
+--- a/drivers/nvme/nvme.h
++++ b/drivers/nvme/nvme.h
+@@ -619,6 +619,7 @@ struct nvme_dev {
+ 	u32 page_size;
+ 	u8 vwc;
+ 	u64 *prp_pool;
++	uintptr_t prp_pool_dma;
+ 	u32 prp_entry_num;
+ 	u32 nn;
+ };
+@@ -637,7 +638,9 @@ enum nvme_queue_id {
+ struct nvme_queue {
+ 	struct nvme_dev *dev;
+ 	struct nvme_command *sq_cmds;
++	dma_addr_t sq_dma_addr;
+ 	struct nvme_completion *cqes;
++	dma_addr_t cq_dma_addr;
+ 	u32 __iomem *q_db;
+ 	u16 q_depth;
+ 	s16 cq_vector;
+
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+In-Reply-To: <20260706172028.C148E68BEB@verein.lst.de>
+References: <20260706172028.C148E68BEB@verein.lst.de>
+Subject: [PATCH v2 4/4] configs: enable NVMe
+To: Neil Armstrong <neil.armstrong@linaro.org>,
+ Andrew Goodbody <andrew.goodbody@linaro.org>, Bin Meng <bmeng.cn@gmail.com>,
+ Simon Glass <sjg@chromium.org>
+Cc: Tom Rini <trini@konsulko.com>, Matthias Brugger <mbrugger@suse.com>,
+ Peter Robinson <pbrobinson@gmail.com>,
+ Mattijs Korpershoek <mkorpershoek@kernel.org>,
+ Marek Vasut <marek.vasut+renesas@mailbox.org>,
+ Heiko Schocher <hs@nabladev.com>, Svyatoslav Ryhel <clamor95@gmail.com>,
+ "Lucien.Jheng" <lucienzx159@gmail.com>, Rasmus Villemoes <ravi@prevas.dk>,
+ Martin Schwan <m.schwan@phytec.de>,
+ "Markus Schneider-Pargmann (TI.com)" <msp@baylibre.com>,
+ Prashant Kamble <prashant.kamble223@gmail.com>,
+ Denis Mukhin <dmukhin@ford.com>, Sughosh Ganu <sughosh.ganu@arm.com>,
+ u-boot@lists.denx.de
+Message-Id: <20260706172154.B506B68CFE@verein.lst.de>
+Date: Mon,  6 Jul 2026 19:21:54 +0200 (CEST)
+From: duwe@lst.de (Torsten Duwe)
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-From e4c3037baba91cf4c9330154e91ab5b7257de09f Mon Sep 17 00:00:00 2001
 From: Torsten Duwe <duwe@suse.de>
-Date: Fri, 8 May 2026 17:42:48 +0200
-Subject: [PATCH 3/3] configs: enable NVMe
 
-Enable NVMe in the Raspberry Pi 64-Bit default config
+Enable NVMe in the Raspberry Pi 64-Bit default config and scan for devices.
 
 Signed-off-by: Torsten Duwe <duwe@suse.de>
 Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
 Tested-by: Peter Robinson <pbrobinson@gmail.com>
 ---
- configs/rpi_arm64_defconfig | 1 +
- 1 file changed, 1 insertion(+)
+ configs/rpi_arm64_defconfig | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
 
 diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
-index cdcf05ea6db..5376a5e25ac 100644
+index cdcf05ea6db..fb0fdce1d7f 100644
 --- a/configs/rpi_arm64_defconfig
 +++ b/configs/rpi_arm64_defconfig
+@@ -16,7 +16,7 @@ CONFIG_BOOTSTD_DEFAULTS=y
+ CONFIG_OF_BOARD_SETUP=y
+ CONFIG_FDT_SIMPLEFB=y
+ CONFIG_USE_PREBOOT=y
+-CONFIG_PREBOOT="pci enum; usb start;"
++CONFIG_PREBOOT="pci enum; usb start; nvme scan;"
+ CONFIG_SYS_PBSIZE=1049
+ # CONFIG_DISPLAY_CPUINFO is not set
+ # CONFIG_DISPLAY_BOARDINFO is not set
 @@ -44,6 +44,7 @@ CONFIG_MMC_SDHCI_SDMA=y
  CONFIG_MMC_SDHCI_BCM2835=y
  CONFIG_MMC_SDHCI_BCMSTB=y
@@ -210,6 +736,3 @@ index cdcf05ea6db..5376a5e25ac 100644
  CONFIG_PCI_BRCMSTB=y
  CONFIG_PINCTRL=y
  # CONFIG_PINCTRL_GENERIC is not set
--- 
-2.54.0
-

diff --git a/rpi-enable-nvme.patch b/rpi-enable-nvme.patch
deleted file mode 100644
index 52a1153..0000000
--- a/rpi-enable-nvme.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 94d8dfad9b381cd914fd11b2c6286084dd46b7a9 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Sun, 29 Mar 2026 20:28:41 +0100
-Subject: [PATCH] rpi: enable nvme
-
-Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
----
- configs/rpi_arm64_defconfig | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
-index 38af5029403..ed4ae6ff522 100644
---- a/configs/rpi_arm64_defconfig
-+++ b/configs/rpi_arm64_defconfig
-@@ -15,7 +15,7 @@ CONFIG_BOOTSTD_DEFAULTS=y
- CONFIG_OF_BOARD_SETUP=y
- CONFIG_FDT_SIMPLEFB=y
- CONFIG_USE_PREBOOT=y
--CONFIG_PREBOOT="pci enum; usb start;"
-+CONFIG_PREBOOT="pci enum; usb start; nvme scan;"
- CONFIG_SYS_PBSIZE=1049
- # CONFIG_DISPLAY_CPUINFO is not set
- # CONFIG_DISPLAY_BOARDINFO is not set
--- 
-2.54.0
-

diff --git a/uboot-tools.spec b/uboot-tools.spec
index 570e75c..704d499 100644
--- a/uboot-tools.spec
+++ b/uboot-tools.spec
@@ -1,4 +1,4 @@
-%global candidate rc5
+#global candidate rc0
 %if 0%{?rhel}
 %bcond_with toolsonly
 %else
@@ -10,7 +10,7 @@
 
 Name:     uboot-tools
 Version:  2026.07
-Release:  0.4%{?candidate:.%{candidate}}%{?dist}
+Release:  1%{?candidate:.%{candidate}}%{?dist}
 Epoch:    1
 Summary:  U-Boot utilities
 # Automatically converted from old format: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+ - review is highly recommended.
@@ -50,8 +50,7 @@ Patch15:  JetsonTX2-Fix-upstream-device-tree-naming.patch
 Patch16:  Allwinner-fix-booting-on-a-number-of-devices.patch
 # RPi
 Patch20:  Fix-NVMe-not-only-on-Raspberry-Pi-5.patch
-Patch21:  rpi-enable-nvme.patch
-Patch22:  raspberrypi-Add-quirk-for-RPi5-2Gb-rev-1.0.patch
+Patch21:  raspberrypi-Add-quirk-for-RPi5-2Gb-rev-1.0.patch
 
 BuildRequires:  bc
 BuildRequires:  bison
@@ -315,6 +314,9 @@ install -p -m 0755 builds/tools/env/fw_printenv %{buildroot}%{_bindir}
 %endif
 
 %changelog
+* Tue Jul 07 2026 Peter Robinson <pbrobinson@fedoraproject.org> - 1:2026.07-1
+- Update to 2026.07 GA
+
 * Tue Jun 23 2026 Peter Robinson <pbrobinson@fedoraproject.org> - 1:2026.07-0.4.rc5
 - Update to 2026.07 RC5