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* [rpms/gdb] gdb-17.2-rebase-f44: Rebase to FSF GDB 15.1.
@ 2026-06-28 0:01
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From: @ 2026-06-28 0:01 UTC (permalink / raw)
To: git-commits
A new commit has been pushed.
Repo : rpms/gdb
Branch : gdb-17.2-rebase-f44
Commit : a8e0b3d6289d708fc6b1077a25bd728fbe35ffde
Author : Alexandra Hájková <ahajkova@redhat.com>
Date : 2024-08-06T10:49:09+02:00
Stats : +207/-11899 in 32 file(s)
URL : https://src.fedoraproject.org/rpms/gdb/c/a8e0b3d6289d708fc6b1077a25bd728fbe35ffde?branch=gdb-17.2-rebase-f44
Log:
Rebase to FSF GDB 15.1.
Update local patches:
gdb-6.3-gstack-20050411.patch
gdb-6.6-buildid-locate-solib-missing-ids.patch
gdb-6.6-buildid-locate.patch
gdb-add-missing-debug-ext-lang-hook.patch
gdb-add-rpm-suggestion-script.patch
gdb-merge-debug-symbol-lookup.patch
Dropped:
gdb-add-missing-debug-ext-lang-hook.patch
gdb-add-missing-debug-info-python-hook.patch
gdb-do-not-import-py-curses-ascii-module.patch
gdb-ftbs-swapped-calloc-args.patch
gdb-handle-no-python-gdb-module.patch
gdb-refactor-find-and-add-separate-symbol-file.patch
gdb-merge-debug-symbol-lookup.patch
gdb-refactor-find-and-add-separate-symbol-file.patch
gdb-reformat-missing-debug-py-file.patch
gdb-remove-path-in-test-name.patch
gdb-remove-use-of-py-isascii
gdb-rhbz-2232086-cpp-ify-mapped-symtab.patch
gdb-rhbz-2232086-generate-dwarf-5-index-consistently.patch
gdb-rhbz-2232086-generate-gdb-index-consistently.patch
gdb-rhbz-2232086-reduce-size-of-gdb-index.patch
gdb-rhbz2232086-refactor-selftest-support.patch
gdb-rhbz2250652-avoid-PyOS_ReadlineTState.patch
gdb-rhbz2250652-gdbpy_gil.patch
gdb-rhbz2261580-intrusive_list-assertion-fix.patch
gdb-rhbz2277160-apx-disasm.patch
gdb-rhel2295897-pre-read-DWZ-file-in-DWARF-reader.patch
gdb-sync-coffread-with-elfread.patch
---
diff --git a/.gitignore b/.gitignore
index bc31c5c..74eed7a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,4 +1,4 @@
/new-fedora-release
/gdb-libstdc++-v3-python-8.1.1-20180626.tar.xz
/v2.0.5.tar.gz
-/gdb-14.2.tar.xz
+/gdb-15.1.tar.xz
diff --git a/_gdb.spec.Patch.include b/_gdb.spec.Patch.include
index 3f17fa0..10246f1 100644
--- a/_gdb.spec.Patch.include
+++ b/_gdb.spec.Patch.include
@@ -123,77 +123,10 @@ Patch026: gdb-rhbz1261564-aarch64-hw-watchpoint-test.patch
#=fedora
Patch027: gdb-add-index.patch
-# Back-port upstream commit 1f0fab7ff86 as part of a fix for
-# non-deterministic gdb-index generation (RH BZ 2232086).
-Patch028: gdb-rhbz2232086-refactor-selftest-support.patch
-
-# Back-port upstream commit aa19bc1d259 as part of a fix for
-# non-deterministic gdb-index generation (RH BZ 2232086).
-Patch029: gdb-rhbz-2232086-reduce-size-of-gdb-index.patch
-
-# Back-port upstream commit acc117b57f7 as part of a fix for
-# non-deterministic gdb-index generation (RH BZ 2232086).
-Patch030: gdb-rhbz-2232086-cpp-ify-mapped-symtab.patch
-
-# Back-port upstream commit aff250145af as part of a fix for
-# non-deterministic gdb-index generation (RH BZ 2232086).
-Patch031: gdb-rhbz-2232086-generate-gdb-index-consistently.patch
-
-# Back-port upstream commit 3644f41dc80 as part of a fix for
-# non-deterministic gdb-index generation (RH BZ 2232086).
-Patch032: gdb-rhbz-2232086-generate-dwarf-5-index-consistently.patch
-
-
-Patch033: gdb-rhbz2250652-gdbpy_gil.patch
-
-
-Patch034: gdb-rhbz2250652-avoid-PyOS_ReadlineTState.patch
-
-
-Patch035: gdb-ftbs-swapped-calloc-args.patch
-
-# Backport upstream workaround for GCC 14 problem which cause assertion
-# failures in GDB.
-Patch036: gdb-rhbz2261580-intrusive_list-assertion-fix.patch
-
-# Backport upstream commit 7628a997f27.
-Patch037: gdb-sync-coffread-with-elfread.patch
-
-# Backport upstream commit 27807da5849.
-Patch038: gdb-merge-debug-symbol-lookup.patch
-
-# Backport upstream commit 6234ba17598.
-Patch039: gdb-refactor-find-and-add-separate-symbol-file.patch
-
-# Backport upstream commit 661d98a3331.
-Patch040: gdb-add-missing-debug-ext-lang-hook.patch
-
-# Backport upstream commit 8f6c452b5a4.
-Patch041: gdb-add-missing-debug-info-python-hook.patch
-
# Backport upstream commit 7db795bc67a.
-Patch042: gdb-remove-use-of-py-isascii
-
-# Backport upstream commit 1146d27749f.
-Patch043: gdb-remove-path-in-test-name.patch
-
-# Backport upstream commit e8c3dafa5f5.
-Patch044: gdb-do-not-import-py-curses-ascii-module.patch
-
-# Backport upstream commit dd5516bf98f.
-Patch045: gdb-reformat-missing-debug-py-file.patch
-
-# Backport upstream commit 7d21600b31fe.
-Patch046: gdb-handle-no-python-gdb-module.patch
+Patch028: gdb-remove-use-of-py-isascii
# Not a backport. Add a new script which hooks into GDB and suggests
# RPMs to install when GDB finds an objfile with no debug info.
-Patch047: gdb-add-rpm-suggestion-script.patch
-
-# Update x86 disassembler
-Patch048: gdb-rhbz2277160-apx-disasm.patch
-
-# backport of upstream commit 91874afabcd
-# This (somehow) solves a double-free when reading minimal symbols
-Patch049: gdb-rhel2295897-pre-read-DWZ-file-in-DWARF-reader.patch
+Patch029: gdb-add-rpm-suggestion-script.patch
diff --git a/_gdb.spec.patch.include b/_gdb.spec.patch.include
index 2ca0c1f..f93264f 100644
--- a/_gdb.spec.patch.include
+++ b/_gdb.spec.patch.include
@@ -27,23 +27,3 @@
%patch -p1 -P027
%patch -p1 -P028
%patch -p1 -P029
-%patch -p1 -P030
-%patch -p1 -P031
-%patch -p1 -P032
-%patch -p1 -P033
-%patch -p1 -P034
-%patch -p1 -P035
-%patch -p1 -P036
-%patch -p1 -P037
-%patch -p1 -P038
-%patch -p1 -P039
-%patch -p1 -P040
-%patch -p1 -P041
-%patch -p1 -P042
-%patch -p1 -P043
-%patch -p1 -P044
-%patch -p1 -P045
-%patch -p1 -P046
-%patch -p1 -P047
-%patch -p1 -P048
-%patch -p1 -P049
diff --git a/_git_upstream_commit b/_git_upstream_commit
index b70cde9..a78a860 100644
--- a/_git_upstream_commit
+++ b/_git_upstream_commit
@@ -1 +1 @@
-02c10eaecb63e5dbb99cbfdd1c5385e53ed031ff
+7b20890ad616baf811c8fe0e5d2bbb54b7c8ac42
diff --git a/_patch_order b/_patch_order
index 387d80d..a62ae44 100644
--- a/_patch_order
+++ b/_patch_order
@@ -25,25 +25,5 @@ gdb-rhbz1149205-catch-syscall-after-fork-test.patch
gdb-rhbz1084404-ppc64-s390x-wrong-prologue-skip-O2-g-3of3.patch
gdb-rhbz1261564-aarch64-hw-watchpoint-test.patch
gdb-add-index.patch
-gdb-rhbz2232086-refactor-selftest-support.patch
-gdb-rhbz-2232086-reduce-size-of-gdb-index.patch
-gdb-rhbz-2232086-cpp-ify-mapped-symtab.patch
-gdb-rhbz-2232086-generate-gdb-index-consistently.patch
-gdb-rhbz-2232086-generate-dwarf-5-index-consistently.patch
-gdb-rhbz2250652-gdbpy_gil.patch
-gdb-rhbz2250652-avoid-PyOS_ReadlineTState.patch
-gdb-ftbs-swapped-calloc-args.patch
-gdb-rhbz2261580-intrusive_list-assertion-fix.patch
-gdb-sync-coffread-with-elfread.patch
-gdb-merge-debug-symbol-lookup.patch
-gdb-refactor-find-and-add-separate-symbol-file.patch
-gdb-add-missing-debug-ext-lang-hook.patch
-gdb-add-missing-debug-info-python-hook.patch
gdb-remove-use-of-py-isascii
-gdb-remove-path-in-test-name.patch
-gdb-do-not-import-py-curses-ascii-module.patch
-gdb-reformat-missing-debug-py-file.patch
-gdb-handle-no-python-gdb-module.patch
gdb-add-rpm-suggestion-script.patch
-gdb-rhbz2277160-apx-disasm.patch
-gdb-rhel2295897-pre-read-DWZ-file-in-DWARF-reader.patch
diff --git a/gdb-6.3-gstack-20050411.patch b/gdb-6.3-gstack-20050411.patch
index 3285686..90fbfa1 100644
--- a/gdb-6.3-gstack-20050411.patch
+++ b/gdb-6.3-gstack-20050411.patch
@@ -16,7 +16,7 @@ Subject: gdb-6.3-gstack-20050411.patch
diff --git a/gdb/Makefile.in b/gdb/Makefile.in
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
-@@ -2035,7 +2035,7 @@ info install-info clean-info dvi pdf install-pdf html install-html: force
+@@ -2071,7 +2071,7 @@ info install-info clean-info dvi install-dvi pdf install-pdf html install-html:
install: all
@$(MAKE) $(FLAGS_TO_PASS) install-only
@@ -25,7 +25,7 @@ diff --git a/gdb/Makefile.in b/gdb/Makefile.in
transformed_name=`t='$(program_transform_name)'; \
echo gdb | sed -e "$$t"` ; \
if test "x$$transformed_name" = x; then \
-@@ -2085,7 +2085,25 @@ install-guile:
+@@ -2121,7 +2121,25 @@ install-guile:
install-python:
$(SHELL) $(srcdir)/../mkinstalldirs $(DESTDIR)$(GDB_DATADIR)/python/gdb
@@ -52,7 +52,7 @@ diff --git a/gdb/Makefile.in b/gdb/Makefile.in
transformed_name=`t='$(program_transform_name)'; \
echo gdb | sed -e $$t` ; \
if test "x$$transformed_name" = x; then \
-@@ -2116,6 +2134,18 @@ uninstall: force $(CONFIG_UNINSTALL)
+@@ -2152,6 +2170,28 @@ uninstall: force $(CONFIG_UNINSTALL)
rm -f $(DESTDIR)$(bindir)/$$transformed_name
@$(MAKE) DO=uninstall "DODIRS=$(SUBDIRS)" $(FLAGS_TO_PASS) subdir_do
@@ -68,9 +68,19 @@ diff --git a/gdb/Makefile.in b/gdb/Makefile.in
+ rm -f $(DESTDIR)$(bindir)/$$transformed_name$(EXEEXT) \
+ $(DESTDIR)$(man1dir)/$$transformed_name.1
+
- # The C++ name parser can be built standalone for testing.
- test-cp-name-parser.o: cp-name-parser.c
- $(COMPILE) -DTEST_CPNAMES cp-name-parser.c
++# The C++ name parser can be built standalone for testing.
++test-cp-name-parser.o: cp-name-parser.c
++ $(COMPILE) -DTEST_CPNAMES cp-name-parser.c
++ $(POSTCOMPILE)
++
++test-cp-name-parser$(EXEEXT): test-cp-name-parser.o $(LIBIBERTY)
++ $(ECHO_CXXLD) $(CC_LD) $(INTERNAL_LDFLAGS) \
++ -o test-cp-name-parser$(EXEEXT) test-cp-name-parser.o \
++ $(LIBIBERTY)
++
+ # We do this by grepping through sources. If that turns out to be too slow,
+ # maybe we could just require every .o file to have an initialization routine
+ # of a given name (top.o -> _initialize_top, etc.).
diff --git a/gdb/gstack.sh b/gdb/gstack.sh
new file mode 100644
--- /dev/null
diff --git a/gdb-6.6-buildid-locate-solib-missing-ids.patch b/gdb-6.6-buildid-locate-solib-missing-ids.patch
index 5847c2e..897f691 100644
--- a/gdb-6.6-buildid-locate-solib-missing-ids.patch
+++ b/gdb-6.6-buildid-locate-solib-missing-ids.patch
@@ -14,62 +14,87 @@ https://bugzilla.redhat.com/show_bug.cgi?id=1339862
diff --git a/gdb/solib-svr4.c b/gdb/solib-svr4.c
--- a/gdb/solib-svr4.c
+++ b/gdb/solib-svr4.c
-@@ -1320,14 +1320,28 @@ svr4_read_so_list (svr4_info *info, CORE_ADDR lm, CORE_ADDR prev_lm,
+@@ -347,11 +347,13 @@ lm_addr_check (const solib &so, bfd *abfd)
+
+ struct svr4_so
+ {
+- svr4_so (const char *name, lm_info_svr4_up lm_info)
+- : name (name), lm_info (std::move (lm_info))
++ svr4_so (const char *name, lm_info_svr4_up lm_info, const char *orig_name = nullptr)
++ : name (name), original_name (orig_name == nullptr ? name : orig_name),
++ lm_info (std::move (lm_info))
+ {}
+
+ std::string name;
++ std::string original_name;
+ lm_info_svr4_up lm_info;
+ };
+
+@@ -1002,6 +1004,7 @@ so_list_from_svr4_sos (const std::vector<svr4_so> &sos)
+
+ newobj->so_name = so.name;
+ newobj->so_original_name = so.name;
++ newobj->so_original_name = so.original_name;
+ newobj->lm_info = std::make_unique<lm_info_svr4> (*so.lm_info);
+
+ dst.push_back (*newobj);
+@@ -1263,11 +1266,28 @@ svr4_read_so_list (svr4_info *info, CORE_ADDR lm, CORE_ADDR prev_lm,
+ continue;
}
- {
-- struct bfd_build_id *build_id;
-+ struct bfd_build_id *build_id = NULL;
++ /* Preserve original name since name may be changed below. */
++ gdb::unique_xmalloc_ptr<char> original_name = make_unique_xstrdup (name.get ());
+ {
+- struct bfd_build_id *build_id;
++ struct bfd_build_id *build_id = nullptr;
- strncpy (newobj->so_original_name, buffer.get (), SO_NAME_MAX_PATH_SIZE - 1);
- newobj->so_original_name[SO_NAME_MAX_PATH_SIZE - 1] = '\0';
- /* May get overwritten below. */
- strcpy (newobj->so_name, newobj->so_original_name);
+- build_id = build_id_addr_get (li->l_ld);
+- if (build_id != NULL)
++ /* In the case the main executable was found according to its build-id
++ (from a core file) prevent loading a different build of a library
++ with accidentally the same SO_NAME.
++
++ It suppresses bogus backtraces (and prints "??" there instead) if
++ the on-disk files no longer match the running program version.
++ If the main executable was not loaded according to its build-id do
++ not do any build-id checking of the libraries. There may be missing
++ build-ids dumped in the core file and we would map all the libraries
++ to the only existing file loaded that time - the executable. */
++ if (current_program_space->symfile_object_file != NULL
++ && (current_program_space->symfile_object_file->flags
++ & OBJF_BUILD_ID_CORE_LOADED) != 0)
++ build_id = build_id_addr_get (li->l_ld);
++
++
++ if (build_id != nullptr)
+ {
+ char *bid_name, *build_id_filename;
-- build_id = build_id_addr_get (((lm_info_svr4 *) newobj->lm_info)->l_ld);
-+ /* In the case the main executable was found according to its build-id
-+ (from a core file) prevent loading a different build of a library
-+ with accidentally the same SO_NAME.
-+
-+ It suppresses bogus backtraces (and prints "??" there instead) if
-+ the on-disk files no longer match the running program version.
-+
-+ If the main executable was not loaded according to its build-id do
-+ not do any build-id checking of the libraries. There may be missing
-+ build-ids dumped in the core file and we would map all the libraries
-+ to the only existing file loaded that time - the executable. */
-+ if (current_program_space->symfile_object_file != NULL
-+ && (current_program_space->symfile_object_file->flags
-+ & OBJF_BUILD_ID_CORE_LOADED) != 0)
-+ build_id = build_id_addr_get (li->l_ld);
- if (build_id != NULL)
- {
- char *name, *build_id_filename;
-@@ -1342,23 +1356,7 @@ svr4_read_so_list (svr4_info *info, CORE_ADDR lm, CORE_ADDR prev_lm,
- xfree (name);
- }
- else
-- {
-- debug_print_missing (newobj->so_name, build_id_filename);
+@@ -1280,23 +1300,7 @@ svr4_read_so_list (svr4_info *info, CORE_ADDR lm, CORE_ADDR prev_lm,
+ xfree (bid_name);
+ }
+ else
+- {
+- debug_print_missing (name.get (), build_id_filename);
-
-- /* In the case the main executable was found according to
-- its build-id (from a core file) prevent loading
-- a different build of a library with accidentally the
-- same SO_NAME.
+- /* In the case the main executable was found according to
+- its build-id (from a core file) prevent loading
+- a different build of a library with accidentally the
+- same SO_NAME.
-
-- It suppresses bogus backtraces (and prints "??" there
-- instead) if the on-disk files no longer match the
-- running program version. */
+- It suppresses bogus backtraces (and prints "??" there
+- instead) if the on-disk files no longer match the
+- running program version. */
-
-- if (current_program_space->symfile_object_file != NULL
-- && (current_program_space->symfile_object_file->flags
-- & OBJF_BUILD_ID_CORE_LOADED) != 0)
-- newobj->so_name[0] = 0;
-- }
-+ debug_print_missing (newobj->so_name, build_id_filename);
+- if (current_program_space->symfile_object_file != NULL
+- && (current_program_space->symfile_object_file->flags
+- & OBJF_BUILD_ID_CORE_LOADED) != 0)
+- name = make_unique_xstrdup ("");
+- }
++ debug_print_missing (name.get (), build_id_filename);
- xfree (build_id_filename);
- xfree (build_id);
+ xfree (build_id_filename);
+ xfree (build_id);
diff --git a/gdb/testsuite/gdb.base/gcore-buildid-exec-but-not-solib-lib.c b/gdb/testsuite/gdb.base/gcore-buildid-exec-but-not-solib-lib.c
new file mode 100644
--- /dev/null
diff --git a/gdb-6.6-buildid-locate.patch b/gdb-6.6-buildid-locate.patch
index 074c623..d407b43 100644
--- a/gdb-6.6-buildid-locate.patch
+++ b/gdb-6.6-buildid-locate.patch
@@ -9,7 +9,7 @@ Subject: gdb-6.6-buildid-locate.patch
diff --git a/gdb/build-id.c b/gdb/build-id.c
--- a/gdb/build-id.c
+++ b/gdb/build-id.c
-@@ -24,9 +24,67 @@
+@@ -23,9 +23,67 @@
#include "gdbsupport/gdb_vecs.h"
#include "symfile.h"
#include "objfiles.h"
@@ -20,8 +20,8 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
+#include "elf/internal.h"
#include "filenames.h"
+#include "gdb_bfd.h"
-+#include "gdbcmd.h"
#include "gdbcore.h"
++#include "cli/cli-cmds.h"
#include "cli/cli-style.h"
+#include "inferior.h"
+#include "objfiles.h"
@@ -77,7 +77,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
/* See build-id.h. */
-@@ -50,6 +108,348 @@ build_id_bfd_get (bfd *abfd)
+@@ -49,6 +107,349 @@ build_id_bfd_get (bfd *abfd)
return NULL;
}
@@ -386,12 +386,13 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
+ bfd_vma loadbase = 0;
+ unsigned e_phnum = 0;
+
-+ if (core_bfd == NULL)
++ if (current_program_space->core_bfd () == NULL)
+ return NULL;
+
+ build_id_addr = addr;
+ gdb_assert (build_id_addr_sect == NULL);
-+ bfd_map_over_sections (core_bfd, build_id_addr_candidate, NULL);
++ bfd_map_over_sections (current_program_space->core_bfd (),
++ build_id_addr_candidate, NULL);
+
+ /* Sections are sorted in the high-to-low VMAs order.
+ Stop the search on the first ELF header we find.
@@ -400,7 +401,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
+ for (candidate = build_id_addr_sect; candidate != NULL;
+ candidate = candidate->next)
+ {
-+ i_phdr = elf_get_phdr (core_bfd,
++ i_phdr = elf_get_phdr (current_program_space->core_bfd (),
+ bfd_section_vma (candidate->sect),
+ &e_phnum, &loadbase);
+ if (i_phdr != NULL)
@@ -409,7 +410,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
+
+ if (i_phdr != NULL)
+ {
-+ retval = build_id_phdr_get (core_bfd, loadbase, e_phnum, i_phdr);
++ retval = build_id_phdr_get (current_program_space->core_bfd (), loadbase, e_phnum, i_phdr);
+ xfree (i_phdr);
+ }
+
@@ -426,7 +427,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
/* See build-id.h. */
int
-@@ -73,63 +473,166 @@ build_id_verify (bfd *abfd, size_t check_len, const bfd_byte *check)
+@@ -73,63 +474,166 @@ build_id_verify (bfd *abfd, size_t check_len, const bfd_byte *check)
return retval;
}
@@ -488,7 +489,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
- /* lrealpath() is expensive even for the usually non-existent files. */
- gdb::unique_xmalloc_ptr<char> filename_holder;
- const char *filename = nullptr;
-- if (startswith (link, TARGET_SYSROOT_PREFIX))
+- if (is_target_filename (link))
- filename = link.c_str ();
- else if (access (link.c_str (), F_OK) == 0)
+ for (unsigned seqno = 0;; seqno++)
@@ -627,7 +628,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
}
/* Common code for finding BFDs of a given build-id. This function
-@@ -138,7 +641,7 @@ build_id_to_debug_bfd_1 (const std::string &link, size_t build_id_len,
+@@ -138,7 +642,7 @@ build_id_to_debug_bfd_1 (const std::string &link, size_t build_id_len,
static gdb_bfd_ref_ptr
build_id_to_bfd_suffix (size_t build_id_len, const bfd_byte *build_id,
@@ -636,7 +637,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
{
/* Keep backward compatibility so that DEBUG_FILE_DIRECTORY being "" will
cause "/.build-id/..." lookups. */
-@@ -161,16 +664,17 @@ build_id_to_bfd_suffix (size_t build_id_len, const bfd_byte *build_id,
+@@ -161,16 +665,17 @@ build_id_to_bfd_suffix (size_t build_id_len, const bfd_byte *build_id,
if (size > 0)
{
size--;
@@ -657,7 +658,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
if (debug_bfd != NULL)
return debug_bfd;
-@@ -181,7 +685,7 @@ build_id_to_bfd_suffix (size_t build_id_len, const bfd_byte *build_id,
+@@ -181,7 +686,7 @@ build_id_to_bfd_suffix (size_t build_id_len, const bfd_byte *build_id,
if (!gdb_sysroot.empty ())
{
link = gdb_sysroot + link;
@@ -666,7 +667,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
if (debug_bfd != NULL)
return debug_bfd;
}
-@@ -190,20 +694,178 @@ build_id_to_bfd_suffix (size_t build_id_len, const bfd_byte *build_id,
+@@ -190,20 +695,178 @@ build_id_to_bfd_suffix (size_t build_id_len, const bfd_byte *build_id,
return {};
}
@@ -848,7 +849,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
}
/* See build-id.h. */
-@@ -224,6 +886,7 @@ find_separate_debug_file_by_buildid (struct objfile *objfile,
+@@ -224,6 +887,7 @@ find_separate_debug_file_by_buildid (struct objfile *objfile,
gdb_bfd_ref_ptr abfd (build_id_to_debug_bfd (build_id->size,
build_id->data));
@@ -856,7 +857,7 @@ diff --git a/gdb/build-id.c b/gdb/build-id.c
/* Prevent looping on a stripped .debug file. */
if (abfd != NULL
&& filename_cmp (bfd_get_filename (abfd.get ()),
-@@ -243,3 +906,22 @@ find_separate_debug_file_by_buildid (struct objfile *objfile,
+@@ -243,3 +907,22 @@ find_separate_debug_file_by_buildid (struct objfile *objfile,
return std::string ();
}
@@ -903,18 +904,17 @@ diff --git a/gdb/build-id.h b/gdb/build-id.h
diff --git a/gdb/corelow.c b/gdb/corelow.c
--- a/gdb/corelow.c
+++ b/gdb/corelow.c
-@@ -22,6 +22,10 @@
+@@ -21,6 +21,9 @@
#include <signal.h>
#include <fcntl.h>
#include "frame.h"
+#include "auxv.h"
+#include "build-id.h"
+#include "elf/common.h"
-+#include "gdbcmd.h"
#include "inferior.h"
#include "infrun.h"
#include "symtab.h"
-@@ -380,6 +384,8 @@ add_to_thread_list (asection *asect, asection *reg_sect, inferior *inf)
+@@ -383,6 +386,8 @@ add_to_thread_list (asection *asect, asection *reg_sect, inferior *inf)
switch_to_thread (thr); /* Yes, make it current. */
}
@@ -923,7 +923,7 @@ diff --git a/gdb/corelow.c b/gdb/corelow.c
/* Issue a message saying we have no core to debug, if FROM_TTY. */
static void
-@@ -567,8 +573,10 @@ locate_exec_from_corefile_build_id (bfd *abfd, int from_tty)
+@@ -570,8 +575,10 @@ locate_exec_from_corefile_build_id (bfd *abfd, int from_tty)
if (build_id == nullptr)
return;
@@ -935,7 +935,7 @@ diff --git a/gdb/corelow.c b/gdb/corelow.c
if (execbfd == nullptr)
{
-@@ -596,7 +604,12 @@ locate_exec_from_corefile_build_id (bfd *abfd, int from_tty)
+@@ -599,7 +606,12 @@ locate_exec_from_corefile_build_id (bfd *abfd, int from_tty)
exec_file_attach (bfd_get_filename (execbfd.get ()), from_tty);
symbol_file_add_main (bfd_get_filename (execbfd.get ()),
symfile_add_flag (from_tty ? SYMFILE_VERBOSE : 0));
@@ -948,7 +948,7 @@ diff --git a/gdb/corelow.c b/gdb/corelow.c
}
/* See gdbcore.h. */
-@@ -1506,4 +1519,11 @@ _initialize_corelow ()
+@@ -1524,4 +1536,11 @@ _initialize_corelow ()
maintenance_print_core_file_backed_mappings,
_("Print core file's file-backed mappings."),
&maintenanceprintlist);
@@ -963,7 +963,7 @@ diff --git a/gdb/corelow.c b/gdb/corelow.c
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
-@@ -22296,6 +22296,27 @@ information files.
+@@ -22487,6 +22487,27 @@ information files.
@end table
@@ -994,7 +994,7 @@ diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
diff --git a/gdb/objfiles.h b/gdb/objfiles.h
--- a/gdb/objfiles.h
+++ b/gdb/objfiles.h
-@@ -884,6 +884,10 @@ struct objfile
+@@ -877,6 +877,10 @@ struct objfile
bool object_format_has_copy_relocs = false;
};
@@ -1016,61 +1016,53 @@ diff --git a/gdb/solib-svr4.c b/gdb/solib-svr4.c
#include <map>
-@@ -1318,9 +1319,51 @@ svr4_read_so_list (svr4_info *info, CORE_ADDR lm, CORE_ADDR prev_lm,
+@@ -1262,6 +1263,46 @@ svr4_read_so_list (svr4_info *info, CORE_ADDR lm, CORE_ADDR prev_lm,
continue;
}
-- strncpy (newobj->so_name, buffer.get (), SO_NAME_MAX_PATH_SIZE - 1);
-- newobj->so_name[SO_NAME_MAX_PATH_SIZE - 1] = '\0';
-- strcpy (newobj->so_original_name, newobj->so_name);
-+ {
-+ struct bfd_build_id *build_id;
-+
-+ strncpy (newobj->so_original_name, buffer.get (), SO_NAME_MAX_PATH_SIZE - 1);
-+ newobj->so_original_name[SO_NAME_MAX_PATH_SIZE - 1] = '\0';
-+ /* May get overwritten below. */
-+ strcpy (newobj->so_name, newobj->so_original_name);
-+
-+ build_id = build_id_addr_get (((lm_info_svr4 *) newobj->lm_info)->l_ld);
-+ if (build_id != NULL)
-+ {
-+ char *name, *build_id_filename;
-+
-+ /* Missing the build-id matching separate debug info file
-+ would be handled while SO_NAME gets loaded. */
-+ name = build_id_to_filename (build_id, &build_id_filename);
-+ if (name != NULL)
-+ {
-+ strncpy (newobj->so_name, name, SO_NAME_MAX_PATH_SIZE - 1);
-+ newobj->so_name[SO_NAME_MAX_PATH_SIZE - 1] = '\0';
-+ xfree (name);
-+ }
-+ else
-+ {
-+ debug_print_missing (newobj->so_name, build_id_filename);
-+
-+ /* In the case the main executable was found according to
-+ its build-id (from a core file) prevent loading
-+ a different build of a library with accidentally the
-+ same SO_NAME.
-+
-+ It suppresses bogus backtraces (and prints "??" there
-+ instead) if the on-disk files no longer match the
-+ running program version. */
-+
-+ if (current_program_space->symfile_object_file != NULL
-+ && (current_program_space->symfile_object_file->flags
-+ & OBJF_BUILD_ID_CORE_LOADED) != 0)
-+ newobj->so_name[0] = 0;
-+ }
-+
-+ xfree (build_id_filename);
-+ xfree (build_id);
-+ }
-+ }
-
++ {
++ struct bfd_build_id *build_id;
++
++ build_id = build_id_addr_get (li->l_ld);
++ if (build_id != NULL)
++ {
++ char *bid_name, *build_id_filename;
++
++ /* Missing the build-id matching separate debug info file
++ would be handled while SO_NAME gets loaded. */
++ bid_name = build_id_to_filename (build_id, &build_id_filename);
++ if (bid_name != NULL)
++ {
++ name = make_unique_xstrdup (bid_name);
++ xfree (bid_name);
++ }
++ else
++ {
++ debug_print_missing (name.get (), build_id_filename);
++
++ /* In the case the main executable was found according to
++ its build-id (from a core file) prevent loading
++ a different build of a library with accidentally the
++ same SO_NAME.
++
++ It suppresses bogus backtraces (and prints "??" there
++ instead) if the on-disk files no longer match the
++ running program version. */
++
++ if (current_program_space->symfile_object_file != NULL
++ && (current_program_space->symfile_object_file->flags
++ & OBJF_BUILD_ID_CORE_LOADED) != 0)
++ name = make_unique_xstrdup ("");
++ }
++
++ xfree (build_id_filename);
++ xfree (build_id);
++ }
++ }
++
/* If this entry has no name, or its name matches the name
for the main executable, don't include it in the list. */
+ if (*name == '\0' || match_main (name.get ()))
diff --git a/gdb/symfile.h b/gdb/symfile.h
--- a/gdb/symfile.h
+++ b/gdb/symfile.h
@@ -1139,10 +1131,12 @@ diff --git a/gdb/testsuite/gdb.base/gdbinit-history.exp b/gdb/testsuite/gdb.base
diff --git a/gdb/testsuite/gdb.base/new-ui-pending-input.exp b/gdb/testsuite/gdb.base/new-ui-pending-input.exp
--- a/gdb/testsuite/gdb.base/new-ui-pending-input.exp
+++ b/gdb/testsuite/gdb.base/new-ui-pending-input.exp
-@@ -62,6 +62,7 @@ proc test_command_line_new_ui_pending_input {} {
+@@ -60,6 +60,9 @@ proc test_command_line_new_ui_pending_input {} {
+ set bpline [gdb_get_line_number "set breakpoint here"]
+
set options ""
- append options " -iex \"set height 0\""
- append options " -iex \"set width 0\""
++ append options " -iex \"set height 0\""
++ append options " -iex \"set width 0\""
+ append options " -iex \"set build-id-verbose 0\""
append options " -iex \"new-ui console $extra_tty_name\""
append options " -ex \"b $bpline\""
@@ -1150,7 +1144,7 @@ diff --git a/gdb/testsuite/gdb.base/new-ui-pending-input.exp b/gdb/testsuite/gdb
diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp
--- a/gdb/testsuite/lib/gdb.exp
+++ b/gdb/testsuite/lib/gdb.exp
-@@ -226,7 +226,8 @@ if ![info exists INTERNAL_GDBFLAGS] {
+@@ -238,7 +238,8 @@ if ![info exists INTERNAL_GDBFLAGS] {
"-nx" \
"-q" \
{-iex "set height 0"} \
@@ -1160,7 +1154,7 @@ diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp
# If DEBUGINFOD_URLS is set, gdb will try to download sources and
# debug info for f.i. system libraries. Prevent this.
-@@ -2434,6 +2435,17 @@ proc default_gdb_start { } {
+@@ -2493,6 +2494,17 @@ proc default_gdb_start { } {
}
}
diff --git a/gdb-add-missing-debug-ext-lang-hook.patch b/gdb-add-missing-debug-ext-lang-hook.patch
deleted file mode 100644
index f3a3405..0000000
--- a/gdb-add-missing-debug-ext-lang-hook.patch
+++ /dev/null
@@ -1,314 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Fri, 13 Oct 2023 16:48:36 +0100
-Subject: gdb-add-missing-debug-ext-lang-hook.patch
-
-;; Backport upstream commit 661d98a3331.
-
-gdb: add an extension language hook for missing debug info
-
-This commit adds a new extension_language_ops hook which allows an
-extension to handle the case where GDB can't find a separate debug
-information file for a particular objfile.
-
-This commit doesn't actually implement the hook for any of GDB's
-extension languages, the next commit will do that. This commit just
-adds support for the hook to extension-priv.h and extension.[ch], and
-then reworks symfile-debug.c to call the hook.
-
-Right now the hook will always return its default value, which means
-GDB should do nothing different. As such, there should be no user
-visible changes after this commit.
-
-I'll give a brief description of what the hook does here so that we
-can understand the changes in symfile-debug.c. The next commit adds a
-Python implementation for this new hook, and gives a fuller
-description of the new functionality.
-
-Currently, when looking for separate debug information GDB tries three
-things, in this order:
-
- 1. Use the build-id to find the required debug information,
-
- 2. Check for .gnu_debuglink section and use that to look up the
- required debug information,
-
- 3. Check with debuginfod to see if it can supply the required
- information.
-
-The new extension_language_ops::handle_missing_debuginfo hook is
-called if all three steps fail to find any debug information. The
-hook has three possible return values:
-
- a. Nothing, no debug information is found, GDB continues without the
- debug information for this objfile. This matches the current
- behaviour of GDB, and is the default if nothing is implementing this
- new hook,
-
- b. Install debug information into a location that step #1 or #2
- above would normally check, and then request that GDB repeats steps
- #1 and #2 in the hope that GDB will now find the debug information.
- If the debug information is still not found then GDB carries on
- without the debug information. If the debug information is found
- the GDB loads it and carries on,
-
- c. Return a filename for a file containing the required debug
- information. GDB loads the contents of this file and carries on.
-
-The changes in this commit mostly involve placing the core of
-objfile::find_and_add_separate_symbol_file into a loop which allows
-for steps #1 and #2 to be repeated.
-
-We take care to ensure that debuginfod is only queried once, the first
-time through. The assumption is that no extension is going to be able
-to control the replies from debuginfod, so there's no point making a
-second request -- and as these requests go over the network, they
-could potentially be slow.
-
-The warnings that find_and_add_separate_symbol_file collects are
-displayed only once assuming that no debug information is found. If
-debug information is found, even after the extension has operated,
-then the warnings are not shown; remember, these are warnings from GDB
-about failure to find any suitable debug information, so it makes
-sense to hide these if debug information is found.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/extension-priv.h b/gdb/extension-priv.h
---- a/gdb/extension-priv.h
-+++ b/gdb/extension-priv.h
-@@ -279,6 +279,13 @@ struct extension_language_ops
- gdb::optional<int> (*print_insn) (struct gdbarch *gdbarch,
- CORE_ADDR address,
- struct disassemble_info *info);
-+
-+ /* Give extension languages a chance to deal with missing debug
-+ information. OBJFILE is the file for which GDB was unable to find
-+ any debug information. */
-+ ext_lang_missing_debuginfo_result
-+ (*handle_missing_debuginfo) (const struct extension_language_defn *,
-+ struct objfile *objfile);
- };
-
- /* State necessary to restore a signal handler to its previous value. */
-diff --git a/gdb/extension.c b/gdb/extension.c
---- a/gdb/extension.c
-+++ b/gdb/extension.c
-@@ -997,6 +997,25 @@ ext_lang_print_insn (struct gdbarch *gdbarch, CORE_ADDR address,
- return {};
- }
-
-+/* See extension.h. */
-+
-+ext_lang_missing_debuginfo_result
-+ext_lang_handle_missing_debuginfo (struct objfile *objfile)
-+{
-+ for (const struct extension_language_defn *extlang : extension_languages)
-+ {
-+ if (extlang->ops == nullptr
-+ || extlang->ops->handle_missing_debuginfo == nullptr)
-+ continue;
-+ ext_lang_missing_debuginfo_result result
-+ = extlang->ops->handle_missing_debuginfo (extlang, objfile);
-+ if (!result.filename ().empty () || result.try_again ())
-+ return result;
-+ }
-+
-+ return {};
-+}
-+
- /* Called via an observer before gdb prints its prompt.
- Iterate over the extension languages giving them a chance to
- change the prompt. The first one to change the prompt wins,
-diff --git a/gdb/extension.h b/gdb/extension.h
---- a/gdb/extension.h
-+++ b/gdb/extension.h
-@@ -337,6 +337,68 @@ extern gdb::optional<std::string> ext_lang_colorize_disasm
- extern gdb::optional<int> ext_lang_print_insn
- (struct gdbarch *gdbarch, CORE_ADDR address, struct disassemble_info *info);
-
-+/* When GDB calls into an extension language because an objfile was
-+ discovered for which GDB couldn't find any debug information, this
-+ structure holds the result that the extension language returns.
-+
-+ There are three possible actions that might be returned by an extension;
-+ first an extension can return a filename, this is the path to the file
-+ containing the required debug information. The second possibility is
-+ to return a flag indicating that GDB should check again for the missing
-+ debug information, this would imply that the extension has installed
-+ the debug information into a location where GDB can be expected to find
-+ it. And the third option is for the extension to just return a null
-+ result, indication there is nothing the extension can do to provide the
-+ missing debug information. */
-+struct ext_lang_missing_debuginfo_result
-+{
-+ /* Default result. The extension was unable to provide the missing debug
-+ info. */
-+ ext_lang_missing_debuginfo_result ()
-+ { /* Nothing. */ }
-+
-+ /* When TRY_AGAIN is true GDB should try searching again, the extension
-+ may have installed the missing debug info into a suitable location.
-+ When TRY_AGAIN is false this is equivalent to the default, no
-+ argument, constructor. */
-+ ext_lang_missing_debuginfo_result (bool try_again)
-+ : m_try_again (try_again)
-+ { /* Nothing. */ }
-+
-+ /* Look in FILENAME for the missing debug info. */
-+ ext_lang_missing_debuginfo_result (std::string &&filename)
-+ : m_filename (std::move (filename))
-+ { /* Nothing. */ }
-+
-+ /* The filename where GDB can find the missing debuginfo. This is empty
-+ if the extension didn't suggest a file that can be used. */
-+ const std::string &
-+ filename () const
-+ {
-+ return m_filename;
-+ }
-+
-+ /* Returns true if GDB should look again for the debug information. */
-+ const bool
-+ try_again () const
-+ {
-+ return m_try_again;
-+ }
-+
-+private:
-+ /* The filename where the missing debuginfo can now be found. */
-+ std::string m_filename;
-+
-+ /* When true GDB will search again for the debuginfo using its standard
-+ techniques. When false GDB will not search again. */
-+ bool m_try_again = false;
-+};
-+
-+/* Called when GDB failed to find any debug information for OBJFILE. */
-+
-+extern ext_lang_missing_debuginfo_result ext_lang_handle_missing_debuginfo
-+ (struct objfile *objfile);
-+
- #if GDB_SELF_TEST
- namespace selftests {
- extern void (*hook_set_active_ext_lang) ();
-diff --git a/gdb/symfile-debug.c b/gdb/symfile-debug.c
---- a/gdb/symfile-debug.c
-+++ b/gdb/symfile-debug.c
-@@ -631,38 +631,88 @@ debuginfod_find_and_open_separate_symbol_file (struct objfile * objfile)
- bool
- objfile::find_and_add_separate_symbol_file (symfile_add_flags symfile_flags)
- {
-- bool has_dwarf = false;
--
-- deferred_warnings warnings;
--
-- gdb_bfd_ref_ptr debug_bfd;
-- std::string filename;
--
-- std::tie (debug_bfd, filename) = simple_find_and_open_separate_symbol_file
-- (this, find_separate_debug_file_by_buildid, &warnings);
--
-- if (debug_bfd == nullptr)
-- std::tie (debug_bfd, filename)
-- = simple_find_and_open_separate_symbol_file
-- (this, find_separate_debug_file_by_debuglink, &warnings);
-+ bool has_dwarf2 = false;
-+
-+ /* Usually we only make a single pass when looking for separate debug
-+ information. However, it is possible for an extension language hook
-+ to request that GDB make a second pass, in which case max_attempts
-+ will be updated, and the loop restarted. */
-+ for (unsigned attempt = 0, max_attempts = 1;
-+ attempt < max_attempts && !has_dwarf2;
-+ ++attempt)
-+ {
-+ gdb_assert (max_attempts <= 2);
-+
-+ deferred_warnings warnings;
-+ gdb_bfd_ref_ptr debug_bfd;
-+ std::string filename;
-+
-+ std::tie (debug_bfd, filename)
-+ = simple_find_and_open_separate_symbol_file
-+ (this, find_separate_debug_file_by_buildid, &warnings);
-+
-+ if (debug_bfd == nullptr)
-+ std::tie (debug_bfd, filename)
-+ = simple_find_and_open_separate_symbol_file
-+ (this, find_separate_debug_file_by_debuglink, &warnings);
-+
-+ /* Only try debuginfod on the first attempt. Sure, we could imagine
-+ an extension that somehow adds the required debug info to the
-+ debuginfod server but, at least for now, we don't support this
-+ scenario. Better for the extension to return new debug info
-+ directly to GDB. Plus, going to the debuginfod server might be
-+ slow, so that's a good argument for only doing this once. */
-+ if (debug_bfd == nullptr && attempt == 0)
-+ std::tie (debug_bfd, filename)
-+ = debuginfod_find_and_open_separate_symbol_file (this);
-+
-+ if (debug_bfd != nullptr)
-+ {
-+ /* We found a separate debug info symbol file. If this is our
-+ first attempt then setting HAS_DWARF2 will cause us to break
-+ from the attempt loop. */
-+ symbol_file_add_separate (debug_bfd, filename.c_str (),
-+ symfile_flags, this);
-+ has_dwarf2 = true;
-+ }
-+ else if (attempt == 0)
-+ {
-+ /* Failed to find a separate debug info symbol file. Call out to
-+ the extension languages. The user might have registered an
-+ extension that can find the debug info for us, or maybe give
-+ the user a system specific message that guides them to finding
-+ the missing debug info. */
-+
-+ ext_lang_missing_debuginfo_result ext_result
-+ = ext_lang_handle_missing_debuginfo (this);
-+ if (!ext_result.filename ().empty ())
-+ {
-+ /* Extension found a suitable debug file for us. */
-+ debug_bfd
-+ = symfile_bfd_open_no_error (ext_result.filename ().c_str ());
-
-- if (debug_bfd == nullptr)
-- std::tie (debug_bfd, filename)
-- = debuginfod_find_and_open_separate_symbol_file (this);
-+ if (debug_bfd != nullptr)
-+ {
-+ symbol_file_add_separate (debug_bfd,
-+ ext_result.filename ().c_str (),
-+ symfile_flags, this);
-+ has_dwarf2 = true;
-+ }
-+ }
-+ else if (ext_result.try_again ())
-+ {
-+ max_attempts = 2;
-+ continue;
-+ }
-+ }
-
-- if (debug_bfd != nullptr)
-- {
-- symbol_file_add_separate (debug_bfd, filename.c_str (), symfile_flags,
-- this);
-- has_dwarf = true;
-+ /* If we still have not got a separate debug symbol file, then
-+ emit any warnings we've collected so far. */
-+ if (!has_dwarf2)
-+ warnings.emit ();
- }
-
-- /* If we still have not got a separate debug symbol file, then
-- emit any warnings we've collected so far. */
-- if (!has_dwarf)
-- warnings.emit ();
--
-- return has_dwarf;
-+ return has_dwarf2;
- }
-
- \f
diff --git a/gdb-add-missing-debug-info-python-hook.patch b/gdb-add-missing-debug-info-python-hook.patch
deleted file mode 100644
index c954d27..0000000
--- a/gdb-add-missing-debug-info-python-hook.patch
+++ /dev/null
@@ -1,1556 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Sun, 15 Oct 2023 22:48:42 +0100
-Subject: gdb-add-missing-debug-info-python-hook.patch
-
-;; Backport upstream commit 8f6c452b5a4.
-
-gdb: implement missing debug handler hook for Python
-
-This commit builds on the previous commit, and implements the
-extension_language_ops::handle_missing_debuginfo function for Python.
-This hook will give user supplied Python code a chance to help find
-missing debug information.
-
-The implementation of the new hook is pretty minimal within GDB's C++
-code; most of the work is out-sourced to a Python implementation which
-is modelled heavily on how GDB's Python frame unwinders are
-implemented.
-
-The following new commands are added as commands implemented in
-Python, this is similar to how the Python unwinder commands are
-implemented:
-
- info missing-debug-handlers
- enable missing-debug-handler LOCUS HANDLER
- disable missing-debug-handler LOCUS HANDLER
-
-To make use of this extension hook a user will create missing debug
-information handler objects, and registers these handlers with GDB.
-When GDB encounters an objfile that is missing debug information, each
-handler is called in turn until one is able to help. Here is a
-minimal handler that does nothing useful:
-
- import gdb
- import gdb.missing_debug
-
- class MyFirstHandler(gdb.missing_debug.MissingDebugHandler):
- def __init__(self):
- super().__init__("my_first_handler")
-
- def __call__(self, objfile):
- # This handler does nothing useful.
- return None
-
- gdb.missing_debug.register_handler(None, MyFirstHandler())
-
-Returning None from the __call__ method tells GDB that this handler
-was unable to find the missing debug information, and GDB should ask
-any other registered handlers.
-
-By extending the __call__ method it is possible for the Python
-extension to locate the debug information for objfile and return a
-value that tells GDB how to use the information that has been located.
-
-Possible return values from a handler:
-
- - None: This means the handler couldn't help. GDB will call other
- registered handlers to see if they can help instead.
-
- - False: The handler has done all it can, but the debug information
- for the objfile still couldn't be found. GDB will not call
- any other handlers, and will continue without the debug
- information for objfile.
-
- - True: The handler has installed the debug information into a
- location where GDB would normally expect to find it. GDB
- should look again for the debug information.
-
- - A string: The handler can return a filename, which is the file
- containing the missing debug information. GDB will load
- this file.
-
-When a handler returns True, GDB will look again for the debug
-information, but only using the standard built-in build-id and
-.gnu_debuglink based lookup strategies. It is not possible for an
-extension to trigger another debuginfod lookup; the assumption is that
-the debuginfod server is remote, and out of the control of extensions
-running within GDB.
-
-Handlers can be registered globally, or per program space. GDB checks
-the handlers for the current program space first, and then all of the
-global handles. The first handler that returns a value that is not
-None, has "handled" the objfile, at which point GDB continues.
-
-Reviewed-By: Eli Zaretskii <eliz@gnu.org>
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/data-directory/Makefile.in b/gdb/data-directory/Makefile.in
---- a/gdb/data-directory/Makefile.in
-+++ b/gdb/data-directory/Makefile.in
-@@ -73,6 +73,7 @@ PYTHON_FILE_LIST = \
- gdb/FrameDecorator.py \
- gdb/FrameIterator.py \
- gdb/frames.py \
-+ gdb/missing_debug.py \
- gdb/printing.py \
- gdb/prompt.py \
- gdb/styling.py \
-@@ -82,6 +83,7 @@ PYTHON_FILE_LIST = \
- gdb/command/__init__.py \
- gdb/command/explore.py \
- gdb/command/frame_filters.py \
-+ gdb/command/missing_debug.py \
- gdb/command/pretty_printers.py \
- gdb/command/prompt.py \
- gdb/command/type_printers.py \
-diff --git a/gdb/doc/python.texi b/gdb/doc/python.texi
---- a/gdb/doc/python.texi
-+++ b/gdb/doc/python.texi
-@@ -229,6 +229,7 @@ optional arguments while skipping others. Example:
- * Connections In Python:: Python representation of connections.
- * TUI Windows In Python:: Implementing new TUI windows.
- * Disassembly In Python:: Instruction Disassembly In Python
-+* Missing Debug Info In Python:: Handle missing debug info from Python.
- @end menu
-
- @node Basic Python
-@@ -5191,6 +5192,12 @@ The @code{frame_filters} attribute is a dictionary of frame filter
- objects. @xref{Frame Filter API}, for more information.
- @end defvar
-
-+@defvar Progspace.missing_debug_handlers
-+The @code{missing_debug_handlers} attribute is a list of the missing
-+debug handler objects for this program space. @xref{Missing Debug
-+Info In Python}, for more information.
-+@end defvar
-+
- A program space has the following methods:
-
- @defun Progspace.block_for_pc (pc)
-@@ -7770,6 +7777,139 @@ class NibbleSwapDisassembler(gdb.disassembler.Disassembler):
- gdb.disassembler.register_disassembler(NibbleSwapDisassembler())
- @end smallexample
-
-+@node Missing Debug Info In Python
-+@subsubsection Missing Debug Info In Python
-+@cindex python, handle missing debug information
-+
-+When @value{GDBN} encounters a new objfile (@pxref{Objfiles In
-+Python}), e.g.@: the primary executable, or any shared libraries used
-+by the inferior, @value{GDBN} will attempt to load the corresponding
-+debug information for that objfile. The debug information might be
-+found within the objfile itself, or within a separate objfile which
-+@value{GDBN} will automatically locate and load.
-+
-+Sometimes though, @value{GDBN} might not find any debug information
-+for an objfile, in this case the debugging experience will be
-+restricted.
-+
-+If @value{GDBN} fails to locate any debug information for a particular
-+objfile, there is an opportunity for a Python extension to step in. A
-+Python extension can potentially locate the missing debug information
-+using some platform- or project-specific steps, and inform
-+@value{GDBN} of its location. Or a Python extension might provide
-+some platform- or project-specific advice to the user about how to
-+obtain the missing debug information.
-+
-+A missing debug information Python extension consists of a handler
-+object which has the @code{name} and @code{enabled} attributes, and
-+implements the @code{__call__} method. When @value{GDBN} encounters
-+an objfile for which it is unable to find any debug information, it
-+invokes the @code{__call__} method. Full details of how handlers are
-+written can be found below.
-+
-+@subheading The @code{gdb.missing_debug} Module
-+
-+@value{GDBN} comes with a @code{gdb.missing_debug} module which
-+contains the following class and global function:
-+
-+@deftp{class} gdb.missing_debug.MissingDebugHandler
-+
-+@code{MissingDebugHandler} is a base class from which user-created
-+handlers can derive, though it is not required that handlers derive
-+from this class, so long as any user created handler has the
-+@code{name} and @code{enabled} attributes, and implements the
-+@code{__call__} method.
-+
-+@defun MissingDebugHandler.__init__ (name)
-+The @var{name} is a string used to reference this missing debug
-+handler within some @value{GDBN} commands. Valid names consist of the
-+characters @code{[-_a-zA-Z0-9]}, creating a handler with an invalid
-+name raises a @code{ValueError} exception.
-+@end defun
-+
-+@defun MissingDebugHandler.__call__ (objfile)
-+Sub-classes must override the @code{__call__} method. The
-+@var{objfile} argument will be a @code{gdb.Objfile}, this is the
-+objfile for which @value{GDBN} was unable to find any debug
-+information.
-+
-+The return value from the @code{__call__} method indicates what
-+@value{GDBN} should do next. The possible return values are:
-+
-+@itemize @bullet
-+@item @code{None}
-+
-+This indicates that this handler could not help with @var{objfile},
-+@value{GDBN} should call any other registered handlers.
-+
-+@item @code{True}
-+
-+This indicates that this handler has installed the debug information
-+into a location where @value{GDBN} would normally expect to find it
-+when looking for separate debug information files (@pxref{Separate
-+Debug Files}). @value{GDBN} will repeat the normal lookup process,
-+which should now find the separate debug file.
-+
-+If @value{GDBN} still doesn't find the separate debug information file
-+after this second attempt, then the Python missing debug information
-+handlers are not invoked a second time, this prevents a badly behaved
-+handler causing @value{GDBN} to get stuck in a loop. @value{GDBN}
-+will continue without any debug information for @var{objfile}.
-+
-+@item @code{False}
-+
-+This indicates that this handler has done everything that it intends
-+to do with @var{objfile}, but no separate debug information can be
-+found. @value{GDBN} will not call any other registered handlers for
-+@var{objfile}. @value{GDBN} will continue without debugging
-+information for @var{objfile}.
-+
-+@item A string
-+
-+The returned string should contain a filename. @value{GDBN} will not
-+call any further registered handlers, and will instead load the debug
-+information from the file identified by the returned filename.
-+@end itemize
-+
-+Invoking the @code{__call__} method from this base class will raise a
-+@code{NotImplementedError} exception.
-+@end defun
-+
-+@defvar MissingDebugHandler.name
-+A read-only attribute which is a string, the name of this handler
-+passed to the @code{__init__} method.
-+@end defvar
-+
-+@defvar MissingDebugHandler.enabled
-+A modifiable attribute containing a boolean; when @code{True}, the
-+handler is enabled, and will be used by @value{GDBN}. When
-+@code{False}, the handler has been disabled, and will not be used.
-+@end defvar
-+@end deftp
-+
-+@defun gdb.missing_debug.register_handler (locus, handler, replace=@code{False})
-+Register a new missing debug handler with @value{GDBN}.
-+
-+@var{handler} is an instance of a sub-class of
-+@code{MissingDebugHandler}, or at least an instance of an object that
-+has the same attributes and methods as @code{MissingDebugHandler}.
-+
-+@var{locus} specifies to which handler list to prepend @var{handler}.
-+It can be either a @code{gdb.Progspace} (@pxref{Progspaces In Python})
-+or @code{None}, in which case the handler is registered globally. The
-+newly registered @var{handler} will be called before any other handler
-+from the same locus. Two handlers in the same locus cannot have the
-+same name, an attempt to add a handler with an already existing name
-+raises an exception unless @var{replace} is @code{True}, in which case
-+the old handler is deleted and the new handler is prepended to the
-+selected handler list.
-+
-+@value{GDBN} first calls the handlers for the current program space,
-+and then the globally registered handlers. As soon as a handler
-+returns a value other than @code{None}, no further handlers are called
-+for this objfile.
-+@end defun
-+
- @node Python Auto-loading
- @subsection Python Auto-loading
- @cindex Python auto-loading
-diff --git a/gdb/python/lib/gdb/__init__.py b/gdb/python/lib/gdb/__init__.py
---- a/gdb/python/lib/gdb/__init__.py
-+++ b/gdb/python/lib/gdb/__init__.py
-@@ -84,6 +84,8 @@ xmethods = []
- frame_filters = {}
- # Initial frame unwinders.
- frame_unwinders = []
-+# Initial missing debug handlers.
-+missing_debug_handlers = []
-
-
- def _execute_unwinders(pending_frame):
-@@ -291,3 +293,42 @@ class Thread(threading.Thread):
- # threads.
- with blocked_signals():
- super().start()
-+
-+
-+def _handle_missing_debuginfo(objfile):
-+ """Internal function called from GDB to execute missing debug
-+ handlers.
-+
-+ Run each of the currently registered, and enabled missing debug
-+ handler objects for the current program space and then from the
-+ global list. Stop after the first handler that returns a result
-+ other than None.
-+
-+ Arguments:
-+ objfile: A gdb.Objfile for which GDB could not find any debug
-+ information.
-+
-+ Returns:
-+ None: No debug information could be found for objfile.
-+ False: A handler has done all it can with objfile, but no
-+ debug information could be found.
-+ True: Debug information might have been installed by a
-+ handler, GDB should check again.
-+ A string: This is the filename of a file containing the
-+ required debug information.
-+ """
-+ pspace = objfile.progspace
-+
-+ for handler in pspace.missing_debug_handlers:
-+ if handler.enabled:
-+ result = handler(objfile)
-+ if result is not None:
-+ return result
-+
-+ for handler in missing_debug_handlers:
-+ if handler.enabled:
-+ result = handler(objfile)
-+ if result is not None:
-+ return result
-+
-+ return None
-diff --git a/gdb/python/lib/gdb/command/missing_debug.py b/gdb/python/lib/gdb/command/missing_debug.py
-new file mode 100644
---- /dev/null
-+++ b/gdb/python/lib/gdb/command/missing_debug.py
-@@ -0,0 +1,226 @@
-+# Missing debug related commands.
-+#
-+# Copyright 2023 Free Software Foundation, Inc.
-+#
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 3 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program. If not, see <http://www.gnu.org/licenses/>.
-+
-+import gdb
-+import re
-+
-+
-+def validate_regexp(exp, idstring):
-+ """Compile exp into a compiler regular expression object.
-+
-+ Arguments:
-+ exp: The string to compile into a re.Pattern object.
-+ idstring: A string, what exp is a regexp for.
-+
-+ Returns:
-+ A re.Pattern object representing exp.
-+
-+ Raises:
-+ SyntaxError: If exp is an invalid regexp.
-+ """
-+ try:
-+ return re.compile(exp)
-+ except SyntaxError:
-+ raise SyntaxError("Invalid %s regexp: %s." % (idstring, exp))
-+
-+
-+def parse_missing_debug_command_args(arg):
-+ """Internal utility to parse missing debug handler command argv.
-+
-+ Arguments:
-+ arg: The arguments to the command. The format is:
-+ [locus-regexp [name-regexp]]
-+
-+ Returns:
-+ A 2-tuple of compiled regular expressions.
-+
-+ Raises:
-+ SyntaxError: an error processing ARG
-+ """
-+ argv = gdb.string_to_argv(arg)
-+ argc = len(argv)
-+ if argc > 2:
-+ raise SyntaxError("Too many arguments.")
-+ locus_regexp = ""
-+ name_regexp = ""
-+ if argc >= 1:
-+ locus_regexp = argv[0]
-+ if argc >= 2:
-+ name_regexp = argv[1]
-+ return (
-+ validate_regexp(locus_regexp, "locus"),
-+ validate_regexp(name_regexp, "handler"),
-+ )
-+
-+
-+class InfoMissingDebugHanders(gdb.Command):
-+ """GDB command to list missing debug handlers.
-+
-+ Usage: info missing-debug-handlers [LOCUS-REGEXP [NAME-REGEXP]]
-+
-+ LOCUS-REGEXP is a regular expression matching the location of the
-+ handler. If it is omitted, all registered handlers from all
-+ loci are listed. A locus can be 'global', 'progspace' to list
-+ the handlers from the current progspace, or a regular expression
-+ matching filenames of progspaces.
-+
-+ NAME-REGEXP is a regular expression to filter missing debug
-+ handler names. If this omitted for a specified locus, then all
-+ registered handlers in the locus are listed.
-+ """
-+
-+ def __init__(self):
-+ super().__init__("info missing-debug-handlers", gdb.COMMAND_FILES)
-+
-+ def list_handlers(self, title, handlers, name_re):
-+ """Lists the missing debug handlers whose name matches regexp.
-+
-+ Arguments:
-+ title: The line to print before the list.
-+ handlers: The list of the missing debug handlers.
-+ name_re: handler name filter.
-+ """
-+ if not handlers:
-+ return
-+ print(title)
-+ for handler in handlers:
-+ if name_re.match(handler.name):
-+ print(
-+ " %s%s" % (handler.name, "" if handler.enabled else " [disabled]")
-+ )
-+
-+ def invoke(self, arg, from_tty):
-+ locus_re, name_re = parse_missing_debug_command_args(arg)
-+
-+ if locus_re.match("progspace") and locus_re.pattern != "":
-+ cp = gdb.current_progspace()
-+ self.list_handlers(
-+ "Progspace %s:" % cp.filename, cp.missing_debug_handlers, name_re
-+ )
-+
-+ for progspace in gdb.progspaces():
-+ filename = progspace.filename or ""
-+ if locus_re.match(filename):
-+ if filename == "":
-+ if progspace == gdb.current_progspace():
-+ msg = "Current Progspace:"
-+ else:
-+ msg = "Progspace <no-file>:"
-+ else:
-+ msg = "Progspace %s:" % filename
-+ self.list_handlers(
-+ msg,
-+ progspace.missing_debug_handlers,
-+ name_re,
-+ )
-+
-+ # Print global handlers last, as these are invoked last.
-+ if locus_re.match("global"):
-+ self.list_handlers("Global:", gdb.missing_debug_handlers, name_re)
-+
-+
-+def do_enable_handler1(handlers, name_re, flag):
-+ """Enable/disable missing debug handlers whose names match given regex.
-+
-+ Arguments:
-+ handlers: The list of missing debug handlers.
-+ name_re: Handler name filter.
-+ flag: A boolean indicating if we should enable or disable.
-+
-+ Returns:
-+ The number of handlers affected.
-+ """
-+ total = 0
-+ for handler in handlers:
-+ if name_re.match(handler.name) and handler.enabled != flag:
-+ handler.enabled = flag
-+ total += 1
-+ return total
-+
-+
-+def do_enable_handler(arg, flag):
-+ """Enable or disable missing debug handlers."""
-+ (locus_re, name_re) = parse_missing_debug_command_args(arg)
-+ total = 0
-+ if locus_re.match("global"):
-+ total += do_enable_handler1(gdb.missing_debug_handlers, name_re, flag)
-+ if locus_re.match("progspace") and locus_re.pattern != "":
-+ total += do_enable_handler1(
-+ gdb.current_progspace().missing_debug_handlers, name_re, flag
-+ )
-+ for progspace in gdb.progspaces():
-+ filename = progspace.filename or ""
-+ if locus_re.match(filename):
-+ total += do_enable_handler1(progspace.missing_debug_handlers, name_re, flag)
-+ print(
-+ "%d missing debug handler%s %s"
-+ % (total, "" if total == 1 else "s", "enabled" if flag else "disabled")
-+ )
-+
-+
-+class EnableMissingDebugHandler(gdb.Command):
-+ """GDB command to enable missing debug handlers.
-+
-+ Usage: enable missing-debug-handler [LOCUS-REGEXP [NAME-REGEXP]]
-+
-+ LOCUS-REGEXP is a regular expression specifying the handlers to
-+ enable. It can be 'global', 'progspace' for the current
-+ progspace, or the filename for a file associated with a progspace.
-+
-+ NAME_REGEXP is a regular expression to filter handler names. If
-+ this omitted for a specified locus, then all registered handlers
-+ in the locus are affected.
-+ """
-+
-+ def __init__(self):
-+ super().__init__("enable missing-debug-handler", gdb.COMMAND_FILES)
-+
-+ def invoke(self, arg, from_tty):
-+ """GDB calls this to perform the command."""
-+ do_enable_handler(arg, True)
-+
-+
-+class DisableMissingDebugHandler(gdb.Command):
-+ """GDB command to disable missing debug handlers.
-+
-+ Usage: disable missing-debug-handler [LOCUS-REGEXP [NAME-REGEXP]]
-+
-+ LOCUS-REGEXP is a regular expression specifying the handlers to
-+ enable. It can be 'global', 'progspace' for the current
-+ progspace, or the filename for a file associated with a progspace.
-+
-+ NAME_REGEXP is a regular expression to filter handler names. If
-+ this omitted for a specified locus, then all registered handlers
-+ in the locus are affected.
-+ """
-+
-+ def __init__(self):
-+ super().__init__("disable missing-debug-handler", gdb.COMMAND_FILES)
-+
-+ def invoke(self, arg, from_tty):
-+ """GDB calls this to perform the command."""
-+ do_enable_handler(arg, False)
-+
-+
-+def register_missing_debug_handler_commands():
-+ """Installs the missing debug handler commands."""
-+ InfoMissingDebugHanders()
-+ EnableMissingDebugHandler()
-+ DisableMissingDebugHandler()
-+
-+
-+register_missing_debug_handler_commands()
-diff --git a/gdb/python/lib/gdb/missing_debug.py b/gdb/python/lib/gdb/missing_debug.py
-new file mode 100644
---- /dev/null
-+++ b/gdb/python/lib/gdb/missing_debug.py
-@@ -0,0 +1,169 @@
-+# Copyright (C) 2023 Free Software Foundation, Inc.
-+
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 3 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program. If not, see <http://www.gnu.org/licenses/>.
-+
-+"""
-+MissingDebugHandler base class, and register_handler function.
-+"""
-+
-+import gdb
-+
-+
-+def _validate_name(name):
-+ """Validate a missing debug handler name string.
-+
-+ If name is valid as a missing debug handler name, then this
-+ function does nothing. If name is not valid then an exception is
-+ raised.
-+
-+ Arguments:
-+ name: A string, the name of a missing debug handler.
-+
-+ Returns:
-+ Nothing.
-+
-+ Raises:
-+ ValueError: If name is invalid as a missing debug handler
-+ name.
-+ """
-+ for ch in name:
-+ if not ch.isascii() or not (ch.isalnum() or ch in "_-"):
-+ raise ValueError("invalid character '%s' in handler name: %s" % (ch, name))
-+
-+
-+class MissingDebugHandler(object):
-+ """Base class for missing debug handlers written in Python.
-+
-+ A missing debug handler has a single method __call__ along with
-+ the read/write attribute enabled, and a read-only attribute name.
-+
-+ Attributes:
-+ name: Read-only attribute, the name of this handler.
-+ enabled: When true this handler is enabled.
-+ """
-+
-+ def __init__(self, name):
-+ """Constructor.
-+
-+ Args:
-+ name: An identifying name for this handler.
-+
-+ Raises:
-+ TypeError: name is not a string.
-+ ValueError: name contains invalid characters.
-+ """
-+
-+ if not isinstance(name, str):
-+ raise TypeError("incorrect type for name: %s" % type(name))
-+
-+ _validate_name(name)
-+
-+ self._name = name
-+ self._enabled = True
-+
-+ @property
-+ def name(self):
-+ return self._name
-+
-+ @property
-+ def enabled(self):
-+ return self._enabled
-+
-+ @enabled.setter
-+ def enabled(self, value):
-+ if not isinstance(value, bool):
-+ raise TypeError("incorrect type for enabled attribute: %s" % type(value))
-+ self._enabled = value
-+
-+ def __call__(self, objfile):
-+ """GDB handle missing debug information for an objfile.
-+
-+ Arguments:
-+ objfile: A gdb.Objfile for which GDB could not find any
-+ debug information.
-+
-+ Returns:
-+ True: GDB should try again to locate the debug information
-+ for objfile, the handler may have installed the
-+ missing information.
-+ False: GDB should move on without the debug information
-+ for objfile.
-+ A string: GDB should load the file at the given path; it
-+ contains the debug information for objfile.
-+ None: This handler can't help with objfile. GDB should
-+ try any other registered handlers.
-+ """
-+ raise NotImplementedError("MissingDebugHandler.__call__()")
-+
-+
-+def register_handler(locus, handler, replace=False):
-+ """Register handler in given locus.
-+
-+ The handler is prepended to the locus's missing debug handlers
-+ list. The name of handler should be unique (or replace must be
-+ True).
-+
-+ Arguments:
-+ locus: Either a progspace, or None (in which case the unwinder
-+ is registered globally).
-+ handler: An object of a gdb.MissingDebugHandler subclass.
-+
-+ replace: If True, replaces existing handler with the same name
-+ within locus. Otherwise, raises RuntimeException if
-+ unwinder with the same name already exists.
-+
-+ Returns:
-+ Nothing.
-+
-+ Raises:
-+ RuntimeError: The name of handler is not unique.
-+ TypeError: Bad locus type.
-+ AttributeError: Required attributes of handler are missing.
-+ """
-+
-+ if locus is None:
-+ if gdb.parameter("verbose"):
-+ gdb.write("Registering global %s handler ...\n" % handler.name)
-+ locus = gdb
-+ elif isinstance(locus, gdb.Progspace):
-+ if gdb.parameter("verbose"):
-+ gdb.write(
-+ "Registering %s handler for %s ...\n" % (handler.name, locus.filename)
-+ )
-+ else:
-+ raise TypeError("locus should be gdb.Progspace or None")
-+
-+ # Some sanity checks on HANDLER. Calling getattr will raise an
-+ # exception if the attribute doesn't exist, which is what we want.
-+ # These checks are not exhaustive; we don't check the attributes
-+ # have the correct types, or the method has the correct signature,
-+ # but this should catch some basic mistakes.
-+ getattr(handler, "name")
-+ getattr(handler, "enabled")
-+ call_method = getattr(handler, "__call__")
-+ if not callable(call_method):
-+ raise AttributeError(
-+ "'%s' object's '__call__' attribute is not callable"
-+ % type(handler).__name__
-+ )
-+
-+ i = 0
-+ for needle in locus.missing_debug_handlers:
-+ if needle.name == handler.name:
-+ if replace:
-+ del locus.missing_debug_handlers[i]
-+ else:
-+ raise RuntimeError("Handler %s already exists." % handler.name)
-+ i += 1
-+ locus.missing_debug_handlers.insert(0, handler)
-diff --git a/gdb/python/py-progspace.c b/gdb/python/py-progspace.c
---- a/gdb/python/py-progspace.c
-+++ b/gdb/python/py-progspace.c
-@@ -54,6 +54,9 @@ struct pspace_object
-
- /* The debug method list. */
- PyObject *xmethods;
-+
-+ /* The missing debug handler list. */
-+ PyObject *missing_debug_handlers;
- };
-
- extern PyTypeObject pspace_object_type
-@@ -163,6 +166,7 @@ pspy_dealloc (PyObject *self)
- Py_XDECREF (ps_self->frame_unwinders);
- Py_XDECREF (ps_self->type_printers);
- Py_XDECREF (ps_self->xmethods);
-+ Py_XDECREF (ps_self->missing_debug_handlers);
- Py_TYPE (self)->tp_free (self);
- }
-
-@@ -198,6 +202,10 @@ pspy_initialize (pspace_object *self)
- if (self->xmethods == NULL)
- return 0;
-
-+ self->missing_debug_handlers = PyList_New (0);
-+ if (self->missing_debug_handlers == nullptr)
-+ return 0;
-+
- return 1;
- }
-
-@@ -352,6 +360,47 @@ pspy_get_xmethods (PyObject *o, void *ignore)
- return self->xmethods;
- }
-
-+/* Return the list of missing debug handlers for this program space. */
-+
-+static PyObject *
-+pspy_get_missing_debug_handlers (PyObject *o, void *ignore)
-+{
-+ pspace_object *self = (pspace_object *) o;
-+
-+ Py_INCREF (self->missing_debug_handlers);
-+ return self->missing_debug_handlers;
-+}
-+
-+/* Set this program space's list of missing debug handlers to HANDLERS. */
-+
-+static int
-+pspy_set_missing_debug_handlers (PyObject *o, PyObject *handlers,
-+ void *ignore)
-+{
-+ pspace_object *self = (pspace_object *) o;
-+
-+ if (handlers == nullptr)
-+ {
-+ PyErr_SetString (PyExc_TypeError,
-+ "cannot delete the missing debug handlers list");
-+ return -1;
-+ }
-+
-+ if (!PyList_Check (handlers))
-+ {
-+ PyErr_SetString (PyExc_TypeError,
-+ "the missing debug handlers attribute must be a list");
-+ return -1;
-+ }
-+
-+ /* Take care in case the LHS and RHS are related somehow. */
-+ gdbpy_ref<> tmp (self->missing_debug_handlers);
-+ Py_INCREF (handlers);
-+ self->missing_debug_handlers = handlers;
-+
-+ return 0;
-+}
-+
- /* Set the 'type_printers' attribute. */
-
- static int
-@@ -744,6 +793,8 @@ static gdb_PyGetSetDef pspace_getset[] =
- "Type printers.", NULL },
- { "xmethods", pspy_get_xmethods, NULL,
- "Debug methods.", NULL },
-+ { "missing_debug_handlers", pspy_get_missing_debug_handlers,
-+ pspy_set_missing_debug_handlers, "Missing debug handlers.", NULL },
- { NULL }
- };
-
-diff --git a/gdb/python/python.c b/gdb/python/python.c
---- a/gdb/python/python.c
-+++ b/gdb/python/python.c
-@@ -124,7 +124,9 @@ static enum ext_lang_rc gdbpy_before_prompt_hook
- static gdb::optional<std::string> gdbpy_colorize
- (const std::string &filename, const std::string &contents);
- static gdb::optional<std::string> gdbpy_colorize_disasm
-- (const std::string &content, gdbarch *gdbarch);
-+(const std::string &content, gdbarch *gdbarch);
-+static ext_lang_missing_debuginfo_result gdbpy_handle_missing_debuginfo
-+ (const struct extension_language_defn *extlang, struct objfile *objfile);
-
- /* The interface between gdb proper and loading of python scripts. */
-
-@@ -170,6 +172,8 @@ static const struct extension_language_ops python_extension_ops =
- gdbpy_colorize_disasm,
-
- gdbpy_print_insn,
-+
-+ gdbpy_handle_missing_debuginfo
- };
-
- #endif /* HAVE_PYTHON */
-@@ -1661,6 +1665,83 @@ gdbpy_get_current_objfile (PyObject *unused1, PyObject *unused2)
- return objfile_to_objfile_object (gdbpy_current_objfile).release ();
- }
-
-+/* Implement the 'handle_missing_debuginfo' hook for Python. GDB has
-+ failed to find any debug information for OBJFILE. The extension has a
-+ chance to record this, or even install the required debug information.
-+ See the description of ext_lang_missing_debuginfo_result in
-+ extension-priv.h for details of the return value. */
-+
-+static ext_lang_missing_debuginfo_result
-+gdbpy_handle_missing_debuginfo (const struct extension_language_defn *extlang,
-+ struct objfile *objfile)
-+{
-+ /* Early exit if Python is not initialised. */
-+ if (!gdb_python_initialized)
-+ return {};
-+
-+ struct gdbarch *gdbarch = objfile->arch ();
-+
-+ gdbpy_enter enter_py (gdbarch);
-+
-+ /* Convert OBJFILE into the corresponding Python object. */
-+ gdbpy_ref<> pyo_objfile = objfile_to_objfile_object (objfile);
-+ if (pyo_objfile == nullptr)
-+ {
-+ gdbpy_print_stack ();
-+ return {};
-+ }
-+
-+ /* Lookup the helper function within the GDB module. */
-+ gdbpy_ref<> pyo_handler
-+ (PyObject_GetAttrString (gdb_python_module, "_handle_missing_debuginfo"));
-+ if (pyo_handler == nullptr)
-+ {
-+ gdbpy_print_stack ();
-+ return {};
-+ }
-+
-+ /* Call the function, passing in the Python objfile object. */
-+ gdbpy_ref<> pyo_execute_ret
-+ (PyObject_CallFunctionObjArgs (pyo_handler.get (), pyo_objfile.get (),
-+ nullptr));
-+ if (pyo_execute_ret == nullptr)
-+ {
-+ /* If the handler is cancelled due to a Ctrl-C, then propagate
-+ the Ctrl-C as a GDB exception instead of swallowing it. */
-+ gdbpy_print_stack_or_quit ();
-+ return {};
-+ }
-+
-+ /* Parse the result, and convert it back to the C++ object. */
-+ if (pyo_execute_ret == Py_None)
-+ return {};
-+
-+ if (PyBool_Check (pyo_execute_ret.get ()))
-+ {
-+ bool try_again = PyObject_IsTrue (pyo_execute_ret.get ());
-+ return ext_lang_missing_debuginfo_result (try_again);
-+ }
-+
-+ if (!gdbpy_is_string (pyo_execute_ret.get ()))
-+ {
-+ PyErr_SetString (PyExc_ValueError,
-+ "return value from _handle_missing_debuginfo should "
-+ "be None, a Bool, or a String");
-+ gdbpy_print_stack ();
-+ return {};
-+ }
-+
-+ gdb::unique_xmalloc_ptr<char> filename
-+ = python_string_to_host_string (pyo_execute_ret.get ());
-+ if (filename == nullptr)
-+ {
-+ gdbpy_print_stack ();
-+ return {};
-+ }
-+
-+ return ext_lang_missing_debuginfo_result (std::string (filename.get ()));
-+}
-+
- /* Compute the list of active python type printers and store them in
- EXT_PRINTERS->py_type_printers. The product of this function is used by
- gdbpy_apply_type_printers, and freed by gdbpy_free_type_printers.
-diff --git a/gdb/testsuite/gdb.python/py-missing-debug.c b/gdb/testsuite/gdb.python/py-missing-debug.c
-new file mode 100644
---- /dev/null
-+++ b/gdb/testsuite/gdb.python/py-missing-debug.c
-@@ -0,0 +1,22 @@
-+/* This test program is part of GDB, the GNU debugger.
-+
-+ Copyright 2023 Free Software Foundation, Inc.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
-+
-+int
-+main ()
-+{
-+ return 0;
-+}
-diff --git a/gdb/testsuite/gdb.python/py-missing-debug.exp b/gdb/testsuite/gdb.python/py-missing-debug.exp
-new file mode 100644
---- /dev/null
-+++ b/gdb/testsuite/gdb.python/py-missing-debug.exp
-@@ -0,0 +1,473 @@
-+# Copyright (C) 2023 Free Software Foundation, Inc.
-+
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 3 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program. If not, see <http://www.gnu.org/licenses/>.
-+
-+load_lib gdb-python.exp
-+
-+require allow_python_tests
-+
-+standard_testfile
-+
-+if {[build_executable "failed to prepare" ${testfile} ${srcfile}]} {
-+ return -1
-+}
-+
-+# Remove debug information from BINFILE and place it into
-+# BINFILE.debug.
-+if {[gdb_gnu_strip_debug $binfile]} {
-+ unsupported "cannot produce separate debug info files"
-+ return -1
-+}
-+
-+set remote_python_file \
-+ [gdb_remote_download host ${srcdir}/${subdir}/${testfile}.py]
-+
-+set debug_filename ${binfile}.debug
-+set hidden_filename ${binfile}.hidden
-+
-+# Start GDB.
-+clean_restart
-+
-+# Some initial sanity checks; initially, we can find the debug information
-+# (this will use the .gnu_debuglink), then after we move the debug
-+# information, reload the executable, now the debug can't be found.
-+with_test_prefix "initial checks" {
-+ # Load BINFILE, we should find the separate debug information.
-+ gdb_file_cmd $binfile
-+ gdb_assert {$gdb_file_cmd_debug_info == "debug"} \
-+ "debug info is found"
-+
-+ # Rename the debug information file, re-load BINFILE, GDB should fail
-+ # to find the debug information
-+ remote_exec build "mv $debug_filename $hidden_filename"
-+ gdb_file_cmd $binfile
-+ gdb_assert {$gdb_file_cmd_debug_info == "nodebug"} \
-+ "debug info no longer found"
-+}
-+
-+# Load the Python script into GDB.
-+gdb_test "source $remote_python_file" "^Success" \
-+ "source python script"
-+
-+# Setup the separate debug info directory. This isn't actually needed until
-+# some of the later tests, but might as well get this done now.
-+set debug_directory [standard_output_file "debug-dir"]
-+remote_exec build "mkdir -p $debug_directory"
-+gdb_test_no_output "set debug-file-directory $debug_directory" \
-+ "set debug-file-directory"
-+
-+# Initially the missing debug handler we install is in a mode where it
-+# returns None, indicating that it can't help locate the debug information.
-+# Check this works as expected.
-+with_test_prefix "handler returning None" {
-+ gdb_test_no_output \
-+ "python gdb.missing_debug.register_handler(None, handler_obj)" \
-+ "register the initial handler"
-+
-+ gdb_file_cmd $binfile
-+ gdb_assert {$gdb_file_cmd_debug_info == "nodebug"} \
-+ "debug info not found"
-+
-+ # Check the handler was only called once.
-+ gdb_test "python print(handler_obj.call_count)" "^1" \
-+ "check handler was only called once"
-+}
-+
-+# Now configure the handler to move the debug file back to the
-+# .gnu_debuglink location and then return True, this will cause GDB to
-+# recheck, at which point it should find the debug info.
-+with_test_prefix "handler in gnu_debuglink mode" {
-+ gdb_test_no_output "python handler_obj.set_mode(Mode.RETURN_TRUE, \
-+ \"$hidden_filename\", \
-+ \"$debug_filename\")" \
-+ "confirgure handler"
-+ gdb_file_cmd $binfile
-+ gdb_assert {$gdb_file_cmd_debug_info == "debug"} "debug info found"
-+
-+ # Check the handler was only called once.
-+ gdb_test "python print(handler_obj.call_count)" "^1" \
-+ "check handler was only called once"
-+}
-+
-+# Setup a directory structure based on the build-id of BINFILE, but don't
-+# move the debug information into place just yet.
-+#
-+# Instead, configure the handler to move the debug info into the build-id
-+# directory.
-+#
-+# Reload BINFILE, at which point the handler will move the debug info into
-+# the build-id directory and return True, GDB will then recheck for the
-+# debug information, and should find it.
-+with_test_prefix "handler in build-id mode" {
-+ # Move the debug file out of the way once more.
-+ remote_exec build "mv $debug_filename $hidden_filename"
-+
-+ # Create the build-id based directory in which the debug information
-+ # will be placed.
-+ set build_id_filename \
-+ $debug_directory/[build_id_debug_filename_get $binfile]
-+ remote_exec build "mkdir -p [file dirname $build_id_filename]"
-+
-+ # Configure the handler to move the debug info into the build-id dir.
-+ gdb_test_no_output "python handler_obj.set_mode(Mode.RETURN_TRUE, \
-+ \"$hidden_filename\", \
-+ \"$build_id_filename\")" \
-+ "confirgure handler"
-+
-+ # Reload the binary and check the debug information is found.
-+ gdb_file_cmd $binfile
-+ gdb_assert {$gdb_file_cmd_debug_info == "debug"} "debug info found"
-+
-+ # Check the handler was only called once.
-+ gdb_test "python print(handler_obj.call_count)" "^1" \
-+ "check handler was only called once"
-+}
-+
-+# Move the debug information back to a hidden location and configure the
-+# handler to return the filename of the hidden debug info location. GDB
-+# should immediately use this file as the debug information.
-+with_test_prefix "handler returning a string" {
-+ remote_exec build "mv $build_id_filename $hidden_filename"
-+
-+ # Configure the handler return a filename string.
-+ gdb_test_no_output "python handler_obj.set_mode(Mode.RETURN_STRING, \
-+ \"$hidden_filename\")" \
-+ "confirgure handler"
-+
-+ # Reload the binary and check the debug information is found.
-+ gdb_file_cmd $binfile
-+ gdb_assert {$gdb_file_cmd_debug_info == "debug"} "debug info found"
-+
-+ # Check the handler was only called once.
-+ gdb_test "python print(handler_obj.call_count)" "^1" \
-+ "check handler was only called once"
-+}
-+
-+# Register another global handler, this one raises an exception. Reload the
-+# debug information, the bad handler should be invoked first, which raises
-+# an excetption, at which point GDB should skip further Python handlers.
-+with_test_prefix "handler raises an exception" {
-+ gdb_test_no_output \
-+ "python gdb.missing_debug.register_handler(None, rhandler)"
-+
-+ foreach_with_prefix exception_type {gdb.GdbError TypeError} {
-+ gdb_test_no_output \
-+ "python rhandler.exception_type = $exception_type"
-+
-+ gdb_file_cmd $binfile
-+ gdb_assert {$gdb_file_cmd_debug_info == "nodebug"} \
-+ "debug info not found"
-+
-+ set re [string_to_regexp \
-+ "Python Exception <class '$exception_type'>: message"]
-+ gdb_assert {[regexp $re $gdb_file_cmd_msg]} \
-+ "check for exception in file command output"
-+
-+ # Our original handler is still registered, but should not have been
-+ # called again (as the exception occurs first).
-+ gdb_test "python print(handler_obj.call_count)" "^1" \
-+ "check good handler hasn't been called again"
-+ }
-+}
-+
-+gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Global:" \
-+ " exception_handler" \
-+ " handler"] \
-+ "check both handlers are visible"
-+
-+# Re-start GDB.
-+clean_restart
-+
-+# Load the Python script into GDB.
-+gdb_test "source $remote_python_file" "^Success" \
-+ "source python script for bad handler name checks"
-+
-+# Attempt to register a missing-debug-handler with NAME. The expectation is
-+# that this should fail as NAME contains some invalid characters.
-+proc check_bad_name {name} {
-+ set name_re [string_to_regexp $name]
-+ set re \
-+ [multi_line \
-+ "ValueError: invalid character '.' in handler name: $name_re" \
-+ "Error while executing Python code\\."]
-+
-+ gdb_test "python register(\"$name\")" $re \
-+ "check that '$name' is not accepted"
-+}
-+
-+# We don't attempt to be exhaustive here, just check a few random examples
-+# of invalid names.
-+check_bad_name "!! Bad Name"
-+check_bad_name "Bad Name"
-+check_bad_name "(Bad Name)"
-+check_bad_name "Bad \[Name\]"
-+check_bad_name "Bad,Name"
-+check_bad_name "Bad;Name"
-+
-+# Check that there are no handlers registered.
-+gdb_test_no_output "info missing-debug-handlers" \
-+ "check no handlers are registered"
-+
-+# Check we can use the enable/disable commands where there are no handlers
-+# registered.
-+gdb_test "enable missing-debug-handler foo" \
-+ "^0 missing debug handlers enabled"
-+gdb_test "disable missing-debug-handler foo" \
-+ "^0 missing debug handlers disabled"
-+
-+# Grab the current program space object, used for registering handler later.
-+gdb_test_no_output "python pspace = gdb.selected_inferior().progspace"
-+
-+# Now register some handlers.
-+foreach hspec {{\"Foo\" None}
-+ {\"-bar\" None}
-+ {\"baz-\" pspace}
-+ {\"abc-def\" pspace}} {
-+ lassign $hspec name locus
-+ gdb_test "python register($name, $locus)"
-+}
-+
-+with_test_prefix "all handlers enabled" {
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Current Progspace:" \
-+ " abc-def" \
-+ " baz-" \
-+ "Global:" \
-+ " -bar" \
-+ " Foo"]
-+
-+ gdb_file_cmd $binfile
-+ gdb_test "python print(handler_call_log)" \
-+ [string_to_regexp {['abc-def', 'baz-', '-bar', 'Foo']}]
-+ gdb_test_no_output "python handler_call_log = \[\]" \
-+ "reset call log"
-+}
-+
-+with_test_prefix "disable 'baz-'" {
-+ gdb_test "disable missing-debug-handler progspace baz-" \
-+ "^1 missing debug handler disabled"
-+
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Progspace \[^\r\n\]+:" \
-+ " abc-def" \
-+ " baz- \\\[disabled\\\]" \
-+ "Global:" \
-+ " -bar" \
-+ " Foo"]
-+
-+ gdb_file_cmd $binfile
-+ gdb_test "python print(handler_call_log)" \
-+ [string_to_regexp {['abc-def', '-bar', 'Foo']}]
-+ gdb_test_no_output "python handler_call_log = \[\]" \
-+ "reset call log"
-+}
-+
-+with_test_prefix "disable 'Foo'" {
-+ gdb_test "disable missing-debug-handler .* Foo" \
-+ "^1 missing debug handler disabled"
-+
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Progspace \[^\r\n\]+:" \
-+ " abc-def" \
-+ " baz- \\\[disabled\\\]" \
-+ "Global:" \
-+ " -bar" \
-+ " Foo \\\[disabled\\\]"]
-+
-+ gdb_file_cmd $binfile
-+ gdb_test "python print(handler_call_log)" \
-+ [string_to_regexp {['abc-def', '-bar']}]
-+ gdb_test_no_output "python handler_call_log = \[\]" \
-+ "reset call log"
-+}
-+
-+with_test_prefix "disable everything" {
-+ gdb_test "disable missing-debug-handler .* .*" \
-+ "^2 missing debug handlers disabled"
-+
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Progspace \[^\r\n\]+:" \
-+ " abc-def \\\[disabled\\\]" \
-+ " baz- \\\[disabled\\\]" \
-+ "Global:" \
-+ " -bar \\\[disabled\\\]" \
-+ " Foo \\\[disabled\\\]"]
-+
-+ gdb_file_cmd $binfile
-+ gdb_test "python print(handler_call_log)" \
-+ [string_to_regexp {[]}]
-+ gdb_test_no_output "python handler_call_log = \[\]" \
-+ "reset call log"
-+}
-+
-+with_test_prefix "enable 'abc-def'" {
-+ set re [string_to_regexp $binfile]
-+
-+ gdb_test "enable missing-debug-handler \"$re\" abc-def" \
-+ "^1 missing debug handler enabled"
-+
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Progspace \[^\r\n\]+:" \
-+ " abc-def" \
-+ " baz- \\\[disabled\\\]" \
-+ "Global:" \
-+ " -bar \\\[disabled\\\]" \
-+ " Foo \\\[disabled\\\]"]
-+
-+ gdb_file_cmd $binfile
-+ gdb_test "python print(handler_call_log)" \
-+ [string_to_regexp {['abc-def']}]
-+ gdb_test_no_output "python handler_call_log = \[\]" \
-+ "reset call log"
-+}
-+
-+with_test_prefix "enable global handlers" {
-+ set re [string_to_regexp $binfile]
-+
-+ gdb_test "enable missing-debug-handler global" \
-+ "^2 missing debug handlers enabled"
-+
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Progspace \[^\r\n\]+:" \
-+ " abc-def" \
-+ " baz- \\\[disabled\\\]" \
-+ "Global:" \
-+ " -bar" \
-+ " Foo"]
-+
-+ gdb_file_cmd $binfile
-+ gdb_test "python print(handler_call_log)" \
-+ [string_to_regexp {['abc-def', '-bar', 'Foo']}]
-+ gdb_test_no_output "python handler_call_log = \[\]" \
-+ "reset call log"
-+}
-+
-+# Add handler_obj to the global handler list, and configure it to
-+# return False. We should call all of the program space specific
-+# handlers (which return None), and then call handler_obj from the
-+# global list, which returns False, at which point we shouldn't call
-+# anyone else.
-+with_test_prefix "return False handler in progspace list" {
-+ gdb_test "enable missing-debug-handler progspace" \
-+ "^1 missing debug handler enabled"
-+
-+ gdb_test_no_output \
-+ "python gdb.missing_debug.register_handler(None, handler_obj)" \
-+ "register the initial handler"
-+
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Progspace \[^\r\n\]+:" \
-+ " abc-def" \
-+ " baz-" \
-+ "Global:" \
-+ " handler" \
-+ " -bar" \
-+ " Foo"]
-+
-+ gdb_test_no_output "python handler_obj.set_mode(Mode.RETURN_FALSE)" \
-+ "confirgure handler"
-+
-+ gdb_file_cmd $binfile
-+ gdb_test "python print(handler_call_log)" \
-+ [string_to_regexp {['abc-def', 'baz-', 'handler']}]
-+ gdb_test_no_output "python handler_call_log = \[\]" \
-+ "reset call log"
-+}
-+
-+# Now add handler_obj to the current program space's handler list. We
-+# use the same handler object here, that's fine. We should only see a
-+# call to the first handler object in the call log.
-+with_test_prefix "return False handler in global list" {
-+ gdb_test_no_output \
-+ "python gdb.missing_debug.register_handler(pspace, handler_obj)" \
-+ "register the initial handler"
-+
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Progspace \[^\r\n\]+:" \
-+ " handler" \
-+ " abc-def" \
-+ " baz-" \
-+ "Global:" \
-+ " handler" \
-+ " -bar" \
-+ " Foo"]
-+
-+ gdb_file_cmd $binfile
-+ gdb_test "python print(handler_call_log)" \
-+ [string_to_regexp {['handler']}]
-+ gdb_test_no_output "python handler_call_log = \[\]" \
-+ "reset call log"
-+}
-+
-+with_test_prefix "check handler replacement" {
-+ # First, check we can have the same name appear in both program
-+ # space and global lists without giving an error.
-+ gdb_test_no_output "python register(\"Foo\", pspace)"
-+
-+ gdb_test "info missing-debug-handlers" \
-+ [multi_line \
-+ "Progspace \[^\r\n\]+:" \
-+ " Foo" \
-+ " handler" \
-+ " abc-def" \
-+ " baz-" \
-+ "Global:" \
-+ " handler" \
-+ " -bar" \
-+ " Foo"]
-+
-+ # Now check that we get an error if we try to add a handler with
-+ # the same name.
-+ gdb_test "python gdb.missing_debug.register_handler(pspace, log_handler(\"Foo\"))" \
-+ [multi_line \
-+ "RuntimeError: Handler Foo already exists\\." \
-+ "Error while executing Python code\\."]
-+
-+ gdb_test "python gdb.missing_debug.register_handler(handler=log_handler(\"Foo\"), locus=pspace)" \
-+ [multi_line \
-+ "RuntimeError: Handler Foo already exists\\." \
-+ "Error while executing Python code\\."]
-+
-+ # And now try again, but this time with 'replace=True', we
-+ # shouldn't get an error in this case.
-+ gdb_test_no_output \
-+ "python gdb.missing_debug.register_handler(pspace, log_handler(\"Foo\"), replace=True)"
-+
-+ gdb_test_no_output \
-+ "python gdb.missing_debug.register_handler(handler=log_handler(\"Foo\"), locus=None, replace=True)"
-+
-+ # Now disable a handler and check we still need to use 'replace=True'.
-+ gdb_test "disable missing-debug-handler progspace Foo" \
-+ "^1 missing debug handler disabled"
-+
-+ gdb_test "python gdb.missing_debug.register_handler(pspace, log_handler(\"Foo\"))" \
-+ [multi_line \
-+ "RuntimeError: Handler Foo already exists\\." \
-+ "Error while executing Python code\\."] \
-+ "still get an error when handler is disabled"
-+
-+ gdb_test_no_output \
-+ "python gdb.missing_debug.register_handler(pspace, log_handler(\"Foo\"), replace=True)" \
-+ "can replace a disabled handler"
-+}
-diff --git a/gdb/testsuite/gdb.python/py-missing-debug.py b/gdb/testsuite/gdb.python/py-missing-debug.py
-new file mode 100644
---- /dev/null
-+++ b/gdb/testsuite/gdb.python/py-missing-debug.py
-@@ -0,0 +1,120 @@
-+# Copyright (C) 2023 Free Software Foundation, Inc.
-+
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 3 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program. If not, see <http://www.gnu.org/licenses/>.
-+
-+import gdb
-+from gdb.missing_debug import MissingDebugHandler
-+from enum import Enum
-+import os
-+
-+# A global log that is filled in by instances of the LOG_HANDLER class
-+# when they are called.
-+handler_call_log = []
-+
-+
-+class Mode(Enum):
-+ RETURN_NONE = 0
-+ RETURN_TRUE = 1
-+ RETURN_FALSE = 2
-+ RETURN_STRING = 3
-+
-+
-+class handler(MissingDebugHandler):
-+ def __init__(self):
-+ super().__init__("handler")
-+ self._call_count = 0
-+ self._mode = Mode.RETURN_NONE
-+
-+ def __call__(self, objfile):
-+ global handler_call_log
-+ handler_call_log.append(self.name)
-+ self._call_count += 1
-+ if self._mode == Mode.RETURN_NONE:
-+ return None
-+
-+ if self._mode == Mode.RETURN_TRUE:
-+ os.rename(self._src, self._dest)
-+ return True
-+
-+ if self._mode == Mode.RETURN_FALSE:
-+ return False
-+
-+ if self._mode == Mode.RETURN_STRING:
-+ return self._dest
-+
-+ assert False
-+
-+ @property
-+ def call_count(self):
-+ """Return a count, the number of calls to __call__ since the last
-+ call to set_mode.
-+ """
-+ return self._call_count
-+
-+ def set_mode(self, mode, *args):
-+ self._call_count = 0
-+ self._mode = mode
-+
-+ if mode == Mode.RETURN_NONE:
-+ assert len(args) == 0
-+ return
-+
-+ if mode == Mode.RETURN_TRUE:
-+ assert len(args) == 2
-+ self._src = args[0]
-+ self._dest = args[1]
-+ return
-+
-+ if mode == Mode.RETURN_FALSE:
-+ assert len(args) == 0
-+ return
-+
-+ if mode == Mode.RETURN_STRING:
-+ assert len(args) == 1
-+ self._dest = args[0]
-+ return
-+
-+ assert False
-+
-+
-+class exception_handler(MissingDebugHandler):
-+ def __init__(self):
-+ super().__init__("exception_handler")
-+ self.exception_type = None
-+
-+ def __call__(self, objfile):
-+ global handler_call_log
-+ handler_call_log.append(self.name)
-+ assert self.exception_type is not None
-+ raise self.exception_type("message")
-+
-+
-+class log_handler(MissingDebugHandler):
-+ def __call__(self, objfile):
-+ global handler_call_log
-+ handler_call_log.append(self.name)
-+ return None
-+
-+
-+# A basic helper function, this keeps lines shorter in the TCL script.
-+def register(name, locus=None):
-+ gdb.missing_debug.register_handler(locus, log_handler(name))
-+
-+
-+# Create instances of the handlers, but don't install any. We install
-+# these as needed from the TCL script.
-+rhandler = exception_handler()
-+handler_obj = handler()
-+
-+print("Success")
diff --git a/gdb-add-rpm-suggestion-script.patch b/gdb-add-rpm-suggestion-script.patch
index 94a4745..731aeaa 100644
--- a/gdb-add-rpm-suggestion-script.patch
+++ b/gdb-add-rpm-suggestion-script.patch
@@ -14,7 +14,7 @@ suggests debuginfo RPMs to install.
diff --git a/gdb/data-directory/Makefile.in b/gdb/data-directory/Makefile.in
--- a/gdb/data-directory/Makefile.in
+++ b/gdb/data-directory/Makefile.in
-@@ -86,6 +86,7 @@ PYTHON_FILE_LIST = \
+@@ -89,6 +89,7 @@ PYTHON_FILE_LIST = \
gdb/command/missing_debug.py \
gdb/command/pretty_printers.py \
gdb/command/prompt.py \
@@ -164,9 +164,9 @@ new file mode 100644
diff --git a/gdb/testsuite/gdb.python/py-missing-debug.py b/gdb/testsuite/gdb.python/py-missing-debug.py
--- a/gdb/testsuite/gdb.python/py-missing-debug.py
+++ b/gdb/testsuite/gdb.python/py-missing-debug.py
-@@ -18,6 +18,13 @@ from gdb.missing_debug import MissingDebugHandler
- from enum import Enum
- import os
+@@ -19,6 +19,13 @@ from enum import Enum
+ import gdb
+ from gdb.missing_debug import MissingDebugHandler
+# This is a RHEL/Fedora work around: There's already a
+# missing-debug-info handler registered for these versions of GDB.
diff --git a/gdb-do-not-import-py-curses-ascii-module.patch b/gdb-do-not-import-py-curses-ascii-module.patch
deleted file mode 100644
index 40e544b..0000000
--- a/gdb-do-not-import-py-curses-ascii-module.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Tom de Vries <tdevries@suse.de>
-Date: Wed, 22 Nov 2023 19:02:34 +0100
-Subject: gdb-do-not-import-py-curses-ascii-module.patch
-
-;; Backport upstream commit e8c3dafa5f5.
-
-[gdb/python] Don't import curses.ascii module unless necessary
-
-I ran into a failure in test-case gdb.python/py-missing-debug.exp with python
-3.6, which was fixed by commit 7db795bc67a ("gdb/python: remove use of
-str.isascii()").
-
-However, I subsequently ran into a failure with python 3.11:
-...
-(gdb) PASS: $exp: initial checks: debug info no longer found
-source py-missing-debug.py^M
-Traceback (most recent call last):^M
- File "py-missing-debug.py", line 17, in <module>^M
- from gdb.missing_debug import MissingDebugHandler^M
- File "missing_debug.py", line 21, in <module>^M
- from curses.ascii import isascii, isalnum^M
- File "/usr/lib64/python3.11/_import_failed/curses.py", line 16, in <module>^M
- raise ImportError(f"""Module '{failed_name}' is not installed.^M
-ImportError: Module 'curses' is not installed.^M
-Use:^M
- sudo zypper install python311-curses^M
-to install it.^M
-(gdb) FAIL: $exp: source python script
-...
-
-Apparently I have the curses module installed for 3.6, but not 3.11.
-
-I could just install it, but the test-case worked fine with 3.11 before commit
-7db795bc67a.
-
-Fix this by only using the curses module when necessary, for python <= 3.7.
-
-Tested on x86_64-linux, with both python 3.6 and 3.11.
-
-diff --git a/gdb/python/lib/gdb/missing_debug.py b/gdb/python/lib/gdb/missing_debug.py
---- a/gdb/python/lib/gdb/missing_debug.py
-+++ b/gdb/python/lib/gdb/missing_debug.py
-@@ -18,8 +18,18 @@ MissingDebugHandler base class, and register_handler function.
- """
-
- import gdb
--from curses.ascii import isascii, isalnum
--
-+import sys
-+if sys.version_info >= (3, 7):
-+ # Functions str.isascii() and str.isalnum are available starting Python
-+ # 3.7.
-+ def isascii(ch):
-+ return ch.isascii()
-+ def isalnum(ch):
-+ return ch.isalnum()
-+else:
-+ # Fall back to curses.ascii.isascii() and curses.ascii.isalnum() for
-+ # earlier versions.
-+ from curses.ascii import isascii, isalnum
-
- def _validate_name(name):
- """Validate a missing debug handler name string.
diff --git a/gdb-ftbs-swapped-calloc-args.patch b/gdb-ftbs-swapped-calloc-args.patch
deleted file mode 100644
index 3486c8e..0000000
--- a/gdb-ftbs-swapped-calloc-args.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Kevin Buettner <kevinb@redhat.com>
-Date: Wed, 17 Jan 2024 12:53:53 -0700
-Subject: gdb-ftbs-swapped-calloc-args.patch
-
-Backport upstream commit 54195469c18ec9873cc5ba6907f768509473fa9b
-which fixes a build problem in which arguments to calloc were swapped.
-
-[opcodes] ARC + PPC: Fix -Walloc-size warnings
-
-Recently, -Walloc-size warnings started to kick in. Fix these two
-calloc() calls to match the intended usage pattern.
-
-opcodes/ChangeLog:
-
- * arc-dis.c (init_arc_disasm_info): Fix calloc() call.
- * ppc-dis.c (powerpc_init_dialect): Ditto.
-
-diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
---- a/opcodes/arc-dis.c
-+++ b/opcodes/arc-dis.c
-@@ -147,7 +147,7 @@ static bool
- init_arc_disasm_info (struct disassemble_info *info)
- {
- struct arc_disassemble_info *arc_infop
-- = calloc (sizeof (*arc_infop), 1);
-+ = calloc (1, sizeof (*arc_infop));
-
- if (arc_infop == NULL)
- return false;
-diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
---- a/opcodes/ppc-dis.c
-+++ b/opcodes/ppc-dis.c
-@@ -348,7 +348,7 @@ powerpc_init_dialect (struct disassemble_info *info)
- {
- ppc_cpu_t dialect = 0;
- ppc_cpu_t sticky = 0;
-- struct dis_private *priv = calloc (sizeof (*priv), 1);
-+ struct dis_private *priv = calloc (1, sizeof (*priv));
-
- if (priv == NULL)
- return;
diff --git a/gdb-handle-no-python-gdb-module.patch b/gdb-handle-no-python-gdb-module.patch
deleted file mode 100644
index 21966a5..0000000
--- a/gdb-handle-no-python-gdb-module.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Tom Tromey <tromey@adacore.com>
-Date: Wed, 15 Nov 2023 06:48:55 -0700
-Subject: gdb-handle-no-python-gdb-module.patch
-
-;; Backport upstream commit 7d21600b31fe.
-
-Check gdb_python_module in gdbpy_handle_missing_debuginfo
-
-If you run gdb in the build tree without --data-directory, on a
-program that does not have debug info, it will crash, because
-gdbpy_handle_missing_debuginfo unconditionally uses gdb_python_module.
-
-Other code in gdb using gdb_python_module checks it first and it
-seemes harmless to do the same thing here. (gdb_python_initialized
-does not cover this case so that python can be partially initialized
-and still somewhat work.)
-
-diff --git a/gdb/python/python.c b/gdb/python/python.c
---- a/gdb/python/python.c
-+++ b/gdb/python/python.c
-@@ -1676,7 +1676,7 @@ gdbpy_handle_missing_debuginfo (const struct extension_language_defn *extlang,
- struct objfile *objfile)
- {
- /* Early exit if Python is not initialised. */
-- if (!gdb_python_initialized)
-+ if (!gdb_python_initialized || gdb_python_module == nullptr)
- return {};
-
- struct gdbarch *gdbarch = objfile->arch ();
diff --git a/gdb-merge-debug-symbol-lookup.patch b/gdb-merge-debug-symbol-lookup.patch
deleted file mode 100644
index e9b5058..0000000
--- a/gdb-merge-debug-symbol-lookup.patch
+++ /dev/null
@@ -1,265 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Fri, 13 Oct 2023 09:50:33 +0100
-Subject: gdb-merge-debug-symbol-lookup.patch
-
-;; Backport upstream commit 27807da5849.
-
-gdb: merge debug symbol file lookup code from coffread & elfread paths
-
-This commit merges the code that looks for and loads the separate
-debug symbol files from coffread.c and elfread.c. The factored out
-code is moved into a new objfile::find_and_add_separate_symbol_file()
-method.
-
-For the elfread.c path there should be no user visible changes after
-this commit.
-
-For the coffread.c path GDB will now attempt to perform a debuginfod
-lookup for the missing debug information, assuming that GDB can find a
-build-id in the COFF file.
-
-I don't know if COFF files can include a build-id, but I the existing
-coffread.c code already includes a call to
-find_separate_debug_file_by_build-id, so I know that it is at least OK
-for GDB to ask a COFF file for a build-id. If the COFF file doesn't
-include a build-id then the debuginfod lookup code will not trigger
-and the new code is harmless.
-
-If the COFF file does include a build-id, then we're going to end up
-asking debuginfod for the debug file. As build-ids should be unique,
-this should be harmless, even if debuginfod doesn't contain any
-suitable debug data, it just costs us one debuginfod lookup, so I'm
-not too worried about this for now.
-
-As with the previous commit, I've done some minimal testing using the
-mingw toolchain on a Linux machine, GDB seems to still access the
-split debug information just fine.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/coffread.c b/gdb/coffread.c
---- a/gdb/coffread.c
-+++ b/gdb/coffread.c
-@@ -40,8 +40,6 @@
-
- #include "coff-pe-read.h"
-
--#include "build-id.h"
--
- /* The objfile we are currently reading. */
-
- static struct objfile *coffread_objfile;
-@@ -729,26 +727,8 @@ coff_symfile_read (struct objfile *objfile, symfile_add_flags symfile_flags)
- && objfile->separate_debug_objfile == NULL
- && objfile->separate_debug_objfile_backlink == NULL)
- {
-- deferred_warnings warnings;
-- std::string debugfile
-- = find_separate_debug_file_by_buildid (objfile, &warnings);
--
-- if (debugfile.empty ())
-- debugfile
-- = find_separate_debug_file_by_debuglink (objfile, &warnings);
--
-- if (!debugfile.empty ())
-- {
-- gdb_bfd_ref_ptr debug_bfd (symfile_bfd_open (debugfile.c_str ()));
--
-- symbol_file_add_separate (debug_bfd, debugfile.c_str (),
-- symfile_flags, objfile);
-- }
-- /* If all the methods to collect the debuginfo failed, print any
-- warnings that were collected, this is a no-op if there are no
-- warnings. */
-- if (debugfile.empty ())
-- warnings.emit ();
-+ if (objfile->find_and_add_separate_symbol_file (symfile_flags))
-+ gdb_assert (objfile->separate_debug_objfile != nullptr);
- }
- }
-
-diff --git a/gdb/elfread.c b/gdb/elfread.c
---- a/gdb/elfread.c
-+++ b/gdb/elfread.c
-@@ -41,14 +41,12 @@
- #include "regcache.h"
- #include "bcache.h"
- #include "gdb_bfd.h"
--#include "build-id.h"
- #include "location.h"
- #include "auxv.h"
- #include "mdebugread.h"
- #include "ctfread.h"
- #include "gdbsupport/gdb_string_view.h"
- #include "gdbsupport/scoped_fd.h"
--#include "debuginfod-support.h"
- #include "dwarf2/public.h"
- #include "cli/cli-cmds.h"
-
-@@ -1218,59 +1216,10 @@ elf_symfile_read_dwarf2 (struct objfile *objfile,
- && objfile->separate_debug_objfile == NULL
- && objfile->separate_debug_objfile_backlink == NULL)
- {
-- deferred_warnings warnings;
--
-- std::string debugfile
-- = find_separate_debug_file_by_buildid (objfile, &warnings);
--
-- if (debugfile.empty ())
-- debugfile = find_separate_debug_file_by_debuglink (objfile, &warnings);
--
-- if (!debugfile.empty ())
-- {
-- gdb_bfd_ref_ptr debug_bfd
-- (symfile_bfd_open_no_error (debugfile.c_str ()));
--
-- if (debug_bfd != nullptr)
-- symbol_file_add_separate (debug_bfd, debugfile.c_str (),
-- symfile_flags, objfile);
-- }
-+ if (objfile->find_and_add_separate_symbol_file (symfile_flags))
-+ gdb_assert (objfile->separate_debug_objfile != nullptr);
- else
-- {
-- has_dwarf2 = false;
-- const struct bfd_build_id *build_id
-- = build_id_bfd_get (objfile->obfd.get ());
-- const char *filename = bfd_get_filename (objfile->obfd.get ());
--
-- if (build_id != nullptr)
-- {
-- gdb::unique_xmalloc_ptr<char> symfile_path;
-- scoped_fd fd (debuginfod_debuginfo_query (build_id->data,
-- build_id->size,
-- filename,
-- &symfile_path));
--
-- if (fd.get () >= 0)
-- {
-- /* File successfully retrieved from server. */
-- gdb_bfd_ref_ptr debug_bfd
-- (symfile_bfd_open_no_error (symfile_path.get ()));
--
-- if (debug_bfd != nullptr
-- && build_id_verify (debug_bfd.get (), build_id->size,
-- build_id->data))
-- {
-- symbol_file_add_separate (debug_bfd, symfile_path.get (),
-- symfile_flags, objfile);
-- has_dwarf2 = true;
-- }
-- }
-- }
-- }
-- /* If all the methods to collect the debuginfo failed, print the
-- warnings, this is a no-op if there are no warnings. */
-- if (debugfile.empty () && !has_dwarf2)
-- warnings.emit ();
-+ has_dwarf2 = false;
- }
-
- return has_dwarf2;
-diff --git a/gdb/objfiles.h b/gdb/objfiles.h
---- a/gdb/objfiles.h
-+++ b/gdb/objfiles.h
-@@ -513,6 +513,16 @@ struct objfile
-
- bool has_partial_symbols ();
-
-+ /* Look for a separate debug symbol file for this objfile, make use of
-+ build-id, debug-link, and debuginfod as necessary. If a suitable
-+ separate debug symbol file is found then it is loaded using a call to
-+ symbol_file_add_separate (SYMFILE_FLAGS is passed through unmodified
-+ to this call) and this function returns true. If no suitable separate
-+ debug symbol file is found and loaded then this function returns
-+ false. */
-+
-+ bool find_and_add_separate_symbol_file (symfile_add_flags symfile_flags);
-+
- /* Return true if this objfile has any unexpanded symbols. A return
- value of false indicates either, that this objfile has all its
- symbols fully expanded (i.e. fully read in), or that this objfile has
-diff --git a/gdb/symfile-debug.c b/gdb/symfile-debug.c
---- a/gdb/symfile-debug.c
-+++ b/gdb/symfile-debug.c
-@@ -35,6 +35,8 @@
- #include "block.h"
- #include "filenames.h"
- #include "cli/cli-style.h"
-+#include "build-id.h"
-+#include "debuginfod-support.h"
-
- /* We need to save a pointer to the real symbol functions.
- Plus, the debug versions are malloc'd because we have to NULL out the
-@@ -558,6 +560,70 @@ objfile::require_partial_symbols (bool verbose)
- }
- }
-
-+/* See objfiles.h. */
-+
-+bool
-+objfile::find_and_add_separate_symbol_file (symfile_add_flags symfile_flags)
-+{
-+ bool has_dwarf2 = true;
-+
-+ deferred_warnings warnings;
-+
-+ std::string debugfile
-+ = find_separate_debug_file_by_buildid (this, &warnings);
-+
-+ if (debugfile.empty ())
-+ debugfile = find_separate_debug_file_by_debuglink (this, &warnings);
-+
-+ if (!debugfile.empty ())
-+ {
-+ gdb_bfd_ref_ptr debug_bfd
-+ (symfile_bfd_open_no_error (debugfile.c_str ()));
-+
-+ if (debug_bfd != nullptr)
-+ symbol_file_add_separate (debug_bfd, debugfile.c_str (),
-+ symfile_flags, this);
-+ }
-+ else
-+ {
-+ has_dwarf2 = false;
-+ const struct bfd_build_id *build_id
-+ = build_id_bfd_get (this->obfd.get ());
-+ const char *filename = bfd_get_filename (this->obfd.get ());
-+
-+ if (build_id != nullptr)
-+ {
-+ gdb::unique_xmalloc_ptr<char> symfile_path;
-+ scoped_fd fd (debuginfod_debuginfo_query (build_id->data,
-+ build_id->size,
-+ filename,
-+ &symfile_path));
-+
-+ if (fd.get () >= 0)
-+ {
-+ /* File successfully retrieved from server. */
-+ gdb_bfd_ref_ptr debug_bfd
-+ (symfile_bfd_open_no_error (symfile_path.get ()));
-+
-+ if (debug_bfd != nullptr
-+ && build_id_verify (debug_bfd.get (), build_id->size,
-+ build_id->data))
-+ {
-+ symbol_file_add_separate (debug_bfd, symfile_path.get (),
-+ symfile_flags, this);
-+ has_dwarf2 = true;
-+ }
-+ }
-+ }
-+ }
-+ /* If all the methods to collect the debuginfo failed, print the
-+ warnings, this is a no-op if there are no warnings. */
-+ if (debugfile.empty () && !has_dwarf2)
-+ warnings.emit ();
-+
-+ return has_dwarf2;
-+}
-+
- \f
- /* Debugging version of struct sym_probe_fns. */
-
diff --git a/gdb-refactor-find-and-add-separate-symbol-file.patch b/gdb-refactor-find-and-add-separate-symbol-file.patch
deleted file mode 100644
index 83ceabb..0000000
--- a/gdb-refactor-find-and-add-separate-symbol-file.patch
+++ /dev/null
@@ -1,190 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Fri, 13 Oct 2023 16:17:20 +0100
-Subject: gdb-refactor-find-and-add-separate-symbol-file.patch
-
-;; Backport upstream commit 6234ba17598.
-
-gdb: refactor objfile::find_and_add_separate_symbol_file
-
-This is purely a refactoring commit.
-
-This commit splits objfile::find_and_add_separate_symbol_file into
-some separate helper functions. My hope is that the steps for looking
-up separate debug information are now clearer.
-
-In a later commit I'm going to extend
-objfile::find_and_add_separate_symbol_file, with some additional
-logic, so starting with a simpler function will make the following
-changes easier.
-
-When reading objfile::find_and_add_separate_symbol_file after this
-commit, you might be tempted to think that removing the `has_dwarf`
-local variable would be a good additional cleanup. After the next
-commit though it makes more sense to retain this local, so I've left
-this in place for now.
-
-There should be no user visible changes after this commit.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/symfile-debug.c b/gdb/symfile-debug.c
---- a/gdb/symfile-debug.c
-+++ b/gdb/symfile-debug.c
-@@ -560,68 +560,109 @@ objfile::require_partial_symbols (bool verbose)
- }
- }
-
-+/* Call LOOKUP_FUNC to find the filename of a file containing the separate
-+ debug information matching OBJFILE. If LOOKUP_FUNC does return a
-+ filename then open this file and return a std::pair containing the
-+ gdb_bfd_ref_ptr of the open file and the filename returned by
-+ LOOKUP_FUNC, otherwise this function returns an empty pair; the first
-+ item will be nullptr, and the second will be an empty string.
-+
-+ Any warnings generated by this function, or by calling LOOKUP_FUNC are
-+ placed into WARNINGS, these warnings are only displayed to the user if
-+ GDB is unable to find the separate debug information via any route. */
-+static std::pair<gdb_bfd_ref_ptr, std::string>
-+simple_find_and_open_separate_symbol_file
-+ (struct objfile *objfile,
-+ std::string (*lookup_func) (struct objfile *, deferred_warnings *),
-+ deferred_warnings *warnings)
-+{
-+ std::string filename = lookup_func (objfile, warnings);
-+
-+ if (!filename.empty ())
-+ {
-+ gdb_bfd_ref_ptr symfile_bfd
-+ = symfile_bfd_open_no_error (filename.c_str ());
-+ if (symfile_bfd != nullptr)
-+ return { symfile_bfd, filename };
-+ }
-+
-+ return {};
-+}
-+
-+/* Lookup separate debug information for OBJFILE via debuginfod. If
-+ successful the debug information will be have been downloaded into the
-+ debuginfod cache and this function will return a std::pair containing a
-+ gdb_bfd_ref_ptr of the open debug information file and the filename for
-+ the file within the debuginfod cache. If no debug information could be
-+ found then this function returns an empty pair; the first item will be
-+ nullptr, and the second will be an empty string. */
-+
-+static std::pair<gdb_bfd_ref_ptr, std::string>
-+debuginfod_find_and_open_separate_symbol_file (struct objfile * objfile)
-+{
-+ const struct bfd_build_id *build_id
-+ = build_id_bfd_get (objfile->obfd.get ());
-+ const char *filename = bfd_get_filename (objfile->obfd.get ());
-+
-+ if (build_id != nullptr)
-+ {
-+ gdb::unique_xmalloc_ptr<char> symfile_path;
-+ scoped_fd fd (debuginfod_debuginfo_query (build_id->data, build_id->size,
-+ filename, &symfile_path));
-+
-+ if (fd.get () >= 0)
-+ {
-+ /* File successfully retrieved from server. */
-+ gdb_bfd_ref_ptr debug_bfd
-+ (symfile_bfd_open_no_error (symfile_path.get ()));
-+
-+ if (debug_bfd != nullptr
-+ && build_id_verify (debug_bfd.get (),
-+ build_id->size, build_id->data))
-+ return { debug_bfd, std::string (symfile_path.get ()) };
-+ }
-+ }
-+
-+ return {};
-+}
-+
- /* See objfiles.h. */
-
- bool
- objfile::find_and_add_separate_symbol_file (symfile_add_flags symfile_flags)
- {
-- bool has_dwarf2 = true;
-+ bool has_dwarf = false;
-
- deferred_warnings warnings;
-
-- std::string debugfile
-- = find_separate_debug_file_by_buildid (this, &warnings);
--
-- if (debugfile.empty ())
-- debugfile = find_separate_debug_file_by_debuglink (this, &warnings);
-+ gdb_bfd_ref_ptr debug_bfd;
-+ std::string filename;
-
-- if (!debugfile.empty ())
-- {
-- gdb_bfd_ref_ptr debug_bfd
-- (symfile_bfd_open_no_error (debugfile.c_str ()));
-+ std::tie (debug_bfd, filename) = simple_find_and_open_separate_symbol_file
-+ (this, find_separate_debug_file_by_buildid, &warnings);
-
-- if (debug_bfd != nullptr)
-- symbol_file_add_separate (debug_bfd, debugfile.c_str (),
-- symfile_flags, this);
-- }
-- else
-- {
-- has_dwarf2 = false;
-- const struct bfd_build_id *build_id
-- = build_id_bfd_get (this->obfd.get ());
-- const char *filename = bfd_get_filename (this->obfd.get ());
--
-- if (build_id != nullptr)
-- {
-- gdb::unique_xmalloc_ptr<char> symfile_path;
-- scoped_fd fd (debuginfod_debuginfo_query (build_id->data,
-- build_id->size,
-- filename,
-- &symfile_path));
-+ if (debug_bfd == nullptr)
-+ std::tie (debug_bfd, filename)
-+ = simple_find_and_open_separate_symbol_file
-+ (this, find_separate_debug_file_by_debuglink, &warnings);
-
-- if (fd.get () >= 0)
-- {
-- /* File successfully retrieved from server. */
-- gdb_bfd_ref_ptr debug_bfd
-- (symfile_bfd_open_no_error (symfile_path.get ()));
-+ if (debug_bfd == nullptr)
-+ std::tie (debug_bfd, filename)
-+ = debuginfod_find_and_open_separate_symbol_file (this);
-
-- if (debug_bfd != nullptr
-- && build_id_verify (debug_bfd.get (), build_id->size,
-- build_id->data))
-- {
-- symbol_file_add_separate (debug_bfd, symfile_path.get (),
-- symfile_flags, this);
-- has_dwarf2 = true;
-- }
-- }
-- }
-+ if (debug_bfd != nullptr)
-+ {
-+ symbol_file_add_separate (debug_bfd, filename.c_str (), symfile_flags,
-+ this);
-+ has_dwarf = true;
- }
-- /* If all the methods to collect the debuginfo failed, print the
-- warnings, this is a no-op if there are no warnings. */
-- if (debugfile.empty () && !has_dwarf2)
-+
-+ /* If we still have not got a separate debug symbol file, then
-+ emit any warnings we've collected so far. */
-+ if (!has_dwarf)
- warnings.emit ();
-
-- return has_dwarf2;
-+ return has_dwarf;
- }
-
- \f
diff --git a/gdb-reformat-missing-debug-py-file.patch b/gdb-reformat-missing-debug-py-file.patch
deleted file mode 100644
index c988fa2..0000000
--- a/gdb-reformat-missing-debug-py-file.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Tom de Vries <tdevries@suse.de>
-Date: Thu, 23 Nov 2023 07:37:19 +0100
-Subject: gdb-reformat-missing-debug-py-file.patch
-
-;; Backport upstream commit dd5516bf98f.
-
-[gdb/python] Reformat missing_debug.py using black
-
-Reformat gdb/python/lib/gdb/missing_debug.py with black after commit
-e8c3dafa5f5 ("[gdb/python] Don't import curses.ascii module unless necessary").
-
-diff --git a/gdb/python/lib/gdb/missing_debug.py b/gdb/python/lib/gdb/missing_debug.py
---- a/gdb/python/lib/gdb/missing_debug.py
-+++ b/gdb/python/lib/gdb/missing_debug.py
-@@ -19,18 +19,22 @@ MissingDebugHandler base class, and register_handler function.
-
- import gdb
- import sys
-+
- if sys.version_info >= (3, 7):
- # Functions str.isascii() and str.isalnum are available starting Python
- # 3.7.
- def isascii(ch):
- return ch.isascii()
-+
- def isalnum(ch):
- return ch.isalnum()
-+
- else:
- # Fall back to curses.ascii.isascii() and curses.ascii.isalnum() for
- # earlier versions.
- from curses.ascii import isascii, isalnum
-
-+
- def _validate_name(name):
- """Validate a missing debug handler name string.
-
diff --git a/gdb-remove-path-in-test-name.patch b/gdb-remove-path-in-test-name.patch
deleted file mode 100644
index f637ab9..0000000
--- a/gdb-remove-path-in-test-name.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Tom Tromey <tromey@adacore.com>
-Date: Tue, 14 Nov 2023 11:47:27 -0700
-Subject: gdb-remove-path-in-test-name.patch
-
-;; Backport upstream commit 1146d27749f.
-
-Remove path name from test case
-
-'runtest' complains about a path in a test name, from the new test
-case py-missing-debug.exp.
-
-This patch fixes the problem by providing an explicit test name to
-gdb_test. I chose something very basic because the block in question
-is already wrapped in with_test_prefix.
-
-diff --git a/gdb/testsuite/gdb.python/py-missing-debug.exp b/gdb/testsuite/gdb.python/py-missing-debug.exp
---- a/gdb/testsuite/gdb.python/py-missing-debug.exp
-+++ b/gdb/testsuite/gdb.python/py-missing-debug.exp
-@@ -321,7 +321,8 @@ with_test_prefix "enable 'abc-def'" {
- set re [string_to_regexp $binfile]
-
- gdb_test "enable missing-debug-handler \"$re\" abc-def" \
-- "^1 missing debug handler enabled"
-+ "^1 missing debug handler enabled" \
-+ "enable missing-debug-handler"
-
- gdb_test "info missing-debug-handlers" \
- [multi_line \
diff --git a/gdb-remove-use-of-py-isascii b/gdb-remove-use-of-py-isascii
index a605d1c..367c5b3 100644
--- a/gdb-remove-use-of-py-isascii
+++ b/gdb-remove-use-of-py-isascii
@@ -27,20 +27,11 @@ There should be no user visible changes after this commit.
diff --git a/gdb/python/lib/gdb/missing_debug.py b/gdb/python/lib/gdb/missing_debug.py
--- a/gdb/python/lib/gdb/missing_debug.py
+++ b/gdb/python/lib/gdb/missing_debug.py
-@@ -18,6 +18,7 @@ MissingDebugHandler base class, and register_handler function.
- """
+@@ -20,6 +20,7 @@ MissingDebugHandler base class, and register_handler function.
+ import sys
import gdb
+from curses.ascii import isascii, isalnum
-
- def _validate_name(name):
-@@ -38,7 +39,7 @@ def _validate_name(name):
- name.
- """
- for ch in name:
-- if not ch.isascii() or not (ch.isalnum() or ch in "_-"):
-+ if not isascii(ch) or not (isalnum(ch) or ch in "_-"):
- raise ValueError("invalid character '%s' in handler name: %s" % (ch, name))
-
-
+ if sys.version_info >= (3, 7):
+ # Functions str.isascii() and str.isalnum are available starting Python
diff --git a/gdb-rhbz-2232086-cpp-ify-mapped-symtab.patch b/gdb-rhbz-2232086-cpp-ify-mapped-symtab.patch
deleted file mode 100644
index 1d6e1fb..0000000
--- a/gdb-rhbz-2232086-cpp-ify-mapped-symtab.patch
+++ /dev/null
@@ -1,264 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Sat, 25 Nov 2023 10:35:37 +0000
-Subject: gdb-rhbz-2232086-cpp-ify-mapped-symtab.patch
-
-;; Back-port upstream commit acc117b57f7 as part of a fix for
-;; non-deterministic gdb-index generation (RH BZ 2232086).
-
-gdb: C++-ify mapped_symtab from dwarf2/index-write.c
-
-Make static the functions add_index_entry, find_slot, and hash_expand,
-member functions of the mapped_symtab class.
-
-Fold an additional snippet of code from write_gdbindex into
-mapped_symtab::minimize, this code relates to minimisation, so this
-seems like a good home for it.
-
-Make the n_elements, data, and m_string_obstack member variables of
-mapped_symtab private. Provide a new obstack() member function to
-provide access to the obstack when needed, and also add member
-functions begin(), end(), cbegin(), and cend() so that the
-mapped_symtab class can be treated like a contained and iterated
-over.
-
-I've also taken this opportunity to split out the logic for whether
-the hash table (m_data) needs expanding, this is the new function
-hash_needs_expanding. This will be useful in a later commit.
-
-There should be no user visible changes after this commit.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/dwarf2/index-write.c b/gdb/dwarf2/index-write.c
---- a/gdb/dwarf2/index-write.c
-+++ b/gdb/dwarf2/index-write.c
-@@ -187,86 +187,135 @@ struct mapped_symtab
- {
- mapped_symtab ()
- {
-- data.resize (1024);
-+ m_data.resize (1024);
- }
-
-- /* Minimize each entry in the symbol table, removing duplicates. */
-+ /* If there are no elements in the symbol table, then reduce the table
-+ size to zero. Otherwise call symtab_index_entry::minimize each entry
-+ in the symbol table. */
-+
- void minimize ()
- {
-- for (symtab_index_entry &item : data)
-+ if (m_element_count == 0)
-+ m_data.resize (0);
-+
-+ for (symtab_index_entry &item : m_data)
- item.minimize ();
- }
-
-- offset_type n_elements = 0;
-- std::vector<symtab_index_entry> data;
-+ /* Add an entry to SYMTAB. NAME is the name of the symbol. CU_INDEX is
-+ the index of the CU in which the symbol appears. IS_STATIC is one if
-+ the symbol is static, otherwise zero (global). */
-+
-+ void add_index_entry (const char *name, int is_static,
-+ gdb_index_symbol_kind kind, offset_type cu_index);
-+
-+ /* Access the obstack. */
-+ struct obstack *obstack ()
-+ { return &m_string_obstack; }
-+
-+private:
-+
-+ /* Find a slot in SYMTAB for the symbol NAME. Returns a reference to
-+ the slot.
-+
-+ Function is used only during write_hash_table so no index format
-+ backward compatibility is needed. */
-+
-+ symtab_index_entry &find_slot (const char *name);
-+
-+ /* Expand SYMTAB's hash table. */
-+
-+ void hash_expand ();
-+
-+ /* Return true if the hash table in data needs to grow. */
-+
-+ bool hash_needs_expanding () const
-+ { return 4 * m_element_count / 3 >= m_data.size (); }
-+
-+ /* A vector that is used as a hash table. */
-+ std::vector<symtab_index_entry> m_data;
-+
-+ /* The number of elements stored in the m_data hash. */
-+ offset_type m_element_count = 0;
-
- /* Temporary storage for names. */
- auto_obstack m_string_obstack;
--};
-
--/* Find a slot in SYMTAB for the symbol NAME. Returns a reference to
-- the slot.
-+public:
-+ using iterator = decltype (m_data)::iterator;
-+ using const_iterator = decltype (m_data)::const_iterator;
-
-- Function is used only during write_hash_table so no index format backward
-- compatibility is needed. */
-+ iterator begin ()
-+ { return m_data.begin (); }
-
--static symtab_index_entry &
--find_slot (struct mapped_symtab *symtab, const char *name)
-+ iterator end ()
-+ { return m_data.end (); }
-+
-+ const_iterator cbegin ()
-+ { return m_data.cbegin (); }
-+
-+ const_iterator cend ()
-+ { return m_data.cend (); }
-+};
-+
-+/* See class definition. */
-+
-+symtab_index_entry &
-+mapped_symtab::find_slot (const char *name)
- {
- offset_type index, step, hash = mapped_index_string_hash (INT_MAX, name);
-
-- index = hash & (symtab->data.size () - 1);
-- step = ((hash * 17) & (symtab->data.size () - 1)) | 1;
-+ index = hash & (m_data.size () - 1);
-+ step = ((hash * 17) & (m_data.size () - 1)) | 1;
-
- for (;;)
- {
-- if (symtab->data[index].name == NULL
-- || strcmp (name, symtab->data[index].name) == 0)
-- return symtab->data[index];
-- index = (index + step) & (symtab->data.size () - 1);
-+ if (m_data[index].name == NULL
-+ || strcmp (name, m_data[index].name) == 0)
-+ return m_data[index];
-+ index = (index + step) & (m_data.size () - 1);
- }
- }
-
--/* Expand SYMTAB's hash table. */
-+/* See class definition. */
-
--static void
--hash_expand (struct mapped_symtab *symtab)
-+void
-+mapped_symtab::hash_expand ()
- {
-- auto old_entries = std::move (symtab->data);
-+ auto old_entries = std::move (m_data);
-
-- symtab->data.clear ();
-- symtab->data.resize (old_entries.size () * 2);
-+ gdb_assert (m_data.size () == 0);
-+ m_data.resize (old_entries.size () * 2);
-
- for (auto &it : old_entries)
- if (it.name != NULL)
- {
-- auto &ref = find_slot (symtab, it.name);
-+ auto &ref = this->find_slot (it.name);
- ref = std::move (it);
- }
- }
-
--/* Add an entry to SYMTAB. NAME is the name of the symbol.
-- CU_INDEX is the index of the CU in which the symbol appears.
-- IS_STATIC is one if the symbol is static, otherwise zero (global). */
-+/* See class definition. */
-
--static void
--add_index_entry (struct mapped_symtab *symtab, const char *name,
-- int is_static, gdb_index_symbol_kind kind,
-- offset_type cu_index)
-+void
-+mapped_symtab::add_index_entry (const char *name, int is_static,
-+ gdb_index_symbol_kind kind,
-+ offset_type cu_index)
- {
-- symtab_index_entry *slot = &find_slot (symtab, name);
-+ symtab_index_entry *slot = &this->find_slot (name);
- if (slot->name == NULL)
- {
- /* This is a new element in the hash table. */
-- ++symtab->n_elements;
-+ ++this->m_element_count;
-
- /* We might need to grow the hash table. */
-- if (4 * symtab->n_elements / 3 >= symtab->data.size ())
-+ if (this->hash_needs_expanding ())
- {
-- hash_expand (symtab);
-+ this->hash_expand ();
-
- /* This element will have a different slot in the new table. */
-- slot = &find_slot (symtab, name);
-+ slot = &this->find_slot (name);
-
- /* But it should still be a new element in the hash table. */
- gdb_assert (slot->name == nullptr);
-@@ -387,7 +436,7 @@ write_hash_table (mapped_symtab *symtab, data_buf &output, data_buf &cpool)
-
- /* We add all the index vectors to the constant pool first, to
- ensure alignment is ok. */
-- for (symtab_index_entry &entry : symtab->data)
-+ for (symtab_index_entry &entry : *symtab)
- {
- if (entry.name == NULL)
- continue;
-@@ -416,7 +465,7 @@ write_hash_table (mapped_symtab *symtab, data_buf &output, data_buf &cpool)
-
- /* Now write out the hash table. */
- std::unordered_map<c_str_view, offset_type, c_str_view_hasher> str_table;
-- for (const auto &entry : symtab->data)
-+ for (const auto &entry : *symtab)
- {
- offset_type str_off, vec_off;
-
-@@ -1151,7 +1200,7 @@ write_cooked_index (cooked_index *table,
- const auto it = cu_index_htab.find (entry->per_cu);
- gdb_assert (it != cu_index_htab.cend ());
-
-- const char *name = entry->full_name (&symtab->m_string_obstack);
-+ const char *name = entry->full_name (symtab->obstack ());
-
- if (entry->per_cu->lang () == language_ada)
- {
-@@ -1159,7 +1208,7 @@ write_cooked_index (cooked_index *table,
- gdb, it has to use the encoded name, with any
- suffixes stripped. */
- std::string encoded = ada_encode (name, false);
-- name = obstack_strdup (&symtab->m_string_obstack,
-+ name = obstack_strdup (symtab->obstack (),
- encoded.c_str ());
- }
- else if (entry->per_cu->lang () == language_cplus
-@@ -1191,8 +1240,8 @@ write_cooked_index (cooked_index *table,
- else
- kind = GDB_INDEX_SYMBOL_KIND_TYPE;
-
-- add_index_entry (symtab, name, (entry->flags & IS_STATIC) != 0,
-- kind, it->second);
-+ symtab->add_index_entry (name, (entry->flags & IS_STATIC) != 0,
-+ kind, it->second);
- }
- }
-
-@@ -1267,8 +1316,6 @@ write_gdbindex (dwarf2_per_bfd *per_bfd, cooked_index *table,
- symtab.minimize ();
-
- data_buf symtab_vec, constant_pool;
-- if (symtab.n_elements == 0)
-- symtab.data.resize (0);
-
- write_hash_table (&symtab, symtab_vec, constant_pool);
-
diff --git a/gdb-rhbz-2232086-generate-dwarf-5-index-consistently.patch b/gdb-rhbz-2232086-generate-dwarf-5-index-consistently.patch
deleted file mode 100644
index e9b0b9e..0000000
--- a/gdb-rhbz-2232086-generate-dwarf-5-index-consistently.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Mon, 27 Nov 2023 13:19:39 +0000
-Subject: gdb-rhbz-2232086-generate-dwarf-5-index-consistently.patch
-
-;; Back-port upstream commit 3644f41dc80 as part of a fix for
-;; non-deterministic gdb-index generation (RH BZ 2232086).
-
-gdb: generate dwarf-5 index identically as worker-thread count changes
-
-Similar to the previous commit, this commit ensures that the dwarf-5
-index files are generated identically as the number of worker-threads
-changes.
-
-Building the dwarf-5 index makes use of a closed hash table, the
-bucket_hash local within debug_names::build(). Entries are added to
-bucket_hash from m_name_to_value_set, which, in turn, is populated
-by calls to debug_names::insert() in write_debug_names. The insert
-calls are ordered based on the entries within the cooked_index, and
-the ordering within cooked_index depends on the number of worker
-threads that GDB is using.
-
-My proposal is to sort each chain within the bucket_hash closed hash
-table prior to using this to build the dwarf-5 index.
-
-The buckets within bucket_hash will always have the same ordering (for
-a given GDB build with a given executable), and by sorting the chains
-within each bucket, we can be sure that GDB will see each entry in a
-deterministic order.
-
-I've extended the index creation test to cover this case.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/dwarf2/index-write.c b/gdb/dwarf2/index-write.c
---- a/gdb/dwarf2/index-write.c
-+++ b/gdb/dwarf2/index-write.c
-@@ -452,6 +452,11 @@ class c_str_view
- return strcmp (m_cstr, other.m_cstr) == 0;
- }
-
-+ bool operator< (const c_str_view &other) const
-+ {
-+ return strcmp (m_cstr, other.m_cstr) < 0;
-+ }
-+
- /* Return the underlying C string. Note, the returned string is
- only a reference with lifetime of this object. */
- const char *c_str () const
-@@ -771,10 +776,18 @@ class debug_names
- }
- for (size_t bucket_ix = 0; bucket_ix < bucket_hash.size (); ++bucket_ix)
- {
-- const std::forward_list<hash_it_pair> &hashitlist
-- = bucket_hash[bucket_ix];
-+ std::forward_list<hash_it_pair> &hashitlist = bucket_hash[bucket_ix];
- if (hashitlist.empty ())
- continue;
-+
-+ /* Sort the items within each bucket. This ensures that the
-+ generated index files will be the same no matter the order in
-+ which symbols were added into the index. */
-+ hashitlist.sort ([] (const hash_it_pair &a, const hash_it_pair &b)
-+ {
-+ return a.it->first < b.it->first;
-+ });
-+
- uint32_t &bucket_slot = m_bucket_table[bucket_ix];
- /* The hashes array is indexed starting at 1. */
- store_unsigned_integer (reinterpret_cast<gdb_byte *> (&bucket_slot),
-diff --git a/gdb/testsuite/gdb.gdb/index-file.exp b/gdb/testsuite/gdb.gdb/index-file.exp
---- a/gdb/testsuite/gdb.gdb/index-file.exp
-+++ b/gdb/testsuite/gdb.gdb/index-file.exp
-@@ -47,6 +47,9 @@ remote_exec host "mkdir -p ${dir1}"
- with_timeout_factor $timeout_factor {
- gdb_test_no_output "save gdb-index $dir1" \
- "create gdb-index file"
-+
-+ gdb_test_no_output "save gdb-index -dwarf-5 $dir1" \
-+ "create dwarf-index files"
- }
-
- # Close GDB.
-@@ -143,13 +146,16 @@ if { $worker_threads > 1 } {
- with_timeout_factor $timeout_factor {
- gdb_test_no_output "save gdb-index $dir2" \
- "create second gdb-index file"
-+
-+ gdb_test_no_output "save gdb-index -dwarf-5 $dir2" \
-+ "create second dwarf-index files"
- }
-
- # Close GDB.
- gdb_exit
-
- # Now check that the index files are identical.
-- foreach suffix { gdb-index } {
-+ foreach suffix { gdb-index debug_names debug_str } {
- set result \
- [remote_exec host \
- "cmp -s \"$dir1/${index_filename_base}.${suffix}\" \"$dir2/${index_filename_base}.${suffix}\""]
diff --git a/gdb-rhbz-2232086-generate-gdb-index-consistently.patch b/gdb-rhbz-2232086-generate-gdb-index-consistently.patch
deleted file mode 100644
index d6917ec..0000000
--- a/gdb-rhbz-2232086-generate-gdb-index-consistently.patch
+++ /dev/null
@@ -1,230 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Fri, 24 Nov 2023 12:04:36 +0000
-Subject: gdb-rhbz-2232086-generate-gdb-index-consistently.patch
-
-;; Back-port upstream commit aff250145af as part of a fix for
-;; non-deterministic gdb-index generation (RH BZ 2232086).
-
-gdb: generate gdb-index identically regardless of work thread count
-
-It was observed that changing the number of worker threads that GDB
-uses (maintenance set worker-threads NUM) would have an impact on the
-layout of the generated gdb-index.
-
-The cause seems to be how the CU are distributed between threads, and
-then symbols that appear in multiple CU can be encountered earlier or
-later depending on whether a particular CU moves between threads.
-
-I certainly found this behaviour was reproducible when generating an
-index for GDB itself, like:
-
- gdb -q -nx -nh -batch \
- -eiex 'maint set worker-threads NUM' \
- -ex 'save gdb-index /tmp/'
-
-And then setting different values for NUM will change the generated
-index.
-
-Now, the question is: does this matter?
-
-I would like to suggest that yes, this does matter. At Red Hat we
-generate a gdb-index as part of the build process, and we would
-ideally like to have reproducible builds: for the same source,
-compiled with the same tool-chain, we should get the exact same output
-binary. And we do .... except for the index.
-
-Now we could simply force GDB to only use a single worker thread when
-we build the index, but, I don't think the idea of reproducible builds
-is that strange, so I think we should ensure that our generated
-indexes are always reproducible.
-
-To achieve this, I propose that we add an extra step when building the
-gdb-index file. After constructing the initial symbol hash table
-contents, we will pull all the symbols out of the hash, sort them,
-then re-insert them in sorted order. This will ensure that the
-structure of the generated hash will remain consistent (given the same
-set of symbols).
-
-I've extended the existing index-file test to check that the generated
-index doesn't change if we adjust the number of worker threads used.
-Given that this test is already rather slow, I've only made one change
-to the worker-thread count. Maybe this test should be changed to use
-a smaller binary, which is quicker to load, and for which we could
-then try many different worker thread counts.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/dwarf2/index-write.c b/gdb/dwarf2/index-write.c
---- a/gdb/dwarf2/index-write.c
-+++ b/gdb/dwarf2/index-write.c
-@@ -210,6 +210,13 @@ struct mapped_symtab
- void add_index_entry (const char *name, int is_static,
- gdb_index_symbol_kind kind, offset_type cu_index);
-
-+ /* When entries are originally added into the data hash the order will
-+ vary based on the number of worker threads GDB is configured to use.
-+ This function will rebuild the hash such that the final layout will be
-+ deterministic regardless of the number of worker threads used. */
-+
-+ void sort ();
-+
- /* Access the obstack. */
- struct obstack *obstack ()
- { return &m_string_obstack; }
-@@ -296,6 +303,65 @@ mapped_symtab::hash_expand ()
- }
- }
-
-+/* See mapped_symtab class declaration. */
-+
-+void mapped_symtab::sort ()
-+{
-+ /* Move contents out of this->data vector. */
-+ std::vector<symtab_index_entry> original_data = std::move (m_data);
-+
-+ /* Restore the size of m_data, this will avoid having to expand the hash
-+ table (and rehash all elements) when we reinsert after sorting.
-+ However, we do reset the element count, this allows for some sanity
-+ checking asserts during the reinsert phase. */
-+ gdb_assert (m_data.size () == 0);
-+ m_data.resize (original_data.size ());
-+ m_element_count = 0;
-+
-+ /* Remove empty entries from ORIGINAL_DATA, this makes sorting quicker. */
-+ auto it = std::remove_if (original_data.begin (), original_data.end (),
-+ [] (const symtab_index_entry &entry) -> bool
-+ {
-+ return entry.name == nullptr;
-+ });
-+ original_data.erase (it, original_data.end ());
-+
-+ /* Sort the existing contents. */
-+ std::sort (original_data.begin (), original_data.end (),
-+ [] (const symtab_index_entry &a,
-+ const symtab_index_entry &b) -> bool
-+ {
-+ /* Return true if A is before B. */
-+ gdb_assert (a.name != nullptr);
-+ gdb_assert (b.name != nullptr);
-+
-+ return strcmp (a.name, b.name) < 0;
-+ });
-+
-+ /* Re-insert each item from the sorted list. */
-+ for (auto &entry : original_data)
-+ {
-+ /* We know that ORIGINAL_DATA contains no duplicates, this data was
-+ taken from a hash table that de-duplicated entries for us, so
-+ count this as a new item.
-+
-+ As we retained the original size of m_data (see above) then we
-+ should never need to grow m_data_ during this re-insertion phase,
-+ assert that now. */
-+ ++m_element_count;
-+ gdb_assert (!this->hash_needs_expanding ());
-+
-+ /* Lookup a slot. */
-+ symtab_index_entry &slot = this->find_slot (entry.name);
-+
-+ /* As discussed above, we should not find duplicates. */
-+ gdb_assert (slot.name == nullptr);
-+
-+ /* Move this item into the slot we found. */
-+ slot = std::move (entry);
-+ }
-+}
-+
- /* See class definition. */
-
- void
-@@ -1311,6 +1377,9 @@ write_gdbindex (dwarf2_per_bfd *per_bfd, cooked_index *table,
- for (auto map : table->get_addrmaps ())
- write_address_map (map, addr_vec, cu_index_htab);
-
-+ /* Ensure symbol hash is built domestically. */
-+ symtab.sort ();
-+
- /* Now that we've processed all symbols we can shrink their cu_indices
- lists. */
- symtab.minimize ();
-diff --git a/gdb/testsuite/gdb.gdb/index-file.exp b/gdb/testsuite/gdb.gdb/index-file.exp
---- a/gdb/testsuite/gdb.gdb/index-file.exp
-+++ b/gdb/testsuite/gdb.gdb/index-file.exp
-@@ -38,6 +38,9 @@ with_timeout_factor $timeout_factor {
- clean_restart $filename
- }
-
-+# Record how many worker threads GDB is using.
-+set worker_threads [gdb_get_worker_threads]
-+
- # Generate an index file.
- set dir1 [standard_output_file "index_1"]
- remote_exec host "mkdir -p ${dir1}"
-@@ -116,3 +119,41 @@ proc check_symbol_table_usage { filename } {
-
- set index_filename_base [file tail $filename]
- check_symbol_table_usage "$dir1/${index_filename_base}.gdb-index"
-+
-+# If GDB is using more than 1 worker thread then reduce the number of
-+# worker threads, regenerate the index, and check that we get the same
-+# index file back. At one point the layout of the index would vary
-+# based on the number of worker threads used.
-+if { $worker_threads > 1 } {
-+ # Start GDB, but don't load a file yet.
-+ clean_restart
-+
-+ # Adjust the number of threads to use.
-+ set reduced_threads [expr $worker_threads / 2]
-+ gdb_test_no_output "maint set worker-threads $reduced_threads"
-+
-+ with_timeout_factor $timeout_factor {
-+ # Now load the test binary.
-+ gdb_file_cmd $filename
-+ }
-+
-+ # Generate an index file.
-+ set dir2 [standard_output_file "index_2"]
-+ remote_exec host "mkdir -p ${dir2}"
-+ with_timeout_factor $timeout_factor {
-+ gdb_test_no_output "save gdb-index $dir2" \
-+ "create second gdb-index file"
-+ }
-+
-+ # Close GDB.
-+ gdb_exit
-+
-+ # Now check that the index files are identical.
-+ foreach suffix { gdb-index } {
-+ set result \
-+ [remote_exec host \
-+ "cmp -s \"$dir1/${index_filename_base}.${suffix}\" \"$dir2/${index_filename_base}.${suffix}\""]
-+ gdb_assert { [lindex $result 0] == 0 } \
-+ "$suffix files are identical"
-+ }
-+}
-diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp
---- a/gdb/testsuite/lib/gdb.exp
-+++ b/gdb/testsuite/lib/gdb.exp
-@@ -10033,6 +10033,21 @@ proc is_target_non_stop { {testname ""} } {
- return $is_non_stop
- }
-
-+# Return the number of worker threads that GDB is currently using.
-+
-+proc gdb_get_worker_threads { {testname ""} } {
-+ set worker_threads "UNKNOWN"
-+ gdb_test_multiple "maintenance show worker-threads" $testname {
-+ -wrap -re "The number of worker threads GDB can use is unlimited \\(currently ($::decimal)\\)\\." {
-+ set worker_threads $expect_out(1,string)
-+ }
-+ -wrap -re "The number of worker threads GDB can use is ($::decimal)\\." {
-+ set worker_threads $expect_out(1,string)
-+ }
-+ }
-+ return $worker_threads
-+}
-+
- # Check if the compiler emits epilogue information associated
- # with the closing brace or with the last statement line.
- #
diff --git a/gdb-rhbz-2232086-reduce-size-of-gdb-index.patch b/gdb-rhbz-2232086-reduce-size-of-gdb-index.patch
deleted file mode 100644
index 9eaf615..0000000
--- a/gdb-rhbz-2232086-reduce-size-of-gdb-index.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Fri, 24 Nov 2023 11:50:35 +0000
-Subject: gdb-rhbz-2232086-reduce-size-of-gdb-index.patch
-
-;; Back-port upstream commit aa19bc1d259 as part of a fix for
-;; non-deterministic gdb-index generation (RH BZ 2232086).
-
-gdb: reduce size of generated gdb-index file
-
-I noticed in passing that out algorithm for generating the gdb-index
-file is incorrect. When building the hash table in add_index_entry we
-count every incoming entry rehash when the number of entries gets too
-large. However, some of the incoming entries will be duplicates,
-which don't actually result in new items being added to the hash
-table.
-
-As a result, we grow the gdb-index hash table far too often.
-
-With an unmodified GDB, generating a gdb-index for GDB, I see a file
-size of 90M, with a hash usage (in the generated index file) of just
-2.6%.
-
-With a patched GDB, generating a gdb-index for the _same_ GDB binary,
-I now see a gdb-index file size of 30M, with a hash usage of 41.9%.
-
-This is a 67% reduction in gdb-index file size.
-
-Obviously, not every gdb-index file is going to see such big savings,
-however, the larger a program, and the more symbols that are
-duplicated between compilation units, the more GDB would over count,
-and so, over-grow the index.
-
-The gdb-index hash table we create has a minimum size of 1024, and
-then we grow the hash when it is 75% full, doubling the hash table at
-that time. Given this, then we expect that either:
-
- a. The hash table is size 1024, and less than 75% full, or
- b. The hash table is between 37.5% and 75% full.
-
-I've include a test that checks some of these constraints -- I've not
-bothered to check the upper limit, and over full hash table isn't
-really a problem here, but if the fill percentage is less than 37.5%
-then this indicates that we've done something wrong (obviously, I also
-check for the 1024 minimum size).
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/dwarf2/index-write.c b/gdb/dwarf2/index-write.c
---- a/gdb/dwarf2/index-write.c
-+++ b/gdb/dwarf2/index-write.c
-@@ -254,20 +254,29 @@ add_index_entry (struct mapped_symtab *symtab, const char *name,
- int is_static, gdb_index_symbol_kind kind,
- offset_type cu_index)
- {
-- offset_type cu_index_and_attrs;
-+ symtab_index_entry *slot = &find_slot (symtab, name);
-+ if (slot->name == NULL)
-+ {
-+ /* This is a new element in the hash table. */
-+ ++symtab->n_elements;
-
-- ++symtab->n_elements;
-- if (4 * symtab->n_elements / 3 >= symtab->data.size ())
-- hash_expand (symtab);
-+ /* We might need to grow the hash table. */
-+ if (4 * symtab->n_elements / 3 >= symtab->data.size ())
-+ {
-+ hash_expand (symtab);
-
-- symtab_index_entry &slot = find_slot (symtab, name);
-- if (slot.name == NULL)
-- {
-- slot.name = name;
-+ /* This element will have a different slot in the new table. */
-+ slot = &find_slot (symtab, name);
-+
-+ /* But it should still be a new element in the hash table. */
-+ gdb_assert (slot->name == nullptr);
-+ }
-+
-+ slot->name = name;
- /* index_offset is set later. */
- }
-
-- cu_index_and_attrs = 0;
-+ offset_type cu_index_and_attrs = 0;
- DW2_GDB_INDEX_CU_SET_VALUE (cu_index_and_attrs, cu_index);
- DW2_GDB_INDEX_SYMBOL_STATIC_SET_VALUE (cu_index_and_attrs, is_static);
- DW2_GDB_INDEX_SYMBOL_KIND_SET_VALUE (cu_index_and_attrs, kind);
-@@ -279,7 +288,7 @@ add_index_entry (struct mapped_symtab *symtab, const char *name,
- the last entry pushed), but a symbol could have multiple kinds in one CU.
- To keep things simple we don't worry about the duplication here and
- sort and uniquify the list after we've processed all symbols. */
-- slot.cu_indices.push_back (cu_index_and_attrs);
-+ slot->cu_indices.push_back (cu_index_and_attrs);
- }
-
- /* See symtab_index_entry. */
-diff --git a/gdb/testsuite/gdb.gdb/index-file.exp b/gdb/testsuite/gdb.gdb/index-file.exp
-new file mode 100644
---- /dev/null
-+++ b/gdb/testsuite/gdb.gdb/index-file.exp
-@@ -0,0 +1,118 @@
-+# Copyright 2023 Free Software Foundation, Inc.
-+
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 3 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program. If not, see <http://www.gnu.org/licenses/>.
-+
-+# Load the GDB executable, and then 'save gdb-index', and make some
-+# checks of the generated index file.
-+
-+load_lib selftest-support.exp
-+
-+# Can't save an index with readnow.
-+if {[readnow]} {
-+ untested "cannot create an index when readnow is in use"
-+ return -1
-+}
-+
-+# A multiplier used to ensure slow tasks are less likely to timeout.
-+set timeout_factor 20
-+
-+set filename [selftest_prepare]
-+if { $filename eq "" } {
-+ unsupported "${gdb_test_file_name}.exp"
-+ return -1
-+}
-+
-+with_timeout_factor $timeout_factor {
-+ # Start GDB, load FILENAME.
-+ clean_restart $filename
-+}
-+
-+# Generate an index file.
-+set dir1 [standard_output_file "index_1"]
-+remote_exec host "mkdir -p ${dir1}"
-+with_timeout_factor $timeout_factor {
-+ gdb_test_no_output "save gdb-index $dir1" \
-+ "create gdb-index file"
-+}
-+
-+# Close GDB.
-+gdb_exit
-+
-+# Validate that the index-file FILENAME has made efficient use of its
-+# symbol hash table. Calculate the number of symbols in the hash
-+# table and the total hash table size. The hash table starts with
-+# 1024 entries, and then doubles each time it is filled to 75%. At
-+# 75% filled, doubling the size takes it to 37.5% filled.
-+#
-+# Thus, the hash table is correctly filled if:
-+# 1. Its size is 1024 (i.e. it has not yet had its first doubling), or
-+# 2. Its filled percentage is over 37%
-+#
-+# We could check that it is not over filled, but I don't as that's not
-+# really an issue. But we did once have a bug where the table was
-+# doubled incorrectly, in which case we'd see a filled percentage of
-+# around 2% in some cases, which is a huge waste of disk space.
-+proc check_symbol_table_usage { filename } {
-+ # Open the file in binary mode and read-only mode.
-+ set fp [open $filename rb]
-+
-+ # Configure the channel to use binary translation.
-+ fconfigure $fp -translation binary
-+
-+ # Read the first 8 bytes of the file, which contain the header of
-+ # the index section.
-+ set header [read $fp [expr 7 * 4]]
-+
-+ # Scan the header to get the version, the CU list offset, and the
-+ # types CU list offset.
-+ binary scan $header iiiiii version \
-+ _ _ _ symbol_table_offset shortcut_offset
-+
-+ # The length of the symbol hash table (in entries).
-+ set len [expr ($shortcut_offset - $symbol_table_offset) / 8]
-+
-+ # Now walk the hash table and count how many entries are in use.
-+ set offset $symbol_table_offset
-+ set count 0
-+ while { $offset < $shortcut_offset } {
-+ seek $fp $offset
-+ set entry [read $fp 8]
-+ binary scan $entry ii name_ptr flags
-+ if { $name_ptr != 0 } {
-+ incr count
-+ }
-+
-+ incr offset 8
-+ }
-+
-+ # Close the file.
-+ close $fp
-+
-+ # Calculate how full the cache is.
-+ set pct [expr (100 * double($count)) / $len]
-+
-+ # Write our results out to the gdb.log.
-+ verbose -log "Hash table size: $len"
-+ verbose -log "Hash table entries: $count"
-+ verbose -log "Percentage usage: $pct%"
-+
-+ # The minimum fill percentage is actually 37.5%, but we give TCL a
-+ # little flexibility in case the FP maths give a result a little
-+ # off.
-+ gdb_assert { $len == 1024 || $pct > 37 } \
-+ "symbol hash table usage"
-+}
-+
-+set index_filename_base [file tail $filename]
-+check_symbol_table_usage "$dir1/${index_filename_base}.gdb-index"
diff --git a/gdb-rhbz2232086-refactor-selftest-support.patch b/gdb-rhbz2232086-refactor-selftest-support.patch
deleted file mode 100644
index e9febf7..0000000
--- a/gdb-rhbz2232086-refactor-selftest-support.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Fri, 24 Nov 2023 11:10:08 +0000
-Subject: gdb-rhbz2232086-refactor-selftest-support.patch
-
-;; Back-port upstream commit 1f0fab7ff86 as part of a fix for
-;; non-deterministic gdb-index generation (RH BZ 2232086).
-
-gdb/testsuite: small refactor in selftest-support.exp
-
-Split out the code that makes a copy of the GDB executable ready for
-self testing into a new proc. A later commit in this series wants to
-load the GDB executable into GDB (for creating an on-disk debug
-index), but doesn't need to make use of the full do_self_tests proc.
-
-There should be no changes in what is tested after this commit.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/testsuite/lib/selftest-support.exp b/gdb/testsuite/lib/selftest-support.exp
---- a/gdb/testsuite/lib/selftest-support.exp
-+++ b/gdb/testsuite/lib/selftest-support.exp
-@@ -92,11 +92,13 @@ proc selftest_setup { executable function } {
- return 0
- }
-
--# A simple way to run some self-tests.
--
--proc do_self_tests {function body} {
-- global GDB tool
--
-+# Prepare for running a self-test by moving the GDB executable to a
-+# location where we can use it as the inferior. Return the filename
-+# of the new location.
-+#
-+# If the current testing setup is not suitable for running a
-+# self-test, then return an empty string.
-+proc selftest_prepare {} {
- # Are we testing with a remote board? In that case, the target
- # won't have access to the GDB's auxilliary data files
- # (data-directory, etc.). It's simpler to just skip.
-@@ -120,19 +122,31 @@ proc do_self_tests {function body} {
- # Run the test with self. Copy the file executable file in case
- # this OS doesn't like to edit its own text space.
-
-- set GDB_FULLPATH [find_gdb $GDB]
-+ set gdb_fullpath [find_gdb $::GDB]
-
- if {[is_remote host]} {
-- set xgdb x$tool
-+ set xgdb x$::tool
- } else {
-- set xgdb [standard_output_file x$tool]
-+ set xgdb [standard_output_file x$::tool]
- }
-
- # Remove any old copy lying around.
- remote_file host delete $xgdb
-
-+ set filename [remote_download host $gdb_fullpath $xgdb]
-+
-+ return $filename
-+}
-+
-+# A simple way to run some self-tests.
-+
-+proc do_self_tests {function body} {
-+ set file [selftest_prepare]
-+ if { $file eq "" } {
-+ return
-+ }
-+
- gdb_start
-- set file [remote_download host $GDB_FULLPATH $xgdb]
-
- # When debugging GDB with GDB, some operations can take a relatively long
- # time, especially if the build is non-optimized. Bump the timeout for the
diff --git a/gdb-rhbz2250652-avoid-PyOS_ReadlineTState.patch b/gdb-rhbz2250652-avoid-PyOS_ReadlineTState.patch
deleted file mode 100644
index 1997ef9..0000000
--- a/gdb-rhbz2250652-avoid-PyOS_ReadlineTState.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Alexandra=20H=C3=A1jkov=C3=A1?= <ahajkova@redhat.com>
-Date: Mon, 8 Jan 2024 13:24:05 +0100
-Subject: gdb-rhbz2250652-avoid-PyOS_ReadlineTState.patch
-
-gdb/python: avoid use of _PyOS_ReadlineTState
-
-In python/py-gdb-readline.c we make use of _PyOS_ReadlineTState,
-however, this variable is no longer public in Python 3.13, and so GDB
-no longer builds.
-
-We are making use of _PyOS_ReadlineTState in order to re-acquire the
-Python Global Interpreter Lock (GIL). The _PyOS_ReadlineTState
-variable is set in Python's outer readline code prior to calling the
-user (GDB) supplied readline callback function, which for us is
-gdbpy_readline_wrapper. The gdbpy_readline_wrapper function is called
-without the GIL held.
-
-Instead of using _PyOS_ReadlineTState, I propose that we switch to
-calling PyGILState_Ensure() and PyGILState_Release(). These functions
-will acquire the GIL based on the current thread. I think this should
-be sufficient; I can't imagine why we'd be running
-gdbpy_readline_wrapper on one thread on behalf of a different Python
-thread.... that would be unexpected I think.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/python/py-gdb-readline.c b/gdb/python/py-gdb-readline.c
---- a/gdb/python/py-gdb-readline.c
-+++ b/gdb/python/py-gdb-readline.c
-@@ -56,13 +56,11 @@ gdbpy_readline_wrapper (FILE *sys_stdin, FILE *sys_stdout,
- if (except.reason == RETURN_QUIT)
- return NULL;
-
-- /* The thread state is nulled during gdbpy_readline_wrapper,
-- with the original value saved in the following undocumented
-- variable (see Python's Parser/myreadline.c and
-- Modules/readline.c). */
-- PyEval_RestoreThread (_PyOS_ReadlineTState);
-+
-+ /* This readline callback is called without the GIL held. */
-+ gdbpy_gil gil;
-+
- gdbpy_convert_exception (except);
-- PyEval_SaveThread ();
- return NULL;
- }
-
diff --git a/gdb-rhbz2250652-gdbpy_gil.patch b/gdb-rhbz2250652-gdbpy_gil.patch
deleted file mode 100644
index a72c350..0000000
--- a/gdb-rhbz2250652-gdbpy_gil.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Alexandra=20H=C3=A1jkov=C3=A1?= <ahajkova@redhat.com>
-Date: Mon, 8 Jan 2024 13:12:15 +0100
-Subject: gdb-rhbz2250652-gdbpy_gil.patch
-
-gdb: move gdbpy_gil into python-internal.h
-
-Move gdbpy_gil class into python-internal.h, the next
-commit wants to make use of this class from a file other
-than python.c.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/python/python-internal.h b/gdb/python/python-internal.h
---- a/gdb/python/python-internal.h
-+++ b/gdb/python/python-internal.h
-@@ -754,6 +754,30 @@ class gdbpy_allow_threads
- PyThreadState *m_save;
- };
-
-+/* A helper class to save and restore the GIL, but without touching
-+ the other globals that are handled by gdbpy_enter. */
-+
-+class gdbpy_gil
-+{
-+public:
-+
-+ gdbpy_gil ()
-+ : m_state (PyGILState_Ensure ())
-+ {
-+ }
-+
-+ ~gdbpy_gil ()
-+ {
-+ PyGILState_Release (m_state);
-+ }
-+
-+ DISABLE_COPY_AND_ASSIGN (gdbpy_gil);
-+
-+private:
-+
-+ PyGILState_STATE m_state;
-+};
-+
- /* Use this after a TRY_EXCEPT to throw the appropriate Python
- exception. */
- #define GDB_PY_HANDLE_EXCEPTION(Exception) \
-diff --git a/gdb/python/python.c b/gdb/python/python.c
---- a/gdb/python/python.c
-+++ b/gdb/python/python.c
-@@ -257,30 +257,6 @@ gdbpy_enter::finalize ()
- python_gdbarch = target_gdbarch ();
- }
-
--/* A helper class to save and restore the GIL, but without touching
-- the other globals that are handled by gdbpy_enter. */
--
--class gdbpy_gil
--{
--public:
--
-- gdbpy_gil ()
-- : m_state (PyGILState_Ensure ())
-- {
-- }
--
-- ~gdbpy_gil ()
-- {
-- PyGILState_Release (m_state);
-- }
--
-- DISABLE_COPY_AND_ASSIGN (gdbpy_gil);
--
--private:
--
-- PyGILState_STATE m_state;
--};
--
- /* Set the quit flag. */
-
- static void
diff --git a/gdb-rhbz2261580-intrusive_list-assertion-fix.patch b/gdb-rhbz2261580-intrusive_list-assertion-fix.patch
deleted file mode 100644
index adb8eb7..0000000
--- a/gdb-rhbz2261580-intrusive_list-assertion-fix.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Kevin Buettner <kevinb@redhat.com>
-Date: Mon, 29 Jan 2024 14:51:22 -0700
-Subject: gdb-rhbz2261580-intrusive_list-assertion-fix.patch
-
-;; Backport upstream workaround for GCC 14 problem which cause assertion
-;; failures in GDB.
-
-[gdb/build] Workaround gcc PR113599
-
-Since gcc commit d3f48f68227 ("c++: non-dependent .* operand folding
-[PR112427]"), with gdb we run into PR gcc/113599 [1], a wrong-code bug, as
-reported in PR build/31281.
-
-Work around this by flipping inherit order:
-...
--class thread_info : public refcounted_object,
-- public intrusive_list_node<thread_info>
-+class thread_info : public intrusive_list_node<thread_info>,
-+ public refcounted_object
-...
-
-An argument could be made that this isn't necessary, because this occurred in
-an unreleased gcc version.
-
-However, I think it could be useful when bisecting gcc for other problems in
-building gdb. Having this workaround means the bisect won't reintroduce the
-problem. Furthermore, the workaround is harmless.
-
-Tested on Fedora rawhide x86_64.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31281
-
-[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113599
-
-diff --git a/gdb/gdbthread.h b/gdb/gdbthread.h
---- a/gdb/gdbthread.h
-+++ b/gdb/gdbthread.h
-@@ -242,10 +242,11 @@ using private_thread_info_up = std::unique_ptr<private_thread_info>;
- strong reference, and is thus not accounted for in the thread's
- refcount.
-
-- The intrusive_list_node base links threads in a per-inferior list. */
-+ The intrusive_list_node base links threads in a per-inferior list.
-+ We place it first in the inherit order to work around PR gcc/113599. */
-
--class thread_info : public refcounted_object,
-- public intrusive_list_node<thread_info>
-+class thread_info : public intrusive_list_node<thread_info>,
-+ public refcounted_object
- {
- public:
- explicit thread_info (inferior *inf, ptid_t ptid);
diff --git a/gdb-rhbz2277160-apx-disasm.patch b/gdb-rhbz2277160-apx-disasm.patch
deleted file mode 100644
index 1dbcf20..0000000
--- a/gdb-rhbz2277160-apx-disasm.patch
+++ /dev/null
@@ -1,7834 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Keith Seitz <keiths@redhat.com>
-Date: Wed, 15 May 2024 09:59:51 -0700
-Subject: gdb-rhbz2277160-apx-disasm.patch
-
-;; Update x86 disassembler
-
-Update x86 disassembler with APX improvements by syncing
-with gdb-15.1 release candidate.
-
-Resolves: rhbz#2277160
-
-diff --git a/include/opcode/i386.h b/include/opcode/i386.h
---- a/include/opcode/i386.h
-+++ b/include/opcode/i386.h
-@@ -1,5 +1,5 @@
- /* opcode/i386.h -- Intel 80386 opcode macros
-- Copyright (C) 1989-2023 Free Software Foundation, Inc.
-+ Copyright (C) 1989-2024 Free Software Foundation, Inc.
-
- This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
-
-@@ -112,9 +112,13 @@
- /* x86-64 extension prefix. */
- #define REX_OPCODE 0x40
-
-+#define REX2_OPCODE 0xd5
-+
- /* Non-zero if OPCODE is the rex prefix. */
- #define REX_PREFIX_P(opcode) (((opcode) & 0xf0) == REX_OPCODE)
-
-+/* M0 in rex2 prefix represents map0 or map1. */
-+#define REX2_M 0x8
- /* Indicates 64 bit operand size. */
- #define REX_W 8
- /* High extension to reg field of modrm byte. */
-diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h
---- a/opcodes/i386-dis-evex-mod.h
-+++ b/opcodes/i386-dis-evex-mod.h
-@@ -1 +1,10 @@
--/* Nothing at present. */
-+ /* MOD_EVEX_MAP4_F8_P1 */
-+ {
-+ { "enqcmds", { Gva, M }, 0 },
-+ { VEX_W_TABLE (EVEX_W_MAP4_F8_P1_M_1) },
-+ },
-+ /* MOD_EVEX_MAP4_F8_P3 */
-+ {
-+ { "enqcmd", { Gva, M }, 0 },
-+ { VEX_W_TABLE (EVEX_W_MAP4_F8_P3_M_1) },
-+ },
-diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
---- a/opcodes/i386-dis-evex-prefix.h
-+++ b/opcodes/i386-dis-evex-prefix.h
-@@ -338,6 +338,29 @@
- { "vcmpp%XH", { MaskG, Vex, EXxh, EXxEVexS, CMP }, 0 },
- { "vcmps%XH", { MaskG, VexScalar, EXw, EXxEVexS, CMP }, 0 },
- },
-+ /* PREFIX_EVEX_MAP4_F0 */
-+ {
-+ { "crc32A", { Gdq, Eb }, 0 },
-+ { "invept", { Gm, Mo }, 0 },
-+ },
-+ /* PREFIX_EVEX_MAP4_F1 */
-+ {
-+ { "crc32Q", { Gdq, Ev }, 0 },
-+ { "invvpid", { Gm, Mo }, 0 },
-+ { "crc32Q", { Gdq, Ev }, 0 },
-+ },
-+ /* PREFIX_EVEX_MAP4_F2 */
-+ {
-+ { Bad_Opcode },
-+ { "invpcid", { Gm, M }, 0 },
-+ },
-+ /* PREFIX_EVEX_MAP4_F8 */
-+ {
-+ { Bad_Opcode },
-+ { MOD_TABLE (MOD_EVEX_MAP4_F8_P_1) },
-+ { "movdir64b", { Gva, M }, 0 },
-+ { MOD_TABLE (MOD_EVEX_MAP4_F8_P_3) },
-+ },
- /* PREFIX_EVEX_MAP5_10 */
- {
- { Bad_Opcode },
-diff --git a/opcodes/i386-dis-evex-reg.h b/opcodes/i386-dis-evex-reg.h
---- a/opcodes/i386-dis-evex-reg.h
-+++ b/opcodes/i386-dis-evex-reg.h
-@@ -49,3 +49,74 @@
- { "vscatterpf0qp%XW", { MVexVSIBQWpX }, PREFIX_DATA },
- { "vscatterpf1qp%XW", { MVexVSIBQWpX }, PREFIX_DATA },
- },
-+ /* REG_EVEX_MAP4_80 */
-+ {
-+ { "%NFaddA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NForA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "adcA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "sbbA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NFandA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NFsubA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NFxorA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ },
-+ /* REG_EVEX_MAP4_81 */
-+ {
-+ { "%NFaddQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
-+ { "%NForQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
-+ { "adcQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
-+ { "sbbQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
-+ { "%NFandQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
-+ { "%NFsubQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
-+ { "%NFxorQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
-+ },
-+ /* REG_EVEX_MAP4_83 */
-+ {
-+ { "%NFaddQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
-+ { "%NForQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
-+ { "adcQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
-+ { "sbbQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
-+ { "%NFandQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
-+ { "%NFsubQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
-+ { "%NFxorQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
-+ },
-+ /* REG_EVEX_MAP4_8F */
-+ {
-+ { VEX_W_TABLE (EVEX_W_MAP4_8F_R_0) },
-+ },
-+ /* REG_EVEX_MAP4_F6 */
-+ {
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { "notA", { VexGb, Eb }, NO_PREFIX },
-+ { "%NFnegA", { VexGb, Eb }, NO_PREFIX },
-+ { "%NFmulA", { Eb }, NO_PREFIX },
-+ { "%NFimulA", { Eb }, NO_PREFIX },
-+ { "%NFdivA", { Eb }, NO_PREFIX },
-+ { "%NFidivA", { Eb }, NO_PREFIX },
-+ },
-+ /* REG_EVEX_MAP4_F7 */
-+ {
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { "notQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%NFnegQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%NFmulQ", { Ev }, PREFIX_NP_OR_DATA },
-+ { "%NFimulQ", { Ev }, PREFIX_NP_OR_DATA },
-+ { "%NFdivQ", { Ev }, PREFIX_NP_OR_DATA },
-+ { "%NFidivQ", { Ev }, PREFIX_NP_OR_DATA },
-+ },
-+ /* REG_EVEX_MAP4_FE */
-+ {
-+ { "%NFincA", { VexGb, Eb }, NO_PREFIX },
-+ { "%NFdecA", { VexGb, Eb }, NO_PREFIX },
-+ },
-+ /* REG_EVEX_MAP4_FF */
-+ {
-+ { "%NFincQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%NFdecQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { VEX_W_TABLE (EVEX_W_MAP4_FF_R_6) },
-+ },
-diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
---- a/opcodes/i386-dis-evex-w.h
-+++ b/opcodes/i386-dis-evex-w.h
-@@ -442,6 +442,24 @@
- { Bad_Opcode },
- { "vpshrdw", { XM, Vex, EXx, Ib }, 0 },
- },
-+ /* EVEX_W_MAP4_8F_R_0 */
-+ {
-+ { "pop2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, NO_PREFIX },
-+ { "pop2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, NO_PREFIX },
-+ },
-+ /* EVEX_W_MAP4_F8_P1_M_1 */
-+ {
-+ { "uwrmsr", { Gq, Eq }, 0 },
-+ },
-+ /* EVEX_W_MAP4_F8_P3_M_1 */
-+ {
-+ { "urdmsr", { Eq, Gq }, 0 },
-+ },
-+ /* EVEX_W_MAP4_FF_R_6 */
-+ {
-+ { "push2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
-+ { "push2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
-+ },
- /* EVEX_W_MAP5_5B_P_0 */
- {
- { "vcvtdq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
-diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
---- a/opcodes/i386-dis-evex.h
-+++ b/opcodes/i386-dis-evex.h
-@@ -164,10 +164,10 @@ static const struct dis386 evex_table[][256] = {
- { Bad_Opcode },
- { Bad_Opcode },
- /* 90 */
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-+ { X86_64_EVEX_W_TABLE (VEX_W_0F90_L_0) },
-+ { X86_64_EVEX_W_TABLE (VEX_W_0F91_L_0) },
-+ { X86_64_EVEX_W_TABLE (VEX_W_0F92_L_0) },
-+ { X86_64_EVEX_W_TABLE (VEX_W_0F93_L_0) },
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
-@@ -375,9 +375,9 @@ static const struct dis386 evex_table[][256] = {
- { "vpsllv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
- /* 48 */
- { Bad_Opcode },
-+ { X86_64_EVEX_MEM_W_TABLE (VEX_W_0F3849_X86_64_L_0) },
- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-+ { X86_64_EVEX_MEM_W_TABLE (VEX_W_0F384B_X86_64_L_0) },
- { "vrcp14p%XW", { XM, EXx }, PREFIX_DATA },
- { "vrcp14s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
- { "vrsqrt14p%XW", { XM, EXx }, 0 },
-@@ -545,32 +545,32 @@ static const struct dis386 evex_table[][256] = {
- { "%XEvaesdecY", { XM, Vex, EXx }, PREFIX_DATA },
- { "%XEvaesdeclastY", { XM, Vex, EXx }, PREFIX_DATA },
- /* E0 */
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E0) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E1) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E2) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E3) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E4) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E5) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E6) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E7) },
- /* E8 */
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E8) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38E9) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EA) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EB) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EC) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38ED) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EE) },
-+ { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F38EF) },
- /* F0 */
- { Bad_Opcode },
- { Bad_Opcode },
-+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F2_L_0) },
-+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F3_L_0) },
- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-- { Bad_Opcode },
-+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F5_L_0) },
-+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F6_L_0) },
-+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F38F7_L_0) },
- /* F8 */
- { Bad_Opcode },
- { Bad_Opcode },
-@@ -854,7 +854,7 @@ static const struct dis386 evex_table[][256] = {
- { Bad_Opcode },
- { Bad_Opcode },
- /* F0 */
-- { Bad_Opcode },
-+ { X86_64_EVEX_PFX_TABLE (PREFIX_VEX_0F3AF0_L_0) },
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
-@@ -872,6 +872,297 @@ static const struct dis386 evex_table[][256] = {
- { Bad_Opcode },
- { Bad_Opcode },
- },
-+ /* EVEX_MAP4_ */
-+ {
-+ /* 00 */
-+ { "%NFaddB", { VexGb, Eb, Gb }, NO_PREFIX },
-+ { "%NFaddS", { VexGv, Ev, Gv }, PREFIX_NP_OR_DATA },
-+ { "%NFaddB", { VexGb, Gb, EbS }, NO_PREFIX },
-+ { "%NFaddS", { VexGv, Gv, EvS }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 08 */
-+ { "%NForB", { VexGb, Eb, Gb }, NO_PREFIX },
-+ { "%NForS", { VexGv, Ev, Gv }, PREFIX_NP_OR_DATA },
-+ { "%NForB", { VexGb, Gb, EbS }, NO_PREFIX },
-+ { "%NForS", { VexGv, Gv, EvS }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 10 */
-+ { "adcB", { VexGb, Eb, Gb }, NO_PREFIX },
-+ { "adcS", { VexGv, Ev, Gv }, PREFIX_NP_OR_DATA },
-+ { "adcB", { VexGb, Gb, EbS }, NO_PREFIX },
-+ { "adcS", { VexGv, Gv, EvS }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 18 */
-+ { "sbbB", { VexGb, Eb, Gb }, NO_PREFIX },
-+ { "sbbS", { VexGv, Ev, Gv }, PREFIX_NP_OR_DATA },
-+ { "sbbB", { VexGb, Gb, EbS }, NO_PREFIX },
-+ { "sbbS", { VexGv, Gv, EvS }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 20 */
-+ { "%NFandB", { VexGb, Eb, Gb }, NO_PREFIX },
-+ { "%NFandS", { VexGv, Ev, Gv }, PREFIX_NP_OR_DATA },
-+ { "%NFandB", { VexGb, Gb, EbS }, NO_PREFIX },
-+ { "%NFandS", { VexGv, Gv, EvS }, PREFIX_NP_OR_DATA },
-+ { "%NFshldS", { VexGv, Ev, Gv, Ib }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 28 */
-+ { "%NFsubB", { VexGb, Eb, Gb }, NO_PREFIX },
-+ { "%NFsubS", { VexGv, Ev, Gv }, PREFIX_NP_OR_DATA },
-+ { "%NFsubB", { VexGb, Gb, EbS }, NO_PREFIX },
-+ { "%NFsubS", { VexGv, Gv, EvS }, PREFIX_NP_OR_DATA },
-+ { "%NFshrdS", { VexGv, Ev, Gv, Ib }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 30 */
-+ { "%NFxorB", { VexGb, Eb, Gb }, NO_PREFIX },
-+ { "%NFxorS", { VexGv, Ev, Gv }, PREFIX_NP_OR_DATA },
-+ { "%NFxorB", { VexGb, Gb, EbS }, NO_PREFIX },
-+ { "%NFxorS", { VexGv, Gv, EvS }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 38 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 40 */
-+ { "%CFcmovoS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovnoS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovbS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovaeS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmoveS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovneS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovbeS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovaS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ /* 48 */
-+ { "%CFcmovsS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovnsS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovpS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovnpS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovlS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovgeS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovleS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%CFcmovgS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ /* 50 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 58 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 60 */
-+ { "%MEmovbeS", { Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%MEmovbeS", { Ev, Gv }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { "wrussK", { M, Gdq }, PREFIX_DATA },
-+ { PREFIX_TABLE (PREFIX_0F38F6) },
-+ { Bad_Opcode },
-+ /* 68 */
-+ { Bad_Opcode },
-+ { "%NFimulS", { Gv, Ev, Iv }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { "%NFimulS", { Gv, Ev, sIb }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 70 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 78 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 80 */
-+ { REG_TABLE (REG_EVEX_MAP4_80) },
-+ { REG_TABLE (REG_EVEX_MAP4_81) },
-+ { Bad_Opcode },
-+ { REG_TABLE (REG_EVEX_MAP4_83) },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 88 */
-+ { "%NFpopcntS", { Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { REG_TABLE (REG_EVEX_MAP4_8F) },
-+ /* 90 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* 98 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* A0 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { "%NFshldS", { VexGv, Ev, Gv, CL }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* A8 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { "%NFshrdS", { VexGv, Ev, Gv, CL }, PREFIX_NP_OR_DATA },
-+ { Bad_Opcode },
-+ { "%NFimulS", { VexGv, Gv, Ev }, PREFIX_NP_OR_DATA },
-+ /* B0 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* B8 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* C0 */
-+ { REG_TABLE (REG_C0) },
-+ { REG_TABLE (REG_C1) },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* C8 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* D0 */
-+ { REG_TABLE (REG_D0) },
-+ { REG_TABLE (REG_D1) },
-+ { REG_TABLE (REG_D2) },
-+ { REG_TABLE (REG_D3) },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* D8 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* E0 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* E8 */
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ /* F0 */
-+ { PREFIX_TABLE (PREFIX_EVEX_MAP4_F0) },
-+ { PREFIX_TABLE (PREFIX_EVEX_MAP4_F1) },
-+ { PREFIX_TABLE (PREFIX_EVEX_MAP4_F2) },
-+ { Bad_Opcode },
-+ { "%NFtzcntS", { Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { "%NFlzcntS", { Gv, Ev }, PREFIX_NP_OR_DATA },
-+ { REG_TABLE (REG_EVEX_MAP4_F6) },
-+ { REG_TABLE (REG_EVEX_MAP4_F7) },
-+ /* F8 */
-+ { PREFIX_TABLE (PREFIX_EVEX_MAP4_F8) },
-+ { "movdiri", { Mdq, Gdq }, NO_PREFIX },
-+ { Bad_Opcode },
-+ { Bad_Opcode },
-+ { PREFIX_TABLE (PREFIX_0F38FC) },
-+ { Bad_Opcode },
-+ { REG_TABLE (REG_EVEX_MAP4_FE) },
-+ { REG_TABLE (REG_EVEX_MAP4_FF) },
-+ },
- /* EVEX_MAP5_ */
- {
- /* 00 */
-diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
---- a/opcodes/i386-dis.c
-+++ b/opcodes/i386-dis.c
-@@ -1,5 +1,5 @@
- /* Print i386 instructions for GDB, the GNU debugger.
-- Copyright (C) 1988-2023 Free Software Foundation, Inc.
-+ Copyright (C) 1988-2024 Free Software Foundation, Inc.
-
- This file is part of the GNU opcodes library.
-
-@@ -105,6 +105,8 @@ static bool FXSAVE_Fixup (instr_info *, int, int);
- static bool MOVSXD_Fixup (instr_info *, int, int);
- static bool DistinctDest_Fixup (instr_info *, int, int);
- static bool PREFETCHI_Fixup (instr_info *, int, int);
-+static bool PUSH2_POP2_Fixup (instr_info *, int, int);
-+static bool JMPABS_Fixup (instr_info *, int, int);
-
- static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *,
- enum disassembler_style,
-@@ -132,6 +134,13 @@ enum x86_64_isa
- intel64
- };
-
-+enum evex_type
-+{
-+ evex_default = 0,
-+ evex_from_legacy,
-+ evex_from_vex,
-+};
-+
- struct instr_info
- {
- enum address_mode address_mode;
-@@ -144,6 +153,12 @@ struct instr_info
- /* Bits of REX we've already used. */
- uint8_t rex_used;
-
-+ /* Record W R4 X4 B4 bits for rex2. */
-+ unsigned char rex2;
-+ /* Bits of rex2 we've already used. */
-+ unsigned char rex2_used;
-+ unsigned char rex2_payload;
-+
- bool need_modrm;
- unsigned char need_vex;
- bool has_sib;
-@@ -169,6 +184,7 @@ struct instr_info
- signed char last_data_prefix;
- signed char last_addr_prefix;
- signed char last_rex_prefix;
-+ signed char last_rex2_prefix;
- signed char last_seg_prefix;
- signed char fwait_prefix;
- /* The active segment register prefix. */
-@@ -205,14 +221,19 @@ struct instr_info
- int ll;
- bool w;
- bool evex;
-- bool r;
- bool v;
- bool zeroing;
- bool b;
- bool no_broadcast;
-+ bool nf;
- }
- vex;
-
-+/* For APX EVEX-promoted prefix, EVEX.ND shares the same bit as vex.b. */
-+#define nd b
-+
-+ enum evex_type evex_type;
-+
- /* Remember if the current op is a jump instruction. */
- bool op_is_jump;
-
-@@ -221,6 +242,9 @@ struct instr_info
- /* Record whether EVEX masking is used incorrectly. */
- bool illegal_masking;
-
-+ /* Record whether the modrm byte has been skipped. */
-+ bool has_skipped_modrm;
-+
- unsigned char op_ad;
- signed char op_index[MAX_OPERANDS];
- bool op_riprel[MAX_OPERANDS];
-@@ -262,8 +286,13 @@ struct dis_private {
- { \
- if (value) \
- { \
-- if ((ins->rex & value)) \
-+ if (ins->rex & value) \
- ins->rex_used |= (value) | REX_OPCODE; \
-+ if (ins->rex2 & value) \
-+ { \
-+ ins->rex2_used |= (value); \
-+ ins->rex_used |= REX_OPCODE; \
-+ } \
- } \
- else \
- ins->rex_used |= REX_OPCODE; \
-@@ -273,6 +302,10 @@ struct dis_private {
- #define EVEX_b_used 1
- #define EVEX_len_used 2
-
-+
-+/* {rex2} is not printed when the REX2_SPECIAL is set. */
-+#define REX2_SPECIAL 16
-+
- /* Flags stored in PREFIXES. */
- #define PREFIX_REPZ 1
- #define PREFIX_REPNZ 2
-@@ -286,6 +319,9 @@ struct dis_private {
- #define PREFIX_DATA 0x200
- #define PREFIX_ADDR 0x400
- #define PREFIX_FWAIT 0x800
-+#define PREFIX_REX2 0x1000
-+#define PREFIX_NP_OR_DATA 0x2000
-+#define NO_PREFIX 0x4000
-
- /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
- to ADDR (exclusive) are valid. Returns true for success, false
-@@ -367,6 +403,7 @@ fetch_error (const instr_info *ins)
- #define PREFIX_IGNORED_DATA (PREFIX_DATA << PREFIX_IGNORED_SHIFT)
- #define PREFIX_IGNORED_ADDR (PREFIX_ADDR << PREFIX_IGNORED_SHIFT)
- #define PREFIX_IGNORED_LOCK (PREFIX_LOCK << PREFIX_IGNORED_SHIFT)
-+#define PREFIX_REX2_ILLEGAL (PREFIX_REX2 << PREFIX_IGNORED_SHIFT)
-
- /* Opcode prefixes. */
- #define PREFIX_OPCODE (PREFIX_REPZ \
-@@ -418,6 +455,7 @@ fetch_error (const instr_info *ins)
- #define Gv { OP_G, v_mode }
- #define Gd { OP_G, d_mode }
- #define Gdq { OP_G, dq_mode }
-+#define Gq { OP_G, q_mode }
- #define Gm { OP_G, m_mode }
- #define Gva { OP_G, va_mode }
- #define Gw { OP_G, w_mode }
-@@ -527,7 +565,8 @@ fetch_error (const instr_info *ins)
- #define EXEvexXNoBcst { OP_EX, evex_x_nobcst_mode }
- #define Rd { OP_R, d_mode }
- #define Rdq { OP_R, dq_mode }
--#define Nq { OP_R, q_mode }
-+#define Rq { OP_R, q_mode }
-+#define Nq { OP_R, q_mm_mode }
- #define Ux { OP_R, x_mode }
- #define Uxmm { OP_R, xmm_mode }
- #define Rxmmq { OP_R, xmmq_mode }
-@@ -548,6 +587,8 @@ fetch_error (const instr_info *ins)
- #define VexGatherD { OP_VEX, vex_vsib_d_w_dq_mode }
- #define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
- #define VexGdq { OP_VEX, dq_mode }
-+#define VexGb { OP_VEX, b_mode }
-+#define VexGv { OP_VEX, v_mode }
- #define VexTmm { OP_VEX, tmm_mode }
- #define XMVexI4 { OP_REG_VexI4, x_mode }
- #define XMVexScalarI4 { OP_REG_VexI4, scalar_mode }
-@@ -624,6 +665,8 @@ enum
- d_swap_mode,
- /* quad word operand */
- q_mode,
-+ /* 8-byte MM operand */
-+ q_mm_mode,
- /* quad word operand with operand swapped */
- q_swap_mode,
- /* ten-byte operand */
-@@ -778,6 +821,10 @@ enum
- USE_RM_TABLE,
- USE_PREFIX_TABLE,
- USE_X86_64_TABLE,
-+ USE_X86_64_EVEX_FROM_VEX_TABLE,
-+ USE_X86_64_EVEX_PFX_TABLE,
-+ USE_X86_64_EVEX_W_TABLE,
-+ USE_X86_64_EVEX_MEM_W_TABLE,
- USE_3BYTE_TABLE,
- USE_XOP_8F_TABLE,
- USE_VEX_C4_TABLE,
-@@ -796,6 +843,11 @@ enum
- #define RM_TABLE(I) DIS386 (USE_RM_TABLE, (I))
- #define PREFIX_TABLE(I) DIS386 (USE_PREFIX_TABLE, (I))
- #define X86_64_TABLE(I) DIS386 (USE_X86_64_TABLE, (I))
-+#define X86_64_EVEX_FROM_VEX_TABLE(I) \
-+ DIS386 (USE_X86_64_EVEX_FROM_VEX_TABLE, (I))
-+#define X86_64_EVEX_PFX_TABLE(I) DIS386 (USE_X86_64_EVEX_PFX_TABLE, (I))
-+#define X86_64_EVEX_W_TABLE(I) DIS386 (USE_X86_64_EVEX_W_TABLE, (I))
-+#define X86_64_EVEX_MEM_W_TABLE(I) DIS386 (USE_X86_64_EVEX_MEM_W_TABLE, (I))
- #define THREE_BYTE_TABLE(I) DIS386 (USE_3BYTE_TABLE, (I))
- #define XOP_8F_TABLE() DIS386 (USE_XOP_8F_TABLE, 0)
- #define VEX_C4_TABLE() DIS386 (USE_VEX_C4_TABLE, 0)
-@@ -844,7 +896,8 @@ enum
- REG_VEX_0F73,
- REG_VEX_0FAE,
- REG_VEX_0F3849_X86_64_L_0_W_0_M_1_P_0,
-- REG_VEX_0F38F3_L_0,
-+ REG_VEX_0F38F3_L_0_P_0,
-+ REG_VEX_MAP7_F8_L_0_W_0,
-
- REG_XOP_09_01_L_0,
- REG_XOP_09_02_L_0,
-@@ -855,7 +908,15 @@ enum
- REG_EVEX_0F72,
- REG_EVEX_0F73,
- REG_EVEX_0F38C6_L_2,
-- REG_EVEX_0F38C7_L_2
-+ REG_EVEX_0F38C7_L_2,
-+ REG_EVEX_MAP4_80,
-+ REG_EVEX_MAP4_81,
-+ REG_EVEX_MAP4_83,
-+ REG_EVEX_MAP4_8F,
-+ REG_EVEX_MAP4_F6,
-+ REG_EVEX_MAP4_F7,
-+ REG_EVEX_MAP4_FE,
-+ REG_EVEX_MAP4_FF,
- };
-
- enum
-@@ -893,8 +954,12 @@ enum
- MOD_0FC7_REG_6,
- MOD_0FC7_REG_7,
- MOD_0F38DC_PREFIX_1,
-+ MOD_0F38F8,
-
- MOD_VEX_0F3849_X86_64_L_0_W_0,
-+
-+ MOD_EVEX_MAP4_F8_P_1,
-+ MOD_EVEX_MAP4_F8_P_3,
- };
-
- enum
-@@ -1010,7 +1075,8 @@ enum
- PREFIX_0F38F0,
- PREFIX_0F38F1,
- PREFIX_0F38F6,
-- PREFIX_0F38F8,
-+ PREFIX_0F38F8_M_0,
-+ PREFIX_0F38F8_M_1_X86_64,
- PREFIX_0F38FA,
- PREFIX_0F38FB,
- PREFIX_0F38FC,
-@@ -1069,10 +1135,13 @@ enum
- PREFIX_VEX_0F38CC,
- PREFIX_VEX_0F38CD,
- PREFIX_VEX_0F38DA_W_0,
-+ PREFIX_VEX_0F38F2_L_0,
-+ PREFIX_VEX_0F38F3_L_0,
- PREFIX_VEX_0F38F5_L_0,
- PREFIX_VEX_0F38F6_L_0,
- PREFIX_VEX_0F38F7_L_0,
- PREFIX_VEX_0F3AF0_L_0,
-+ PREFIX_VEX_MAP7_F8_L_0_W_0_R_0_X86_64,
-
- PREFIX_EVEX_0F5B,
- PREFIX_EVEX_0F6F,
-@@ -1130,6 +1199,11 @@ enum
- PREFIX_EVEX_0F3A67,
- PREFIX_EVEX_0F3AC2,
-
-+ PREFIX_EVEX_MAP4_F0,
-+ PREFIX_EVEX_MAP4_F1,
-+ PREFIX_EVEX_MAP4_F2,
-+ PREFIX_EVEX_MAP4_F8,
-+
- PREFIX_EVEX_MAP5_10,
- PREFIX_EVEX_MAP5_11,
- PREFIX_EVEX_MAP5_1D,
-@@ -1217,6 +1291,7 @@ enum
- X86_64_0F18_REG_7_MOD_0,
- X86_64_0F24,
- X86_64_0F26,
-+ X86_64_0F38F8_M_1,
- X86_64_0FC7_REG_6_MOD_3_PREFIX_1,
-
- X86_64_VEX_0F3849,
-@@ -1240,6 +1315,8 @@ enum
- X86_64_VEX_0F38ED,
- X86_64_VEX_0F38EE,
- X86_64_VEX_0F38EF,
-+
-+ X86_64_VEX_MAP7_F8_L_0_W_0_R_0,
- };
-
- enum
-@@ -1259,7 +1336,8 @@ enum
- {
- VEX_0F = 0,
- VEX_0F38,
-- VEX_0F3A
-+ VEX_0F3A,
-+ VEX_MAP7,
- };
-
- enum
-@@ -1267,8 +1345,10 @@ enum
- EVEX_0F = 0,
- EVEX_0F38,
- EVEX_0F3A,
-+ EVEX_MAP4,
- EVEX_MAP5,
- EVEX_MAP6,
-+ EVEX_MAP7,
- };
-
- enum
-@@ -1350,6 +1430,7 @@ enum
- VEX_LEN_0F3ADE_W_0,
- VEX_LEN_0F3ADF,
- VEX_LEN_0F3AF0,
-+ VEX_LEN_MAP7_F8,
- VEX_LEN_XOP_08_85,
- VEX_LEN_XOP_08_86,
- VEX_LEN_XOP_08_87,
-@@ -1510,6 +1591,7 @@ enum
- VEX_W_0F3ACE,
- VEX_W_0F3ACF,
- VEX_W_0F3ADE,
-+ VEX_W_MAP7_F8_L_0,
-
- VEX_W_XOP_08_85_L_0,
- VEX_W_XOP_08_86_L_0,
-@@ -1656,6 +1738,11 @@ enum
- EVEX_W_0F3A70,
- EVEX_W_0F3A72,
-
-+ EVEX_W_MAP4_8F_R_0,
-+ EVEX_W_MAP4_F8_P1_M_1,
-+ EVEX_W_MAP4_F8_P3_M_1,
-+ EVEX_W_MAP4_FF_R_6,
-+
- EVEX_W_MAP5_5B_P_0,
- EVEX_W_MAP5_7A_P_3,
- };
-@@ -1673,7 +1760,7 @@ struct dis386 {
- };
-
- /* Upper case letters in the instruction names here are macros.
-- 'A' => print 'b' if no register operands or suffix_always is true
-+ 'A' => print 'b' if no (suitable) register operand or suffix_always is true
- 'B' => print 'b' if suffix_always is true
- 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
- size prefix
-@@ -1686,14 +1773,14 @@ struct dis386 {
- 'I' unused.
- 'J' unused.
- 'K' => print 'd' or 'q' if rex prefix is present.
-- 'L' unused.
-+ 'L' => print 'l' or 'q' if suffix_always is true
- 'M' => print 'r' if intel_mnemonic is false.
- 'N' => print 'n' if instruction has no wait "prefix"
- 'O' => print 'd' or 'o' (or 'q' in Intel mode)
- 'P' => behave as 'T' except with register operand outside of suffix_always
- mode
-- 'Q' => print 'w', 'l' or 'q' for memory operand or suffix_always
-- is true
-+ 'Q' => print 'w', 'l' or 'q' if no (suitable) register operand or
-+ suffix_always is true
- 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
- 'S' => print 'w', 'l' or 'q' if suffix_always is true
- 'T' => print 'w', 'l'/'d', or 'q' if instruction has an operand size
-@@ -1724,6 +1811,11 @@ struct dis386 {
- "XV" => print "{vex} " pseudo prefix
- "XE" => print "{evex} " pseudo prefix if no EVEX-specific functionality is
- is used by an EVEX-encoded (AVX512VL) instruction.
-+ "ME" => print "{evex} " pseudo prefix for ins->modrm.mod != 3,if no
-+ EVEX-specific functionality is used by an EVEX-encoded (AVX512VL)
-+ instruction.
-+ "NF" => print "{nf} " pseudo prefix when EVEX.NF = 1 and print "{evex} "
-+ pseudo prefix when instructions without NF, EGPR and VVVV,
- "YK" keep unused, to avoid ambiguity with the combined use of Y and K.
- "YX" keep unused, to avoid ambiguity with the combined use of Y and X.
- "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
-@@ -1836,23 +1928,23 @@ static const struct dis386 dis386[] = {
- { "dec{S|}", { RMeSI }, 0 },
- { "dec{S|}", { RMeDI }, 0 },
- /* 50 */
-- { "push{!P|}", { RMrAX }, 0 },
-- { "push{!P|}", { RMrCX }, 0 },
-- { "push{!P|}", { RMrDX }, 0 },
-- { "push{!P|}", { RMrBX }, 0 },
-- { "push{!P|}", { RMrSP }, 0 },
-- { "push{!P|}", { RMrBP }, 0 },
-- { "push{!P|}", { RMrSI }, 0 },
-- { "push{!P|}", { RMrDI }, 0 },
-+ { "push!P", { RMrAX }, 0 },
-+ { "push!P", { RMrCX }, 0 },
-+ { "push!P", { RMrDX }, 0 },
-+ { "push!P", { RMrBX }, 0 },
-+ { "push!P", { RMrSP }, 0 },
-+ { "push!P", { RMrBP }, 0 },
-+ { "push!P", { RMrSI }, 0 },
-+ { "push!P", { RMrDI }, 0 },
- /* 58 */
-- { "pop{!P|}", { RMrAX }, 0 },
-- { "pop{!P|}", { RMrCX }, 0 },
-- { "pop{!P|}", { RMrDX }, 0 },
-- { "pop{!P|}", { RMrBX }, 0 },
-- { "pop{!P|}", { RMrSP }, 0 },
-- { "pop{!P|}", { RMrBP }, 0 },
-- { "pop{!P|}", { RMrSI }, 0 },
-- { "pop{!P|}", { RMrDI }, 0 },
-+ { "pop!P", { RMrAX }, 0 },
-+ { "pop!P", { RMrCX }, 0 },
-+ { "pop!P", { RMrDX }, 0 },
-+ { "pop!P", { RMrBX }, 0 },
-+ { "pop!P", { RMrSP }, 0 },
-+ { "pop!P", { RMrBP }, 0 },
-+ { "pop!P", { RMrSI }, 0 },
-+ { "pop!P", { RMrDI }, 0 },
- /* 60 */
- { X86_64_TABLE (X86_64_60) },
- { X86_64_TABLE (X86_64_61) },
-@@ -1872,23 +1964,23 @@ static const struct dis386 dis386[] = {
- { "outs{b|}", { indirDXr, Xb }, 0 },
- { X86_64_TABLE (X86_64_6F) },
- /* 70 */
-- { "joH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jnoH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jbH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jaeH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jeH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jneH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jbeH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jaH", { Jb, BND, cond_jump_flag }, 0 },
-+ { "joH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jnoH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jbH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jaeH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jeH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jneH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jbeH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jaH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
- /* 78 */
-- { "jsH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jnsH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jpH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jnpH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jlH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jgeH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jleH", { Jb, BND, cond_jump_flag }, 0 },
-- { "jgH", { Jb, BND, cond_jump_flag }, 0 },
-+ { "jsH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jnsH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jpH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jnpH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jlH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jgeH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jleH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jgH", { Jb, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
- /* 80 */
- { REG_TABLE (REG_80) },
- { REG_TABLE (REG_81) },
-@@ -1926,23 +2018,23 @@ static const struct dis386 dis386[] = {
- { "sahf", { XX }, 0 },
- { "lahf", { XX }, 0 },
- /* a0 */
-- { "mov%LB", { AL, Ob }, 0 },
-- { "mov%LS", { eAX, Ov }, 0 },
-- { "mov%LB", { Ob, AL }, 0 },
-- { "mov%LS", { Ov, eAX }, 0 },
-- { "movs{b|}", { Ybr, Xb }, 0 },
-- { "movs{R|}", { Yvr, Xv }, 0 },
-- { "cmps{b|}", { Xb, Yb }, 0 },
-- { "cmps{R|}", { Xv, Yv }, 0 },
-+ { "mov%LB", { AL, Ob }, PREFIX_REX2_ILLEGAL },
-+ { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, PREFIX_REX2_ILLEGAL },
-+ { "mov%LB", { Ob, AL }, PREFIX_REX2_ILLEGAL },
-+ { "mov%LS", { Ov, eAX }, PREFIX_REX2_ILLEGAL },
-+ { "movs{b|}", { Ybr, Xb }, PREFIX_REX2_ILLEGAL },
-+ { "movs{R|}", { Yvr, Xv }, PREFIX_REX2_ILLEGAL },
-+ { "cmps{b|}", { Xb, Yb }, PREFIX_REX2_ILLEGAL },
-+ { "cmps{R|}", { Xv, Yv }, PREFIX_REX2_ILLEGAL },
- /* a8 */
-- { "testB", { AL, Ib }, 0 },
-- { "testS", { eAX, Iv }, 0 },
-- { "stosB", { Ybr, AL }, 0 },
-- { "stosS", { Yvr, eAX }, 0 },
-- { "lodsB", { ALr, Xb }, 0 },
-- { "lodsS", { eAXr, Xv }, 0 },
-- { "scasB", { AL, Yb }, 0 },
-- { "scasS", { eAX, Yv }, 0 },
-+ { "testB", { AL, Ib }, PREFIX_REX2_ILLEGAL },
-+ { "testS", { eAX, Iv }, PREFIX_REX2_ILLEGAL },
-+ { "stosB", { Ybr, AL }, PREFIX_REX2_ILLEGAL },
-+ { "stosS", { Yvr, eAX }, PREFIX_REX2_ILLEGAL },
-+ { "lodsB", { ALr, Xb }, PREFIX_REX2_ILLEGAL },
-+ { "lodsS", { eAXr, Xv }, PREFIX_REX2_ILLEGAL },
-+ { "scasB", { AL, Yb }, PREFIX_REX2_ILLEGAL },
-+ { "scasS", { eAX, Yv }, PREFIX_REX2_ILLEGAL },
- /* b0 */
- { "movB", { RMAL, Ib }, 0 },
- { "movB", { RMCL, Ib }, 0 },
-@@ -1998,23 +2090,23 @@ static const struct dis386 dis386[] = {
- { FLOAT },
- { FLOAT },
- /* e0 */
-- { "loopneFH", { Jb, XX, loop_jcxz_flag }, 0 },
-- { "loopeFH", { Jb, XX, loop_jcxz_flag }, 0 },
-- { "loopFH", { Jb, XX, loop_jcxz_flag }, 0 },
-- { "jEcxzH", { Jb, XX, loop_jcxz_flag }, 0 },
-- { "inB", { AL, Ib }, 0 },
-- { "inG", { zAX, Ib }, 0 },
-- { "outB", { Ib, AL }, 0 },
-- { "outG", { Ib, zAX }, 0 },
-+ { "loopneFH", { Jb, XX, loop_jcxz_flag }, PREFIX_REX2_ILLEGAL },
-+ { "loopeFH", { Jb, XX, loop_jcxz_flag }, PREFIX_REX2_ILLEGAL },
-+ { "loopFH", { Jb, XX, loop_jcxz_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jEcxzH", { Jb, XX, loop_jcxz_flag }, PREFIX_REX2_ILLEGAL },
-+ { "inB", { AL, Ib }, PREFIX_REX2_ILLEGAL },
-+ { "inG", { zAX, Ib }, PREFIX_REX2_ILLEGAL },
-+ { "outB", { Ib, AL }, PREFIX_REX2_ILLEGAL },
-+ { "outG", { Ib, zAX }, PREFIX_REX2_ILLEGAL },
- /* e8 */
- { X86_64_TABLE (X86_64_E8) },
- { X86_64_TABLE (X86_64_E9) },
- { X86_64_TABLE (X86_64_EA) },
-- { "jmp", { Jb, BND }, 0 },
-- { "inB", { AL, indirDX }, 0 },
-- { "inG", { zAX, indirDX }, 0 },
-- { "outB", { indirDX, AL }, 0 },
-- { "outG", { indirDX, zAX }, 0 },
-+ { "jmp", { Jb, BND }, PREFIX_REX2_ILLEGAL },
-+ { "inB", { AL, indirDX }, PREFIX_REX2_ILLEGAL },
-+ { "inG", { zAX, indirDX }, PREFIX_REX2_ILLEGAL },
-+ { "outB", { indirDX, AL }, PREFIX_REX2_ILLEGAL },
-+ { "outG", { indirDX, zAX }, PREFIX_REX2_ILLEGAL },
- /* f0 */
- { Bad_Opcode }, /* lock prefix */
- { "int1", { XX }, 0 },
-@@ -2091,12 +2183,12 @@ static const struct dis386 dis386_twobyte[] = {
- { PREFIX_TABLE (PREFIX_0F2E) },
- { PREFIX_TABLE (PREFIX_0F2F) },
- /* 30 */
-- { "wrmsr", { XX }, 0 },
-- { "rdtsc", { XX }, 0 },
-- { "rdmsr", { XX }, 0 },
-- { "rdpmc", { XX }, 0 },
-- { "sysenter", { SEP }, 0 },
-- { "sysexit%LQ", { SEP }, 0 },
-+ { "wrmsr", { XX }, PREFIX_REX2_ILLEGAL },
-+ { "rdtsc", { XX }, PREFIX_REX2_ILLEGAL },
-+ { "rdmsr", { XX }, PREFIX_REX2_ILLEGAL },
-+ { "rdpmc", { XX }, PREFIX_REX2_ILLEGAL },
-+ { "sysenter", { SEP }, PREFIX_REX2_ILLEGAL },
-+ { "sysexit%LQ", { SEP }, PREFIX_REX2_ILLEGAL },
- { Bad_Opcode },
- { "getsec", { XX }, 0 },
- /* 38 */
-@@ -2181,23 +2273,23 @@ static const struct dis386 dis386_twobyte[] = {
- { PREFIX_TABLE (PREFIX_0F7E) },
- { PREFIX_TABLE (PREFIX_0F7F) },
- /* 80 */
-- { "joH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jnoH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jbH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jaeH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jeH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jneH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jbeH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jaH", { Jv, BND, cond_jump_flag }, 0 },
-+ { "joH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jnoH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jbH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jaeH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jeH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jneH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jbeH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jaH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
- /* 88 */
-- { "jsH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jnsH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jpH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jnpH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jlH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jgeH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jleH", { Jv, BND, cond_jump_flag }, 0 },
-- { "jgH", { Jv, BND, cond_jump_flag }, 0 },
-+ { "jsH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jnsH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jpH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jnpH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jlH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jgeH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jleH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
-+ { "jgH", { Jv, BND, cond_jump_flag }, PREFIX_REX2_ILLEGAL },
- /* 90 */
- { "seto", { Eb }, 0 },
- { "setno", { Eb }, 0 },
-@@ -2390,22 +2482,30 @@ static const char intel_index16[][6] = {
-
- static const char att_names64[][8] = {
- "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
-- "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
-+ "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
-+ "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
-+ "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
- };
- static const char att_names32[][8] = {
- "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
-- "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
-+ "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d",
-+ "%r16d", "%r17d", "%r18d", "%r19d", "%r20d", "%r21d", "%r22d", "%r23d",
-+ "%r24d", "%r25d", "%r26d", "%r27d", "%r28d", "%r29d", "%r30d", "%r31d",
- };
- static const char att_names16[][8] = {
- "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
-- "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
-+ "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w",
-+ "%r16w", "%r17w", "%r18w", "%r19w", "%r20w", "%r21w", "%r22w", "%r23w",
-+ "%r24w", "%r25w", "%r26w", "%r27w", "%r28w", "%r29w", "%r30w", "%r31w",
- };
- static const char att_names8[][8] = {
- "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
- };
- static const char att_names8rex[][8] = {
- "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
-- "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
-+ "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b",
-+ "%r16b", "%r17b", "%r18b", "%r19b", "%r20b", "%r21b", "%r22b", "%r23b",
-+ "%r24b", "%r25b", "%r26b", "%r27b", "%r28b", "%r29b", "%r30b", "%r31b",
- };
- static const char att_names_seg[][4] = {
- "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
-@@ -2520,25 +2620,25 @@ static const struct dis386 reg_table[][8] = {
- },
- /* REG_C0 */
- {
-- { "rolA", { Eb, Ib }, 0 },
-- { "rorA", { Eb, Ib }, 0 },
-- { "rclA", { Eb, Ib }, 0 },
-- { "rcrA", { Eb, Ib }, 0 },
-- { "shlA", { Eb, Ib }, 0 },
-- { "shrA", { Eb, Ib }, 0 },
-- { "shlA", { Eb, Ib }, 0 },
-- { "sarA", { Eb, Ib }, 0 },
-+ { "%NFrolA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NFrorA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "rclA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "rcrA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NFshlA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NFshrA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NFshlA", { VexGb, Eb, Ib }, NO_PREFIX },
-+ { "%NFsarA", { VexGb, Eb, Ib }, NO_PREFIX },
- },
- /* REG_C1 */
- {
-- { "rolQ", { Ev, Ib }, 0 },
-- { "rorQ", { Ev, Ib }, 0 },
-- { "rclQ", { Ev, Ib }, 0 },
-- { "rcrQ", { Ev, Ib }, 0 },
-- { "shlQ", { Ev, Ib }, 0 },
-- { "shrQ", { Ev, Ib }, 0 },
-- { "shlQ", { Ev, Ib }, 0 },
-- { "sarQ", { Ev, Ib }, 0 },
-+ { "%NFrolQ", { VexGv, Ev, Ib }, PREFIX_NP_OR_DATA },
-+ { "%NFrorQ", { VexGv, Ev, Ib }, PREFIX_NP_OR_DATA },
-+ { "rclQ", { VexGv, Ev, Ib }, PREFIX_NP_OR_DATA },
-+ { "rcrQ", { VexGv, Ev, Ib }, PREFIX_NP_OR_DATA },
-+ { "%NFshlQ", { VexGv, Ev, Ib }, PREFIX_NP_OR_DATA },
-+ { "%NFshrQ", { VexGv, Ev, Ib }, PREFIX_NP_OR_DATA },
-+ { "%NFshlQ", { VexGv, Ev, Ib }, PREFIX_NP_OR_DATA },
-+ { "%NFsarQ", { VexGv, Ev, Ib }, PREFIX_NP_OR_DATA },
- },
- /* REG_C6 */
- {
-@@ -2564,47 +2664,47 @@ static const struct dis386 reg_table[][8] = {
- },
- /* REG_D0 */
- {
-- { "rolA", { Eb, I1 }, 0 },
-- { "rorA", { Eb, I1 }, 0 },
-- { "rclA", { Eb, I1 }, 0 },
-- { "rcrA", { Eb, I1 }, 0 },
-- { "shlA", { Eb, I1 }, 0 },
-- { "shrA", { Eb, I1 }, 0 },
-- { "shlA", { Eb, I1 }, 0 },
-- { "sarA", { Eb, I1 }, 0 },
-+ { "%NFrolA", { VexGb, Eb, I1 }, NO_PREFIX },
-+ { "%NFrorA", { VexGb, Eb, I1 }, NO_PREFIX },
-+ { "rclA", { VexGb, Eb, I1 }, NO_PREFIX },
-+ { "rcrA", { VexGb, Eb, I1 }, NO_PREFIX },
-+ { "%NFshlA", { VexGb, Eb, I1 }, NO_PREFIX },
-+ { "%NFshrA", { VexGb, Eb, I1 }, NO_PREFIX },
-+ { "%NFshlA", { VexGb, Eb, I1 }, NO_PREFIX },
-+ { "%NFsarA", { VexGb, Eb, I1 }, NO_PREFIX },
- },
- /* REG_D1 */
- {
-- { "rolQ", { Ev, I1 }, 0 },
-- { "rorQ", { Ev, I1 }, 0 },
-- { "rclQ", { Ev, I1 }, 0 },
-- { "rcrQ", { Ev, I1 }, 0 },
-- { "shlQ", { Ev, I1 }, 0 },
-- { "shrQ", { Ev, I1 }, 0 },
-- { "shlQ", { Ev, I1 }, 0 },
-- { "sarQ", { Ev, I1 }, 0 },
-+ { "%NFrolQ", { VexGv, Ev, I1 }, PREFIX_NP_OR_DATA },
-+ { "%NFrorQ", { VexGv, Ev, I1 }, PREFIX_NP_OR_DATA },
-+ { "rclQ", { VexGv, Ev, I1 }, PREFIX_NP_OR_DATA },
-+ { "rcrQ", { VexGv, Ev, I1 }, PREFIX_NP_OR_DATA },
-+ { "%NFshlQ", { VexGv, Ev, I1 }, PREFIX_NP_OR_DATA },
-+ { "%NFshrQ", { VexGv, Ev, I1 }, PREFIX_NP_OR_DATA },
-+ { "%NFshlQ", { VexGv, Ev, I1 }, PREFIX_NP_OR_DATA },
-+ { "%NFsarQ", { VexGv, Ev, I1 }, PREFIX_NP_OR_DATA },
- },
- /* REG_D2 */
- {
-- { "rolA", { Eb, CL }, 0 },
-- { "rorA", { Eb, CL }, 0 },
-- { "rclA", { Eb, CL }, 0 },
-- { "rcrA", { Eb, CL }, 0 },
-- { "shlA", { Eb, CL }, 0 },
-- { "shrA", { Eb, CL }, 0 },
-- { "shlA", { Eb, CL }, 0 },
-- { "sarA", { Eb, CL }, 0 },
-+ { "%NFrolA", { VexGb, Eb, CL }, NO_PREFIX },
-+ { "%NFrorA", { VexGb, Eb, CL }, NO_PREFIX },
-+ { "rclA", { VexGb, Eb, CL }, NO_PREFIX },
-+ { "rcrA", { VexGb, Eb, CL }, NO_PREFIX },
-+ { "%NFshlA", { VexGb, Eb, CL }, NO_PREFIX },
-+ { "%NFshrA", { VexGb, Eb, CL }, NO_PREFIX },
-+ { "%NFshlA", { VexGb, Eb, CL }, NO_PREFIX },
-+ { "%NFsarA", { VexGb, Eb, CL }, NO_PREFIX },
- },
- /* REG_D3 */
- {
-- { "rolQ", { Ev, CL }, 0 },
-- { "rorQ", { Ev, CL }, 0 },
-- { "rclQ", { Ev, CL }, 0 },
-- { "rcrQ", { Ev, CL }, 0 },
-- { "shlQ", { Ev, CL }, 0 },
-- { "shrQ", { Ev, CL }, 0 },
-- { "shlQ", { Ev, CL }, 0 },
-- { "sarQ", { Ev, CL }, 0 },
-+ { "%NFrolQ", { VexGv, Ev, CL }, PREFIX_NP_OR_DATA },
-+ { "%NFrorQ", { VexGv, Ev, CL }, PREFIX_NP_OR_DATA },
-+ { "rclQ", { VexGv, Ev, CL }, PREFIX_NP_OR_DATA },
-+ { "rcrQ", { VexGv, Ev, CL }, PREFIX_NP_OR_DATA },
-+ { "%NFshlQ", { VexGv, Ev, CL }, PREFIX_NP_OR_DATA },
-+ { "%NFshrQ", { VexGv, Ev, CL }, PREFIX_NP_OR_DATA },
-+ { "%NFshlQ", { VexGv, Ev, CL }, PREFIX_NP_OR_DATA },
-+ { "%NFsarQ", { VexGv, Ev, CL }, PREFIX_NP_OR_DATA },
- },
- /* REG_F6 */
- {
-@@ -2794,9 +2894,9 @@ static const struct dis386 reg_table[][8] = {
- { Bad_Opcode },
- { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } }, 0 },
- { Bad_Opcode },
-- { "xrstors", { FXSAVE }, 0 },
-- { "xsavec", { FXSAVE }, 0 },
-- { "xsaves", { FXSAVE }, 0 },
-+ { "xrstors", { FXSAVE }, PREFIX_REX2_ILLEGAL },
-+ { "xsavec", { FXSAVE }, PREFIX_REX2_ILLEGAL },
-+ { "xsaves", { FXSAVE }, PREFIX_REX2_ILLEGAL },
- { MOD_TABLE (MOD_0FC7_REG_6) },
- { MOD_TABLE (MOD_0FC7_REG_7) },
- },
-@@ -2842,12 +2942,16 @@ static const struct dis386 reg_table[][8] = {
- {
- { RM_TABLE (RM_VEX_0F3849_X86_64_L_0_W_0_M_1_P_0_R_0) },
- },
-- /* REG_VEX_0F38F3_L_0 */
-+ /* REG_VEX_0F38F3_L_0_P_0 */
- {
- { Bad_Opcode },
-- { "blsrS", { VexGdq, Edq }, PREFIX_OPCODE },
-- { "blsmskS", { VexGdq, Edq }, PREFIX_OPCODE },
-- { "blsiS", { VexGdq, Edq }, PREFIX_OPCODE },
-+ { "%NFblsrS", { VexGdq, Edq }, 0 },
-+ { "%NFblsmskS", { VexGdq, Edq }, 0 },
-+ { "%NFblsiS", { VexGdq, Edq }, 0 },
-+ },
-+ /* REG_VEX_MAP7_F8_L_0_W_0 */
-+ {
-+ { X86_64_TABLE (X86_64_VEX_MAP7_F8_L_0_W_0_R_0) },
- },
- /* REG_XOP_09_01_L_0 */
- {
-@@ -3364,7 +3468,7 @@ static const struct dis386 prefix_table[][4] = {
-
- /* PREFIX_0FAE_REG_4_MOD_0 */
- {
-- { "xsave", { FXSAVE }, 0 },
-+ { "xsave", { FXSAVE }, PREFIX_REX2_ILLEGAL },
- { "ptwrite{%LQ|}", { Edq }, 0 },
- },
-
-@@ -3382,7 +3486,7 @@ static const struct dis386 prefix_table[][4] = {
-
- /* PREFIX_0FAE_REG_6_MOD_0 */
- {
-- { "xsaveopt", { FXSAVE }, PREFIX_OPCODE },
-+ { "xsaveopt", { FXSAVE }, PREFIX_OPCODE | PREFIX_REX2_ILLEGAL },
- { "clrssbsy", { Mq }, PREFIX_OPCODE },
- { "clwb", { Mb }, PREFIX_OPCODE },
- },
-@@ -3550,18 +3654,27 @@ static const struct dis386 prefix_table[][4] = {
- /* PREFIX_0F38F6 */
- {
- { "wrssK", { M, Gdq }, 0 },
-- { "adoxS", { Gdq, Edq}, 0 },
-- { "adcxS", { Gdq, Edq}, 0 },
-+ { "adoxL", { VexGdq, Gdq, Edq }, 0 },
-+ { "adcxL", { VexGdq, Gdq, Edq }, 0 },
- { Bad_Opcode },
- },
-
-- /* PREFIX_0F38F8 */
-+ /* PREFIX_0F38F8_M_0 */
- {
- { Bad_Opcode },
- { "enqcmds", { Gva, M }, 0 },
- { "movdir64b", { Gva, M }, 0 },
- { "enqcmd", { Gva, M }, 0 },
- },
-+
-+ /* PREFIX_0F38F8_M_1_X86_64 */
-+ {
-+ { Bad_Opcode },
-+ { "uwrmsr", { Gq, Rq }, 0 },
-+ { Bad_Opcode },
-+ { "urdmsr", { Rq, Gq }, 0 },
-+ },
-+
- /* PREFIX_0F38FA */
- {
- { Bad_Opcode },
-@@ -3768,38 +3881,38 @@ static const struct dis386 prefix_table[][4] = {
-
- /* PREFIX_VEX_0F90_L_0_W_0 */
- {
-- { "kmovw", { MaskG, MaskE }, 0 },
-+ { "%XEkmovw", { MaskG, MaskE }, 0 },
- { Bad_Opcode },
-- { "kmovb", { MaskG, MaskBDE }, 0 },
-+ { "%XEkmovb", { MaskG, MaskBDE }, 0 },
- },
-
- /* PREFIX_VEX_0F90_L_0_W_1 */
- {
-- { "kmovq", { MaskG, MaskE }, 0 },
-+ { "%XEkmovq", { MaskG, MaskE }, 0 },
- { Bad_Opcode },
-- { "kmovd", { MaskG, MaskBDE }, 0 },
-+ { "%XEkmovd", { MaskG, MaskBDE }, 0 },
- },
-
- /* PREFIX_VEX_0F91_L_0_W_0 */
- {
-- { "kmovw", { Mw, MaskG }, 0 },
-+ { "%XEkmovw", { Mw, MaskG }, 0 },
- { Bad_Opcode },
-- { "kmovb", { Mb, MaskG }, 0 },
-+ { "%XEkmovb", { Mb, MaskG }, 0 },
- },
-
- /* PREFIX_VEX_0F91_L_0_W_1 */
- {
-- { "kmovq", { Mq, MaskG }, 0 },
-+ { "%XEkmovq", { Mq, MaskG }, 0 },
- { Bad_Opcode },
-- { "kmovd", { Md, MaskG }, 0 },
-+ { "%XEkmovd", { Md, MaskG }, 0 },
- },
-
- /* PREFIX_VEX_0F92_L_0_W_0 */
- {
-- { "kmovw", { MaskG, Rdq }, 0 },
-+ { "%XEkmovw", { MaskG, Rdq }, 0 },
- { Bad_Opcode },
-- { "kmovb", { MaskG, Rdq }, 0 },
-- { "kmovd", { MaskG, Rdq }, 0 },
-+ { "%XEkmovb", { MaskG, Rdq }, 0 },
-+ { "%XEkmovd", { MaskG, Rdq }, 0 },
- },
-
- /* PREFIX_VEX_0F92_L_0_W_1 */
-@@ -3807,15 +3920,15 @@ static const struct dis386 prefix_table[][4] = {
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
-- { "kmovK", { MaskG, Rdq }, 0 },
-+ { "%XEkmovK", { MaskG, Rdq }, 0 },
- },
-
- /* PREFIX_VEX_0F93_L_0_W_0 */
- {
-- { "kmovw", { Gdq, MaskR }, 0 },
-+ { "%XEkmovw", { Gdq, MaskR }, 0 },
- { Bad_Opcode },
-- { "kmovb", { Gdq, MaskR }, 0 },
-- { "kmovd", { Gdq, MaskR }, 0 },
-+ { "%XEkmovb", { Gdq, MaskR }, 0 },
-+ { "%XEkmovd", { Gdq, MaskR }, 0 },
- },
-
- /* PREFIX_VEX_0F93_L_0_W_1 */
-@@ -3823,7 +3936,7 @@ static const struct dis386 prefix_table[][4] = {
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
-- { "kmovK", { Gdq, MaskR }, 0 },
-+ { "%XEkmovK", { Gdq, MaskR }, 0 },
- },
-
- /* PREFIX_VEX_0F98_L_0_W_0 */
-@@ -3982,12 +4095,22 @@ static const struct dis386 prefix_table[][4] = {
- { "vsm4rnds4", { XM, Vex, EXx }, 0 },
- },
-
-+ /* PREFIX_VEX_0F38F2_L_0 */
-+ {
-+ { "%NFandnS", { Gdq, VexGdq, Edq }, 0 },
-+ },
-+
-+ /* PREFIX_VEX_0F38F3_L_0 */
-+ {
-+ { REG_TABLE (REG_VEX_0F38F3_L_0_P_0) },
-+ },
-+
- /* PREFIX_VEX_0F38F5_L_0 */
- {
-- { "bzhiS", { Gdq, Edq, VexGdq }, 0 },
-- { "pextS", { Gdq, VexGdq, Edq }, 0 },
-+ { "%NFbzhiS", { Gdq, Edq, VexGdq }, 0 },
-+ { "%XEpextS", { Gdq, VexGdq, Edq }, 0 },
- { Bad_Opcode },
-- { "pdepS", { Gdq, VexGdq, Edq }, 0 },
-+ { "%XEpdepS", { Gdq, VexGdq, Edq }, 0 },
- },
-
- /* PREFIX_VEX_0F38F6_L_0 */
-@@ -3995,15 +4118,15 @@ static const struct dis386 prefix_table[][4] = {
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
-- { "mulxS", { Gdq, VexGdq, Edq }, 0 },
-+ { "%XEmulxS", { Gdq, VexGdq, Edq }, 0 },
- },
-
- /* PREFIX_VEX_0F38F7_L_0 */
- {
-- { "bextrS", { Gdq, Edq, VexGdq }, 0 },
-- { "sarxS", { Gdq, Edq, VexGdq }, 0 },
-- { "shlxS", { Gdq, Edq, VexGdq }, 0 },
-- { "shrxS", { Gdq, Edq, VexGdq }, 0 },
-+ { "%NFbextrS", { Gdq, Edq, VexGdq }, 0 },
-+ { "%XEsarxS", { Gdq, Edq, VexGdq }, 0 },
-+ { "%XEshlxS", { Gdq, Edq, VexGdq }, 0 },
-+ { "%XEshrxS", { Gdq, Edq, VexGdq }, 0 },
- },
-
- /* PREFIX_VEX_0F3AF0_L_0 */
-@@ -4011,7 +4134,15 @@ static const struct dis386 prefix_table[][4] = {
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
-- { "rorxS", { Gdq, Edq, Ib }, 0 },
-+ { "%XErorxS", { Gdq, Edq, Ib }, 0 },
-+ },
-+
-+ /* PREFIX_VEX_MAP7_F8_L_0_W_0_R_0_X86_64 */
-+ {
-+ { Bad_Opcode },
-+ { "uwrmsr", { Skip_MODRM, Id, Rq }, 0 },
-+ { Bad_Opcode },
-+ { "urdmsr", { Rq, Id }, 0 },
- },
-
- #include "i386-dis-evex-prefix.h"
-@@ -4160,13 +4291,13 @@ static const struct dis386 x86_64_table[][2] = {
- /* X86_64_E8 */
- {
- { "callP", { Jv, BND }, 0 },
-- { "call@", { Jv, BND }, 0 }
-+ { "call@", { Jv, BND }, PREFIX_REX2_ILLEGAL }
- },
-
- /* X86_64_E9 */
- {
- { "jmpP", { Jv, BND }, 0 },
-- { "jmp@", { Jv, BND }, 0 }
-+ { "jmp@", { Jv, BND }, PREFIX_REX2_ILLEGAL }
- },
-
- /* X86_64_EA */
-@@ -4322,6 +4453,12 @@ static const struct dis386 x86_64_table[][2] = {
- { "movZ", { Td, Em }, 0 },
- },
-
-+ {
-+ /* X86_64_0F38F8_M_1 */
-+ { Bad_Opcode },
-+ { PREFIX_TABLE (PREFIX_0F38F8_M_1_X86_64) },
-+ },
-+
- /* X86_64_0FC7_REG_6_MOD_3_PREFIX_1 */
- {
- { Bad_Opcode },
-@@ -4361,97 +4498,103 @@ static const struct dis386 x86_64_table[][2] = {
- /* X86_64_VEX_0F38E0 */
- {
- { Bad_Opcode },
-- { "cmpoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E1 */
- {
- { Bad_Opcode },
-- { "cmpnoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpnoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E2 */
- {
- { Bad_Opcode },
-- { "cmpbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E3 */
- {
- { Bad_Opcode },
-- { "cmpnbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpnbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E4 */
- {
- { Bad_Opcode },
-- { "cmpzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E5 */
- {
- { Bad_Opcode },
-- { "cmpnzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpnzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E6 */
- {
- { Bad_Opcode },
-- { "cmpbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E7 */
- {
- { Bad_Opcode },
-- { "cmpnbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpnbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E8 */
- {
- { Bad_Opcode },
-- { "cmpsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38E9 */
- {
- { Bad_Opcode },
-- { "cmpnsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpnsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38EA */
- {
- { Bad_Opcode },
-- { "cmppxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmppxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38EB */
- {
- { Bad_Opcode },
-- { "cmpnpxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpnpxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38EC */
- {
- { Bad_Opcode },
-- { "cmplxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmplxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38ED */
- {
- { Bad_Opcode },
-- { "cmpnlxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpnlxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38EE */
- {
- { Bad_Opcode },
-- { "cmplexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmplexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
- },
-
- /* X86_64_VEX_0F38EF */
- {
- { Bad_Opcode },
-- { "cmpnlexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ { "%XEcmpnlexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
-+ },
-+
-+ /* X86_64_VEX_MAP7_F8_L_0_W_0_R_0 */
-+ {
-+ { Bad_Opcode },
-+ { PREFIX_TABLE (PREFIX_VEX_MAP7_F8_L_0_W_0_R_0_X86_64) },
- },
- };
-
-@@ -4739,7 +4882,7 @@ static const struct dis386 three_byte_table[][256] = {
- { PREFIX_TABLE (PREFIX_0F38F6) },
- { Bad_Opcode },
- /* f8 */
-- { PREFIX_TABLE (PREFIX_0F38F8) },
-+ { MOD_TABLE (MOD_0F38F8) },
- { "movdiri", { Mdq, Gdq }, PREFIX_OPCODE },
- { PREFIX_TABLE (PREFIX_0F38FA) },
- { PREFIX_TABLE (PREFIX_0F38FB) },
-@@ -7039,12 +7182,12 @@ static const struct dis386 vex_len_table[][2] = {
-
- /* VEX_LEN_0F38F2 */
- {
-- { "andnS", { Gdq, VexGdq, Edq }, PREFIX_OPCODE },
-+ { PREFIX_TABLE (PREFIX_VEX_0F38F2_L_0) },
- },
-
- /* VEX_LEN_0F38F3 */
- {
-- { REG_TABLE(REG_VEX_0F38F3_L_0) },
-+ { PREFIX_TABLE (PREFIX_VEX_0F38F3_L_0) },
- },
-
- /* VEX_LEN_0F38F5 */
-@@ -7205,6 +7348,11 @@ static const struct dis386 vex_len_table[][2] = {
- { PREFIX_TABLE (PREFIX_VEX_0F3AF0_L_0) },
- },
-
-+ /* VEX_LEN_MAP7_F8 */
-+ {
-+ { VEX_W_TABLE (VEX_W_MAP7_F8_L_0) },
-+ },
-+
- /* VEX_LEN_XOP_08_85 */
- {
- { VEX_W_TABLE (VEX_W_XOP_08_85_L_0) },
-@@ -7811,6 +7959,10 @@ static const struct dis386 vex_w_table[][2] = {
- /* VEX_W_0F3ADE */
- { VEX_LEN_TABLE (VEX_LEN_0F3ADE_W_0) },
- },
-+ {
-+ /* VEX_W_MAP7_F8_L_0 */
-+ { REG_TABLE (REG_VEX_MAP7_F8_L_0_W_0) },
-+ },
- /* VEX_W_XOP_08_85_L_0 */
- {
- { "vpmacssww", { XM, Vex, EXx, XMVexI4 }, 0 },
-@@ -8125,7 +8277,7 @@ static const struct dis386 mod_table[][2] = {
- },
- {
- /* MOD_0FAE_REG_5 */
-- { "xrstor", { FXSAVE }, PREFIX_OPCODE },
-+ { "xrstor", { FXSAVE }, PREFIX_OPCODE | PREFIX_REX2_ILLEGAL },
- { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_3) },
- },
- {
-@@ -8153,6 +8305,11 @@ static const struct dis386 mod_table[][2] = {
- { "aesenc128kl", { XM, M }, 0 },
- { "loadiwkey", { XM, EXx }, 0 },
- },
-+ /* MOD_0F38F8 */
-+ {
-+ { PREFIX_TABLE (PREFIX_0F38F8_M_0) },
-+ { X86_64_TABLE (X86_64_0F38F8_M_1) },
-+ },
- {
- /* MOD_VEX_0F3849_X86_64_L_0_W_0 */
- { PREFIX_TABLE (PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_0) },
-@@ -8323,6 +8480,24 @@ ckprefix (instr_info *ins)
- return ckp_okay;
- ins->last_rex_prefix = i;
- break;
-+ /* REX2 must be the last prefix. */
-+ case REX2_OPCODE:
-+ if (ins->address_mode == mode_64bit)
-+ {
-+ if (ins->last_rex_prefix >= 0)
-+ return ckp_bogus;
-+
-+ ins->codep++;
-+ if (!fetch_code (ins->info, ins->codep + 1))
-+ return ckp_fetch_error;
-+ ins->rex2_payload = *ins->codep;
-+ ins->rex2 = ins->rex2_payload >> 4;
-+ ins->rex = (ins->rex2_payload & 0xf) | REX_OPCODE;
-+ ins->codep++;
-+ ins->last_rex2_prefix = i;
-+ ins->all_prefixes[i] = REX2_OPCODE;
-+ }
-+ return ckp_okay;
- case 0xf3:
- ins->prefixes |= PREFIX_REPZ;
- ins->last_repz_prefix = i;
-@@ -8490,6 +8665,8 @@ prefix_name (enum address_mode mode, uint8_t pref, int sizeflag)
- return "bnd";
- case NOTRACK_PREFIX:
- return "notrack";
-+ case REX2_OPCODE:
-+ return "rex2";
- default:
- return NULL;
- }
-@@ -8507,10 +8684,10 @@ with the -M switch (multiple options should be separated by commas):\n"));
- fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
- fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
- fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
-- fprintf (stream, _(" att-mnemonic\n"
-- " Display instruction in AT&T mnemonic\n"));
-- fprintf (stream, _(" intel-mnemonic\n"
-- " Display instruction in Intel mnemonic\n"));
-+ fprintf (stream, _(" att-mnemonic (AT&T syntax only)\n"
-+ " Display instruction with AT&T mnemonic\n"));
-+ fprintf (stream, _(" intel-mnemonic (AT&T syntax only)\n"
-+ " Display instruction with Intel mnemonic\n"));
- fprintf (stream, _(" addr64 Assume 64bit address size\n"));
- fprintf (stream, _(" addr32 Assume 32bit address size\n"));
- fprintf (stream, _(" addr16 Assume 16bit address size\n"));
-@@ -8527,6 +8704,8 @@ static const struct dis386 bad_opcode = { "(bad)", { XX }, 0 };
- /* Fetch error indicator. */
- static const struct dis386 err_opcode = { NULL, { XX }, 0 };
-
-+static const struct dis386 map7_f8_opcode = { VEX_LEN_TABLE (VEX_LEN_MAP7_F8) };
-+
- /* Get a pointer to struct dis386 with a valid name. */
-
- static const struct dis386 *
-@@ -8553,6 +8732,7 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
- break;
-
- case USE_PREFIX_TABLE:
-+ use_prefix_table:
- if (ins->need_vex)
- {
- /* The prefix in VEX is implicit. */
-@@ -8622,12 +8802,40 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
- dp = &prefix_table[dp->op[1].bytemode][vindex];
- break;
-
-+ case USE_X86_64_EVEX_FROM_VEX_TABLE:
-+ case USE_X86_64_EVEX_PFX_TABLE:
-+ case USE_X86_64_EVEX_W_TABLE:
-+ case USE_X86_64_EVEX_MEM_W_TABLE:
-+ ins->evex_type = evex_from_vex;
-+ /* EVEX from VEX instructions are 64-bit only and require that EVEX.z,
-+ EVEX.L'L, EVEX.b, and the lower 2 bits of EVEX.aaa must be 0. */
-+ if (ins->address_mode != mode_64bit
-+ || (ins->vex.mask_register_specifier & 0x3) != 0
-+ || ins->vex.ll != 0
-+ || ins->vex.zeroing != 0
-+ || ins->vex.b)
-+ return &bad_opcode;
-+
-+ if (dp->op[0].bytemode == USE_X86_64_EVEX_PFX_TABLE)
-+ goto use_prefix_table;
-+ if (dp->op[0].bytemode == USE_X86_64_EVEX_W_TABLE)
-+ goto use_vex_w_table;
-+ if (dp->op[0].bytemode == USE_X86_64_EVEX_MEM_W_TABLE)
-+ {
-+ if (ins->modrm.mod == 3)
-+ return &bad_opcode;
-+ goto use_vex_w_table;
-+ }
-+
-+ /* Fall through. */
- case USE_X86_64_TABLE:
- vindex = ins->address_mode == mode_64bit ? 1 : 0;
- dp = &x86_64_table[dp->op[1].bytemode][vindex];
- break;
-
- case USE_3BYTE_TABLE:
-+ if (ins->last_rex2_prefix >= 0)
-+ return &err_opcode;
- if (!fetch_code (ins->info, ins->codep + 2))
- return &err_opcode;
- vindex = *ins->codep++;
-@@ -8769,6 +8977,9 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
- case 0x3:
- vex_table_index = VEX_0F3A;
- break;
-+ case 0x7:
-+ vex_table_index = VEX_MAP7;
-+ break;
- }
- ins->codep++;
- ins->vex.w = *ins->codep & 0x80;
-@@ -8803,7 +9014,12 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
- ins->need_vex = 3;
- ins->codep++;
- vindex = *ins->codep++;
-- dp = &vex_table[vex_table_index][vindex];
-+ if (vex_table_index != VEX_MAP7)
-+ dp = &vex_table[vex_table_index][vindex];
-+ else if (vindex == 0xf8)
-+ dp = &map7_f8_opcode;
-+ else
-+ dp = &bad_opcode;
- ins->end_codep = ins->codep;
- /* There is no MODRM byte for VEX0F 77. */
- if ((vex_table_index != VEX_0F || vindex != 0x77)
-@@ -8846,6 +9062,7 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
- break;
-
- case USE_VEX_W_TABLE:
-+ use_vex_w_table:
- if (!ins->need_vex)
- abort ();
-
-@@ -8859,9 +9076,13 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
- if (!fetch_code (ins->info, ins->codep + 4))
- return &err_opcode;
- /* The first byte after 0x62. */
-+ if (*ins->codep & 0x8)
-+ ins->rex2 |= REX_B;
-+ if (!(*ins->codep & 0x10))
-+ ins->rex2 |= REX_R;
-+
- ins->rex = ~(*ins->codep >> 5) & 0x7;
-- ins->vex.r = *ins->codep & 0x10;
-- switch ((*ins->codep & 0xf))
-+ switch (*ins->codep & 0x7)
- {
- default:
- return &bad_opcode;
-@@ -8874,12 +9095,21 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
- case 0x3:
- vex_table_index = EVEX_0F3A;
- break;
-+ case 0x4:
-+ vex_table_index = EVEX_MAP4;
-+ ins->evex_type = evex_from_legacy;
-+ if (ins->address_mode != mode_64bit)
-+ return &bad_opcode;
-+ break;
- case 0x5:
- vex_table_index = EVEX_MAP5;
- break;
- case 0x6:
- vex_table_index = EVEX_MAP6;
- break;
-+ case 0x7:
-+ vex_table_index = EVEX_MAP7;
-+ break;
- }
-
- /* The second byte after 0x62. */
-@@ -8890,9 +9120,8 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
-
- ins->vex.register_specifier = (~(*ins->codep >> 3)) & 0xf;
-
-- /* The U bit. */
- if (!(*ins->codep & 0x4))
-- return &bad_opcode;
-+ ins->rex2 |= REX_X;
-
- switch ((*ins->codep & 0x3))
- {
-@@ -8919,24 +9148,54 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
- ins->vex.v = *ins->codep & 0x8;
- ins->vex.mask_register_specifier = *ins->codep & 0x7;
- ins->vex.zeroing = *ins->codep & 0x80;
-+ /* Set the NF bit for EVEX-Promoted instructions, this bit will be cleared
-+ when it's an evex_default one. */
-+ ins->vex.nf = *ins->codep & 0x4;
-
- if (ins->address_mode != mode_64bit)
- {
-+ /* Report bad for !evex_default and when two fixed values of evex
-+ change.. */
-+ if (ins->evex_type != evex_default
-+ || (ins->rex2 & (REX_B | REX_X)))
-+ return &bad_opcode;
- /* In 16/32-bit mode silently ignore following bits. */
- ins->rex &= ~REX_B;
-- ins->vex.r = true;
-+ ins->rex2 &= ~REX_R;
- }
-
-+ /* EVEX from legacy instructions, when the EVEX.ND bit is 0,
-+ all bits of EVEX.vvvv and EVEX.V' must be 1. */
-+ if (ins->evex_type == evex_from_legacy && !ins->vex.nd
-+ && (ins->vex.register_specifier || !ins->vex.v))
-+ return &bad_opcode;
-+
- ins->need_vex = 4;
-+
-+ /* EVEX from legacy instructions require that EVEX.z, EVEX.L’L and the
-+ lower 2 bits of EVEX.aaa must be 0. */
-+ if (ins->evex_type == evex_from_legacy
-+ && ((ins->vex.mask_register_specifier & 0x3) != 0
-+ || ins->vex.ll != 0
-+ || ins->vex.zeroing != 0))
-+ return &bad_opcode;
-+
- ins->codep++;
- vindex = *ins->codep++;
-- dp = &evex_table[vex_table_index][vindex];
-+ if (vex_table_index != EVEX_MAP7)
-+ dp = &evex_table[vex_table_index][vindex];
-+ else if (vindex == 0xf8)
-+ dp = &map7_f8_opcode;
-+ else
-+ dp = &bad_opcode;
- ins->end_codep = ins->codep;
- if (!fetch_modrm (ins))
- return &err_opcode;
-
-- /* Set vector length. */
-- if (ins->modrm.mod == 3 && ins->vex.b)
-+ /* Set vector length. For EVEX-promoted instructions, evex.ll == 0b00,
-+ which has the same encoding as vex.length == 128 and they can share
-+ the same processing with vex.length in OP_VEX. */
-+ if (ins->modrm.mod == 3 && ins->vex.b && ins->evex_type != evex_from_legacy)
- ins->vex.length = 512;
- else
- {
-@@ -9128,6 +9387,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- .last_data_prefix = -1,
- .last_addr_prefix = -1,
- .last_rex_prefix = -1,
-+ .last_rex2_prefix = -1,
- .last_seg_prefix = -1,
- .fwait_prefix = -1,
- };
-@@ -9167,9 +9427,10 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- }
- else if (startswith (p, "intel"))
- {
-- ins.intel_syntax = 1;
- if (startswith (p + 5, "-mnemonic"))
- ins.intel_mnemonic = true;
-+ else
-+ ins.intel_syntax = 1;
- }
- else if (startswith (p, "att"))
- {
-@@ -9292,24 +9553,25 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- goto out;
- }
-
-- if (*ins.codep == 0x0f)
-+ /* REX2.M in rex2 prefix represents map0 or map1. */
-+ if (ins.last_rex2_prefix < 0 ? *ins.codep == 0x0f : (ins.rex2 & REX2_M))
- {
-- unsigned char threebyte;
-+ if (!ins.rex2)
-+ {
-+ ins.codep++;
-+ if (!fetch_code (info, ins.codep + 1))
-+ goto fetch_error_out;
-+ }
-
-- ins.codep++;
-- if (!fetch_code (info, ins.codep + 1))
-- goto fetch_error_out;
-- threebyte = *ins.codep;
-- dp = &dis386_twobyte[threebyte];
-- ins.need_modrm = twobyte_has_modrm[threebyte];
-- ins.codep++;
-+ dp = &dis386_twobyte[*ins.codep];
-+ ins.need_modrm = twobyte_has_modrm[*ins.codep];
- }
- else
- {
- dp = &dis386[*ins.codep];
- ins.need_modrm = onebyte_has_modrm[*ins.codep];
-- ins.codep++;
- }
-+ ins.codep++;
-
- /* Save sizeflag for printing the extra ins.prefixes later before updating
- it for mnemonic and operand processing. The prefix names depend
-@@ -9335,6 +9597,22 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- dp = get_valid_dis386 (dp, &ins);
- if (dp == &err_opcode)
- goto fetch_error_out;
-+
-+ /* For APX instructions promoted from legacy maps 0/1, embedded prefix
-+ is interpreted as the operand size override. */
-+ if (ins.evex_type == evex_from_legacy
-+ && ins.vex.prefix == DATA_PREFIX_OPCODE)
-+ sizeflag ^= DFLAG;
-+
-+ if(ins.evex_type == evex_default)
-+ ins.vex.nf = false;
-+ else
-+ /* For EVEX-promoted formats, we need to clear EVEX.NF (ccmp and ctest
-+ are cleared separately.) in mask_register_specifier and keep the low
-+ 2 bits of mask_register_specifier to report errors for invalid cases
-+ . */
-+ ins.vex.mask_register_specifier &= 0x3;
-+
- if (dp != NULL && putop (&ins, dp->name, sizeflag) == 0)
- {
- if (!get_sib (&ins, sizeflag))
-@@ -9387,10 +9665,13 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- oappend (&ins, "/(bad)");
- }
- }
-+ /* vex.nf is cleared after being consumed. */
-+ if (ins.vex.nf)
-+ oappend (&ins, "{bad-nf}");
-
- /* Check whether rounding control was enabled for an insn not
-- supporting it. */
-- if (ins.modrm.mod == 3 && ins.vex.b
-+ supporting it, when evex.b is not treated as evex.nd. */
-+ if (ins.modrm.mod == 3 && ins.vex.b && ins.evex_type == evex_default
- && !(ins.evex_used & EVEX_b_used))
- {
- for (i = 0; i < MAX_OPERANDS; ++i)
-@@ -9454,7 +9735,15 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- goto out;
- }
-
-- switch (dp->prefix_requirement)
-+ if ((dp->prefix_requirement & PREFIX_REX2_ILLEGAL)
-+ && ins.last_rex2_prefix >= 0 && (ins.rex2 & REX2_SPECIAL) == 0)
-+ {
-+ i386_dis_printf (info, dis_style_text, "(bad)");
-+ ret = ins.end_codep - priv.the_buffer;
-+ goto out;
-+ }
-+
-+ switch (dp->prefix_requirement & ~PREFIX_REX2_ILLEGAL)
- {
- case PREFIX_DATA:
- /* If only the data prefix is marked as mandatory, its absence renders
-@@ -9506,6 +9795,25 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- if (ins.last_repnz_prefix >= 0)
- ins.all_prefixes[ins.last_repnz_prefix] = 0xf2;
- break;
-+
-+ case PREFIX_NP_OR_DATA:
-+ if (ins.vex.prefix == REPE_PREFIX_OPCODE
-+ || ins.vex.prefix == REPNE_PREFIX_OPCODE)
-+ {
-+ i386_dis_printf (info, dis_style_text, "(bad)");
-+ ret = ins.end_codep - priv.the_buffer;
-+ goto out;
-+ }
-+ break;
-+
-+ case NO_PREFIX:
-+ if (ins.vex.prefix)
-+ {
-+ i386_dis_printf (info, dis_style_text, "(bad)");
-+ ret = ins.end_codep - priv.the_buffer;
-+ goto out;
-+ }
-+ break;
- }
-
- /* Check if the REX prefix is used. */
-@@ -9513,6 +9821,14 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- && !ins.need_vex && ins.last_rex_prefix >= 0)
- ins.all_prefixes[ins.last_rex_prefix] = 0;
-
-+ /* Check if the REX2 prefix is used. */
-+ if (ins.last_rex2_prefix >= 0
-+ && ((ins.rex2 & REX2_SPECIAL)
-+ || (((ins.rex2 & 7) ^ (ins.rex2_used & 7)) == 0
-+ && (ins.rex ^ ins.rex_used) == 0
-+ && (ins.rex2 & 7))))
-+ ins.all_prefixes[ins.last_rex2_prefix] = 0;
-+
- /* Check if the SEG prefix is used. */
- if ((ins.prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | PREFIX_ES
- | PREFIX_FS | PREFIX_GS)) != 0
-@@ -9541,7 +9857,11 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
- if (name == NULL)
- abort ();
- prefix_length += strlen (name) + 1;
-- i386_dis_printf (info, dis_style_mnemonic, "%s ", name);
-+ if (ins.all_prefixes[i] == REX2_OPCODE)
-+ i386_dis_printf (info, dis_style_mnemonic, "{%s 0x%x} ", name,
-+ (unsigned int) ins.rex2_payload);
-+ else
-+ i386_dis_printf (info, dis_style_mnemonic, "%s ", name);
- }
-
- /* Check maximum code length. */
-@@ -10077,6 +10397,16 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- int cond = 1;
- unsigned int l = 0, len = 0;
- char last[4];
-+ bool evex_printed = false;
-+
-+ /* We don't want to add any prefix or suffix to (bad), so return early. */
-+ if (!strncmp (in_template, "(bad)", 5))
-+ {
-+ oappend (ins, "(bad)");
-+ *ins->obufp = 0;
-+ ins->mnemonicendp = ins->obufp;
-+ return 0;
-+ }
-
- for (p = in_template; *p; p++)
- {
-@@ -10090,6 +10420,12 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- switch (*p)
- {
- default:
-+ if (ins->evex_type == evex_from_legacy && !ins->vex.nd
-+ && !(ins->rex2 & 7) && !evex_printed)
-+ {
-+ oappend (ins, "{evex} ");
-+ evex_printed = true;
-+ }
- *ins->obufp++ = *p;
- break;
- case '%':
-@@ -10120,7 +10456,7 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- case 'A':
- if (ins->intel_syntax)
- break;
-- if ((ins->need_modrm && ins->modrm.mod != 3)
-+ if ((ins->need_modrm && ins->modrm.mod != 3 && !ins->vex.nd)
- || (sizeflag & SUFFIX_ALWAYS))
- *ins->obufp++ = 'b';
- break;
-@@ -10204,7 +10540,7 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- {
- case 'X':
- if (!ins->vex.evex || ins->vex.b || ins->vex.ll >= 2
-- || !ins->vex.r
-+ || (ins->rex2 & 7)
- || (ins->modrm.mod == 3 && (ins->rex & REX_X))
- || !ins->vex.v || ins->vex.mask_register_specifier)
- break;
-@@ -10226,6 +10562,11 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- *ins->obufp++ = '}';
- *ins->obufp++ = ' ';
- break;
-+ case 'M':
-+ if (ins->modrm.mod != 3 && !(ins->rex2 & 7))
-+ oappend (ins, "{evex} ");
-+ evex_printed = true;
-+ break;
- default:
- abort ();
- }
-@@ -10245,16 +10586,39 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- ins->used_prefixes |= (ins->prefixes & PREFIX_ADDR);
- break;
- case 'F':
-- if (ins->intel_syntax)
-+ if (l == 0)
-+ {
-+ if (ins->intel_syntax)
-+ break;
-+ if ((ins->prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
-+ {
-+ if (sizeflag & AFLAG)
-+ *ins->obufp++ = ins->address_mode == mode_64bit ? 'q' : 'l';
-+ else
-+ *ins->obufp++ = ins->address_mode == mode_64bit ? 'l' : 'w';
-+ ins->used_prefixes |= (ins->prefixes & PREFIX_ADDR);
-+ }
-+ }
-+ else if (l == 1 && last[0] == 'C')
- break;
-- if ((ins->prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
-+ else if (l == 1 && last[0] == 'N')
- {
-- if (sizeflag & AFLAG)
-- *ins->obufp++ = ins->address_mode == mode_64bit ? 'q' : 'l';
-- else
-- *ins->obufp++ = ins->address_mode == mode_64bit ? 'l' : 'w';
-- ins->used_prefixes |= (ins->prefixes & PREFIX_ADDR);
-+ if (ins->vex.nf)
-+ {
-+ oappend (ins, "{nf} ");
-+ /* This bit needs to be cleared after it is consumed. */
-+ ins->vex.nf = false;
-+ evex_printed = true;
-+ }
-+ else if (ins->evex_type == evex_from_vex && !(ins->rex2 & 7)
-+ && ins->vex.v)
-+ {
-+ oappend (ins, "{evex} ");
-+ evex_printed = true;
-+ }
- }
-+ else
-+ abort ();
- break;
- case 'G':
- if (ins->intel_syntax || (ins->obufp[-1] != 's'
-@@ -10311,7 +10675,16 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- *ins->obufp++ = 'd';
- break;
- case 'L':
-- abort ();
-+ if (ins->intel_syntax)
-+ break;
-+ if (sizeflag & SUFFIX_ALWAYS)
-+ {
-+ if (ins->rex & REX_W)
-+ *ins->obufp++ = 'q';
-+ else
-+ *ins->obufp++ = 'l';
-+ }
-+ break;
- case 'M':
- if (ins->intel_mnemonic != cond)
- *ins->obufp++ = 'r';
-@@ -10346,6 +10719,19 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- case 'P':
- if (l == 0)
- {
-+ if (!cond && ins->last_rex2_prefix >= 0 && (ins->rex & REX_W))
-+ {
-+ /* For pushp and popp, p is printed and do not print {rex2}
-+ for them. */
-+ *ins->obufp++ = 'p';
-+ ins->rex2 |= REX2_SPECIAL;
-+ break;
-+ }
-+
-+ /* For "!P" print nothing else in Intel syntax. */
-+ if (!cond && ins->intel_syntax)
-+ break;
-+
- if ((ins->modrm.mod == 3 || !cond)
- && !(sizeflag & SUFFIX_ALWAYS))
- break;
-@@ -10390,7 +10776,7 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
- if (ins->intel_syntax && !alt)
- break;
- USED_REX (REX_W);
-- if ((ins->need_modrm && ins->modrm.mod != 3)
-+ if ((ins->need_modrm && ins->modrm.mod != 3 && !ins->vex.nd)
- || (sizeflag & SUFFIX_ALWAYS))
- {
- if (ins->rex & REX_W)
-@@ -10818,7 +11204,8 @@ print_displacement (instr_info *ins, bfd_signed_vma val)
- static void
- intel_operand_size (instr_info *ins, int bytemode, int sizeflag)
- {
-- if (ins->vex.b)
-+ /* Check if there is a broadcast, when evex.b is not treated as evex.nd. */
-+ if (ins->vex.b && ins->evex_type == evex_default)
- {
- if (!ins->vex.no_broadcast)
- switch (bytemode)
-@@ -11088,6 +11475,8 @@ print_register (instr_info *ins, unsigned int reg, unsigned int rexmask,
- USED_REX (rexmask);
- if (ins->rex & rexmask)
- reg += 8;
-+ if (ins->rex2 & rexmask)
-+ reg += 16;
-
- switch (bytemode)
- {
-@@ -11095,7 +11484,7 @@ print_register (instr_info *ins, unsigned int reg, unsigned int rexmask,
- case b_swap_mode:
- if (reg & 4)
- USED_REX (0);
-- if (ins->rex)
-+ if (ins->rex || ins->rex2)
- names = att_names8rex;
- else
- names = att_names8;
-@@ -11300,6 +11689,7 @@ OP_Skip_MODRM (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- ins->codep++;
-+ ins->has_skipped_modrm = true;
- return true;
- }
-
-@@ -11310,7 +11700,10 @@ OP_E_memory (instr_info *ins, int bytemode, int sizeflag)
- int riprel = 0;
- int shift;
-
-- if (ins->vex.evex)
-+ add += (ins->rex2 & REX_B) ? 16 : 0;
-+
-+ /* Handles EVEX other than APX EVEX-promoted instructions. */
-+ if (ins->vex.evex && ins->evex_type == evex_default)
- {
-
- /* Zeroing-masking is invalid for memory destinations. Set the flag
-@@ -11454,6 +11847,13 @@ OP_E_memory (instr_info *ins, int bytemode, int sizeflag)
- abort ();
- if (ins->vex.evex)
- {
-+ /* S/G EVEX insns require EVEX.X4 not to be set. */
-+ if (ins->rex2 & REX_X)
-+ {
-+ oappend (ins, "(bad)");
-+ return true;
-+ }
-+
- if (!ins->vex.v)
- vindex += 16;
- check_gather = ins->obufp == ins->op_out[1];
-@@ -11483,6 +11883,9 @@ OP_E_memory (instr_info *ins, int bytemode, int sizeflag)
- }
- break;
- default:
-+ if (ins->rex2 & REX_X)
-+ vindex += 16;
-+
- if (vindex != 4)
- indexes = ins->address_mode == mode_64bit && !addr32flag
- ? att_names64 : att_names32;
-@@ -11653,7 +12056,7 @@ OP_E_memory (instr_info *ins, int bytemode, int sizeflag)
-
- if (ins->rex & REX_R)
- modrm_reg += 8;
-- if (!ins->vex.r)
-+ if (ins->rex2 & REX_R)
- modrm_reg += 16;
- if (vindex == modrm_reg)
- oappend (ins, "/(bad)");
-@@ -11735,7 +12138,7 @@ OP_E_memory (instr_info *ins, int bytemode, int sizeflag)
- print_operand_value (ins, disp & 0xffff, dis_style_text);
- }
- }
-- if (ins->vex.b)
-+ if (ins->vex.b && ins->evex_type == evex_default)
- {
- ins->evex_used |= EVEX_b_used;
-
-@@ -11818,7 +12221,11 @@ OP_E (instr_info *ins, int bytemode, int sizeflag)
- {
- /* Skip mod/rm byte. */
- MODRM_CHECK;
-- ins->codep++;
-+ if (!ins->has_skipped_modrm)
-+ {
-+ ins->codep++;
-+ ins->has_skipped_modrm = true;
-+ }
-
- if (ins->modrm.mod == 3)
- {
-@@ -11855,10 +12262,7 @@ OP_indirE (instr_info *ins, int bytemode, int sizeflag)
- static bool
- OP_G (instr_info *ins, int bytemode, int sizeflag)
- {
-- if (ins->vex.evex && !ins->vex.r && ins->address_mode == mode_64bit)
-- oappend (ins, "(bad)");
-- else
-- print_register (ins, ins->modrm.reg, REX_R, bytemode, sizeflag);
-+ print_register (ins, ins->modrm.reg, REX_R, bytemode, sizeflag);
- return true;
- }
-
-@@ -11866,7 +12270,7 @@ static bool
- OP_REG (instr_info *ins, int code, int sizeflag)
- {
- const char *s;
-- int add;
-+ int add = 0;
-
- switch (code)
- {
-@@ -11879,8 +12283,8 @@ OP_REG (instr_info *ins, int code, int sizeflag)
- USED_REX (REX_B);
- if (ins->rex & REX_B)
- add = 8;
-- else
-- add = 0;
-+ if (ins->rex2 & REX_B)
-+ add += 16;
-
- switch (code)
- {
-@@ -12011,6 +12415,8 @@ OP_I (instr_info *ins, int bytemode, int sizeflag)
- case const_1_mode:
- if (ins->intel_syntax)
- oappend (ins, "1");
-+ else
-+ oappend (ins, "$1");
- return true;
- default:
- oappend (ins, INTERNAL_DISASSEMBLER_ERROR);
-@@ -12487,7 +12893,7 @@ OP_XMM (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
- reg += 8;
- if (ins->vex.evex)
- {
-- if (!ins->vex.r)
-+ if (ins->rex2 & REX_R)
- reg += 16;
- }
-
-@@ -12592,6 +12998,8 @@ OP_EX (instr_info *ins, int bytemode, int sizeflag)
- USED_REX (REX_B);
- if (ins->rex & REX_B)
- reg += 8;
-+ if (ins->rex2 & REX_B)
-+ reg += 16;
- if (ins->vex.evex)
- {
- USED_REX (REX_X);
-@@ -12623,9 +13031,10 @@ OP_R (instr_info *ins, int bytemode, int sizeflag)
- {
- case d_mode:
- case dq_mode:
-+ case q_mode:
- case mask_mode:
- return OP_E (ins, bytemode, sizeflag);
-- case q_mode:
-+ case q_mm_mode:
- return OP_EM (ins, x_mode, sizeflag);
- case xmm_mode:
- if (ins->vex.length <= 128)
-@@ -13095,6 +13504,13 @@ OP_VEX (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
- if (!ins->need_vex)
- return true;
-
-+ if (ins->evex_type == evex_from_legacy)
-+ {
-+ ins->evex_used |= EVEX_b_used;
-+ if (!ins->vex.nd)
-+ return true;
-+ }
-+
- reg = ins->vex.register_specifier;
- ins->vex.register_specifier = 0;
- if (ins->address_mode != mode_64bit)
-@@ -13186,12 +13602,22 @@ OP_VEX (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
- names = att_names_xmm;
- ins->evex_used |= EVEX_len_used;
- break;
-+ case v_mode:
- case dq_mode:
- if (ins->rex & REX_W)
- names = att_names64;
-+ else if (bytemode == v_mode
-+ && !(sizeflag & DFLAG))
-+ names = att_names16;
- else
- names = att_names32;
- break;
-+ case b_mode:
-+ names = att_names8rex;
-+ break;
-+ case q_mode:
-+ names = att_names64;
-+ break;
- case mask_bd_mode:
- case mask_mode:
- if (reg > 0x7)
-@@ -13491,7 +13917,7 @@ DistinctDest_Fixup (instr_info *ins, int bytemode, int sizeflag)
- /* Calc destination register number. */
- if (ins->rex & REX_R)
- modrm_reg += 8;
-- if (!ins->vex.r)
-+ if (ins->rex2 & REX_R)
- modrm_reg += 16;
-
- /* Calc src1 register number. */
-@@ -13576,3 +14002,58 @@ PREFETCHI_Fixup (instr_info *ins, int bytemode, int sizeflag)
-
- return OP_M (ins, bytemode, sizeflag);
- }
-+
-+static bool
-+PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag)
-+{
-+ if (ins->modrm.mod != 3)
-+ return true;
-+
-+ unsigned int vvvv_reg = ins->vex.register_specifier
-+ | (!ins->vex.v << 4);
-+ unsigned int rm_reg = ins->modrm.rm + (ins->rex & REX_B ? 8 : 0)
-+ + (ins->rex2 & REX_B ? 16 : 0);
-+
-+ /* Push2/Pop2 cannot use RSP and Pop2 cannot pop two same registers. */
-+ if (!ins->vex.nd || vvvv_reg == 0x4 || rm_reg == 0x4
-+ || (!ins->modrm.reg
-+ && vvvv_reg == rm_reg))
-+ {
-+ oappend (ins, "(bad)");
-+ return true;
-+ }
-+
-+ return OP_VEX (ins, bytemode, sizeflag);
-+}
-+
-+static bool
-+JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag)
-+{
-+ if (ins->last_rex2_prefix >= 0)
-+ {
-+ uint64_t op;
-+
-+ if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) != 0x0
-+ || (ins->rex & REX_W) != 0x0)
-+ {
-+ oappend (ins, "(bad)");
-+ return true;
-+ }
-+
-+ if (bytemode == eAX_reg)
-+ return true;
-+
-+ if (!get64 (ins, &op))
-+ return false;
-+
-+ ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs");
-+ ins->rex2 |= REX2_SPECIAL;
-+ oappend_immediate (ins, op);
-+
-+ return true;
-+ }
-+
-+ if (bytemode == eAX_reg)
-+ return OP_IMREG (ins, bytemode, sizeflag);
-+ return OP_OFF64 (ins, bytemode, sizeflag);
-+}
-diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
---- a/opcodes/i386-gen.c
-+++ b/opcodes/i386-gen.c
-@@ -1,4 +1,4 @@
--/* Copyright (C) 2007-2023 Free Software Foundation, Inc.
-+/* Copyright (C) 2007-2024 Free Software Foundation, Inc.
-
- This file is part of the GNU opcodes library.
-
-@@ -63,7 +63,7 @@ static const dependency isa_dependencies[] =
- { "NOCONA",
- "GENERIC64|FISTTP|SSE3|MONITOR|CX16" },
- { "CORE",
-- "P4|FISTTP|SSE3|MONITOR|CX16" },
-+ "P4|FISTTP|SSE3|MONITOR" },
- { "CORE2",
- "NOCONA|SSSE3" },
- { "COREI7",
-@@ -94,6 +94,8 @@ static const dependency isa_dependencies[] =
- "ZNVER2|INVLPGB|TLBSYNC|VAES|VPCLMULQDQ|INVPCID|SNP|OSPKE" },
- { "ZNVER4",
- "ZNVER3|AVX512F|AVX512DQ|AVX512IFMA|AVX512CD|AVX512BW|AVX512VL|AVX512_BF16|AVX512VBMI|AVX512_VBMI2|AVX512_VNNI|AVX512_BITALG|AVX512_VPOPCNTDQ|GFNI|RMPQUERY" },
-+ { "ZNVER5",
-+ "ZNVER4|AVX_VNNI|MOVDIRI|MOVDIR64B|AVX512_VP2INTERSECT|PREFETCHI" },
- { "BTVER1",
- "GENERIC64|FISTTP|MONITOR|CX16|LAHF_SAHF|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|Clflush|FISTTP|SVME" },
- { "BTVER2",
-@@ -166,6 +168,10 @@ static const dependency isa_dependencies[] =
- "AVX2" },
- { "AVX_NE_CONVERT",
- "AVX2" },
-+ { "CX16",
-+ "64" },
-+ { "LKGS",
-+ "64" },
- { "FRED",
- "LKGS" },
- { "AVX512F",
-@@ -240,13 +246,13 @@ static const dependency isa_dependencies[] =
- { "SNP",
- "SEV_ES" },
- { "RMPQUERY",
-- "SNP" },
-+ "SNP|64" },
- { "TSX",
- "RTM|HLE" },
- { "TSXLDTRK",
- "RTM" },
- { "AMX_TILE",
-- "XSAVE" },
-+ "XSAVE|64" },
- { "AMX_INT8",
- "AMX_TILE" },
- { "AMX_BF16",
-@@ -259,6 +265,20 @@ static const dependency isa_dependencies[] =
- "SSE2" },
- { "WIDEKL",
- "KL" },
-+ { "PBNDKB",
-+ "64" },
-+ { "UINTR",
-+ "64" },
-+ { "PREFETCHI",
-+ "64" },
-+ { "CMPCCXADD",
-+ "64" },
-+ { "MSRLIST",
-+ "64" },
-+ { "USER_MSR",
-+ "64" },
-+ { "APX_F",
-+ "XSAVE|64" },
- };
-
- /* This array is populated as process_i386_initializers() walks cpu_flags[]. */
-@@ -380,6 +400,8 @@ static bitfield cpu_flags[] =
- BITFIELD (RAO_INT),
- BITFIELD (FRED),
- BITFIELD (LKGS),
-+ BITFIELD (USER_MSR),
-+ BITFIELD (APX_F),
- BITFIELD (MWAITX),
- BITFIELD (CLZERO),
- BITFIELD (OSPKE),
-@@ -463,12 +485,12 @@ static bitfield opcode_modifiers[] =
- BITFIELD (StaticRounding),
- BITFIELD (SAE),
- BITFIELD (Disp8MemShift),
-- BITFIELD (Vsz),
- BITFIELD (Optimize),
-- BITFIELD (ATTMnemonic),
-- BITFIELD (ATTSyntax),
-- BITFIELD (IntelSyntax),
-+ BITFIELD (Dialect),
- BITFIELD (ISA64),
-+ BITFIELD (NoEgpr),
-+ BITFIELD (NF),
-+ BITFIELD (Rex2),
- };
-
- #define CLASS(n) #n, n
-@@ -587,7 +609,7 @@ static void
- process_copyright (FILE *fp)
- {
- fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\
--/* Copyright (C) 2007-2023 Free Software Foundation, Inc.\n\
-+/* Copyright (C) 2007-2024 Free Software Foundation, Inc.\n\
- \n\
- This file is part of the GNU opcodes library.\n\
- \n\
-@@ -771,8 +793,10 @@ add_isa_dependencies (bitfield *flags, const char *f, int value,
- }
- free (deps);
-
-- /* ISA extensions with dependencies need CPU_ANY_*_FLAGS emitted. */
-- if (reverse < ARRAY_SIZE (isa_reverse_deps[0]))
-+ /* ISA extensions with dependencies need CPU_ANY_*_FLAGS emitted,
-+ unless the sole dependency is the "64-bit mode only" one. */
-+ if (reverse < ARRAY_SIZE (isa_reverse_deps[0])
-+ && strcmp (isa_dependencies[i].deps, "64"))
- isa_reverse_deps[reverse][reverse] = 1;
-
- is_avx = orig_is_avx;
-@@ -787,15 +811,16 @@ add_isa_dependencies (bitfield *flags, const char *f, int value,
-
- static void
- output_cpu_flags (FILE *table, bitfield *flags, unsigned int size,
-- int macro, const char *comma, const char *indent, int lineno)
-+ int mode, const char *comma, const char *indent, int lineno)
- {
- unsigned int i = 0, j = 0;
-
-- memset (&active_cpu_flags, 0, sizeof(active_cpu_flags));
-+ if (mode < 0)
-+ memset (&active_cpu_flags, 0, sizeof(active_cpu_flags));
-
- fprintf (table, "%s{ { ", indent);
-
-- if (!macro)
-+ if (mode <= 0)
- {
- for (j = ~0u; i < CpuAttrEnums; i++)
- {
-@@ -806,7 +831,8 @@ output_cpu_flags (FILE *table, bitfield *flags, unsigned int size,
- fail ("%s: %d: invalid combination of CPU identifiers\n",
- filename, lineno);
- j = i;
-- active_cpu_flags.array[i / 32] |= 1U << (i % 32);
-+ if (mode)
-+ active_cpu_flags.array[i / 32] |= 1U << (i % 32);
- }
-
- /* Write 0 to indicate "no associated flag". */
-@@ -824,16 +850,25 @@ output_cpu_flags (FILE *table, bitfield *flags, unsigned int size,
- if (((j + 1) % 20) == 0)
- {
- /* We need \\ for macro. */
-- if (macro)
-+ if (mode > 0)
- fprintf (table, " \\\n %s", indent);
- else
- fprintf (table, "\n %s", indent);
- }
-- if (flags[i].value)
-+ if (mode < 0 && flags[i].value)
- active_cpu_flags.array[i / 32] |= 1U << (i % 32);
- }
-
-- fprintf (table, "%d } }%s\n", flags[i].value, comma);
-+#if defined(CpuAttrUnused) != defined(CpuUnused)
-+ if (mode <= 0)
-+# ifdef CpuUnused
-+ fprintf (table, " } }%s\n", comma);
-+# else
-+ fprintf (table, "%d, 0 } }%s\n", flags[i].value, comma);
-+# endif
-+ else
-+#endif
-+ fprintf (table, "%d } }%s\n", flags[i].value, comma);
- }
-
- static void
-@@ -846,15 +881,17 @@ process_i386_cpu_flag (FILE *table, char *flag,
- unsigned int i;
- int value = 1;
- bool is_isa = false;
-- bitfield flags [ARRAY_SIZE (cpu_flags)];
-+ bitfield all [ARRAY_SIZE (cpu_flags)];
-+ bitfield any [ARRAY_SIZE (cpu_flags)];
-
- /* Copy the default cpu flags. */
-- memcpy (flags, cpu_flags, sizeof (cpu_flags));
-+ memcpy (all, cpu_flags, sizeof (cpu_flags));
-+ memcpy (any, cpu_flags, sizeof (cpu_flags));
-
- if (flag == NULL)
- {
- for (i = 0; i < ARRAY_SIZE (isa_reverse_deps[0]); ++i)
-- flags[i].value = isa_reverse_deps[reverse][i];
-+ any[i].value = isa_reverse_deps[reverse][i];
- goto output;
- }
-
-@@ -876,9 +913,9 @@ process_i386_cpu_flag (FILE *table, char *flag,
-
- /* First we turn on everything except for cpuno64 and - if
- present - the padding field. */
-- for (i = 0; i < ARRAY_SIZE (flags); i++)
-- if (flags[i].position < CpuNo64)
-- flags[i].value = 1;
-+ for (i = 0; i < ARRAY_SIZE (any); i++)
-+ if (any[i].position < CpuNo64)
-+ any[i].value = 1;
-
- /* Turn off selective bits. */
- value = 0;
-@@ -886,10 +923,10 @@ process_i386_cpu_flag (FILE *table, char *flag,
-
- if (name != NULL && value != 0)
- {
-- for (i = 0; i < ARRAY_SIZE (flags); i++)
-- if (strcasecmp (flags[i].name, name) == 0)
-+ for (i = 0; i < ARRAY_SIZE (any); i++)
-+ if (strcasecmp (any[i].name, name) == 0)
- {
-- add_isa_dependencies (flags, name, 1, reverse);
-+ add_isa_dependencies (any, name, 1, reverse);
- is_isa = true;
- break;
- }
-@@ -897,18 +934,40 @@ process_i386_cpu_flag (FILE *table, char *flag,
-
- if (strcmp (flag, "0"))
- {
-+ bool combined = false;
-+
- if (is_isa)
- return;
-
- /* Turn on/off selective bits. */
- last = flag + strlen (flag);
-+ if (name == NULL && strchr (flag, '&'))
-+ {
-+ for (; next < last && *next != '('; )
-+ {
-+ str = next_field (next, '&', &next, last);
-+ set_bitfield (str, all, value, ARRAY_SIZE (all), lineno);
-+ }
-+ if (*next == '(')
-+ {
-+ if (*--last != ')')
-+ fail ("%s: %d: missing `)' in bitfield: %s\n", filename,
-+ lineno, flag);
-+ ++next;
-+ *last = '\0';
-+ }
-+ combined = true;
-+ }
- for (; next && next < last; )
- {
- str = next_field (next, '|', &next, last);
-- if (name == NULL)
-- set_bitfield (str, flags, value, ARRAY_SIZE (flags), lineno);
-- else
-- add_isa_dependencies (flags, str, value, reverse);
-+ if (name)
-+ add_isa_dependencies (any, str, value, reverse);
-+ else if (combined || next < last)
-+ set_bitfield (str, any, value, ARRAY_SIZE (any), lineno);
-+ else /* Singular specifiers go into "all". */
-+ set_bitfield (str, all, value, ARRAY_SIZE (all), lineno);
-+ combined = true;
- }
- }
-
-@@ -918,6 +977,15 @@ process_i386_cpu_flag (FILE *table, char *flag,
- size_t len = strlen (name);
- char *upper = xmalloc (len + 1);
-
-+ /* Cpu64 is special: It specifies a mode dependency, not an ISA one. Zap
-+ the flag from ISA initializer macros (and from CPU_ANY_64_FLAGS
-+ itself we only care about tracking its dependents. Also don't emit the
-+ (otherwise all zero) CPU_64_FLAGS. */
-+ if (flag != NULL && reverse == Cpu64)
-+ return;
-+ if (is_isa || flag == NULL)
-+ any[Cpu64].value = 0;
-+
- for (i = 0; i < len; ++i)
- {
- /* Don't emit #define-s for auxiliary entries. */
-@@ -930,8 +998,18 @@ process_i386_cpu_flag (FILE *table, char *flag,
- flag != NULL ? "": "ANY_", upper);
- free (upper);
- }
-+ else
-+ {
-+ /* Synthesize "64-bit mode only" dependencies from the dependencies we
-+ have accumulated. */
-+ for (i = 0; i < ARRAY_SIZE (isa_reverse_deps[0]); ++i)
-+ if (all[i].value && isa_reverse_deps[Cpu64][i])
-+ all[Cpu64].value = 1;
-+
-+ output_cpu_flags(table, all, ARRAY_SIZE (all), -1, comma, indent, lineno);
-+ }
-
-- output_cpu_flags (table, flags, ARRAY_SIZE (flags), name != NULL,
-+ output_cpu_flags (table, any, ARRAY_SIZE (any), name != NULL,
- comma, indent, lineno);
- }
-
-@@ -1008,10 +1086,44 @@ get_element_size (char **opnd, int lineno)
- return elem_size;
- }
-
-+static bool
-+rex2_disallowed (const unsigned long long opcode, unsigned int length,
-+ unsigned int space, const char *cpu_flags)
-+{
-+ /* Some opcodes encode a ModR/M-like byte directly in the opcode. */
-+ unsigned int base_opcode = opcode >> (8 * length - 8);
-+
-+ /* All opcodes listed map0 0x4*, 0x7*, 0xa*, 0xe* and map1 0x3*, 0x8*
-+ are reserved under REX2 and triggers #UD when prefixed with REX2 */
-+ if (space == 0)
-+ switch (base_opcode >> 4)
-+ {
-+ case 0x4:
-+ case 0x7:
-+ case 0xA:
-+ case 0xE:
-+ return true;
-+ default:
-+ return false;
-+ }
-+
-+ if (space == SPACE_0F)
-+ switch (base_opcode >> 4)
-+ {
-+ case 0x3:
-+ case 0x8:
-+ return true;
-+ default:
-+ return false;
-+ }
-+
-+ return false;
-+}
-+
- static void
- process_i386_opcode_modifier (FILE *table, char *mod, unsigned int space,
- unsigned int prefix, const char *extension_opcode,
-- char **opnd, int lineno)
-+ char **opnd, int lineno, bool rex2_disallowed)
- {
- char *str, *next, *last;
- bitfield modifiers [ARRAY_SIZE (opcode_modifiers)];
-@@ -1021,8 +1133,10 @@ process_i386_opcode_modifier (FILE *table, char *mod, unsigned int space,
- SPACE(0F),
- SPACE(0F38),
- SPACE(0F3A),
-+ SPACE(EVEXMAP4),
- SPACE(EVEXMAP5),
- SPACE(EVEXMAP6),
-+ SPACE(VEXMAP7),
- SPACE(XOP08),
- SPACE(XOP09),
- SPACE(XOP0A),
-@@ -1127,6 +1241,22 @@ process_i386_opcode_modifier (FILE *table, char *mod, unsigned int space,
- fprintf (table, " SPACE_%s, %s,\n",
- spaces[space], extension_opcode ? extension_opcode : "None");
-
-+ /* Rather than evaluating multiple conditions at runtime to determine
-+ whether an EVEX encoding is being dealt with, derive that information
-+ right here. A missing EVex attribute means "dynamic". */
-+ if (!modifiers[EVex].value
-+ && (modifiers[Disp8MemShift].value
-+ || modifiers[Broadcast].value
-+ || modifiers[Masking].value
-+ || modifiers[SAE].value))
-+ modifiers[EVex].value = EVEXDYN;
-+
-+ /* Vex, legacy map2 and map3 and rex2_disallowed do not support EGPR.
-+ For templates supporting both Vex and EVex allowing EGPR. */
-+ if ((modifiers[Vex].value || space > SPACE_0F || rex2_disallowed)
-+ && !modifiers[EVex].value)
-+ modifiers[NoEgpr].value = 1;
-+
- output_opcode_modifier (table, modifiers, ARRAY_SIZE (modifiers));
- }
-
-@@ -1351,7 +1481,9 @@ output_i386_opcode (FILE *table, const char *name, char *str,
- free (ident);
-
- process_i386_opcode_modifier (table, opcode_modifier, space, prefix,
-- extension_opcode, operand_types, lineno);
-+ extension_opcode, operand_types, lineno,
-+ rex2_disallowed (opcode, length, space,
-+ cpu_flags));
-
- process_i386_cpu_flag (table, cpu_flags, NULL, ",", " ", lineno, CpuMax);
-
-@@ -1406,10 +1538,10 @@ opcode_hash_eq (const void *p, const void *q)
- return strcmp (name, entry->name) == 0;
- }
-
--static void
-+static bool
- parse_template (char *buf, int lineno)
- {
-- char sep, *end, *name;
-+ char sep, *end, *ptr;
- struct template *tmpl;
- struct template_instance *last_inst = NULL;
-
-@@ -1436,8 +1568,16 @@ parse_template (char *buf, int lineno)
- prev->next = tmpl->next;
- else
- templates = tmpl->next;
-- return;
-+ return true;
- }
-+
-+ /* Check whether this actually is a reference to an existing template:
-+ If there's '>' ahead of ':', it can't be a new template definition
-+ (and template undefs have are dealt with above). */
-+ ptr = strchr (buf, '>');
-+ if (ptr != NULL && ptr < end)
-+ return false;
-+
- *end++ = '\0';
- remove_trailing_whitespaces (buf);
-
-@@ -1512,6 +1652,8 @@ parse_template (char *buf, int lineno)
-
- tmpl->next = templates;
- templates = tmpl;
-+
-+ return true;
- }
-
- static unsigned int
-@@ -1768,10 +1910,12 @@ process_i386_opcodes (FILE *table)
- /* Ignore comments. */
- case '\0':
- continue;
-- break;
-+
- case '<':
-- parse_template (p, lineno);
-- continue;
-+ if (parse_template (p, lineno))
-+ continue;
-+ break;
-+
- default:
- if (!marker)
- continue;
-@@ -1808,23 +1952,26 @@ process_i386_opcodes (FILE *table)
-
- /* Generate opcode sets array. */
- fprintf (table, "\n/* i386 opcode sets table. */\n\n");
-- fprintf (table, "static const insn_template *const i386_op_sets[] =\n{\n");
-- fprintf (table, " i386_optab,\n");
-+ fprintf (table, "typedef unsigned short i386_op_off_t;\n");
-+ fprintf (table, "static const i386_op_off_t i386_op_sets[] =\n{\n ");
-
- for (nr = j = 0; j < i; j++)
- {
- struct opcode_entry *next = &opcode_array[j]->entry;
-
-+ if ((j + 1) % 8 != 0)
-+ fprintf (table, "%5u,", nr);
-+ else
-+ fprintf (table, "%5u,\n ", nr);
- do
- {
- ++nr;
- next = next->next;
- }
- while (next);
-- fprintf (table, " i386_optab + %u,\n", nr);
- }
-
-- fprintf (table, "};\n");
-+ fprintf (table, "%5u\n};\n", nr);
-
- /* Emit mnemonics and associated #define-s. */
- qsort (opcode_array, i, sizeof (*opcode_array), mnemonic_cmp);
-@@ -2140,6 +2287,8 @@ main (int argc, char **argv)
- qsort (operand_types, ARRAY_SIZE (operand_types),
- sizeof (operand_types [0]), compare);
-
-+ process_i386_initializers ();
-+
- table = fopen ("i386-tbl.h", "w");
- if (table == NULL)
- fail ("can't create i386-tbl.h, errno = %s\n",
-@@ -2149,7 +2298,6 @@ main (int argc, char **argv)
-
- process_i386_opcodes (table);
- process_i386_registers (table);
-- process_i386_initializers ();
-
- fclose (table);
-
-diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
---- a/opcodes/i386-init.h
-+++ b/opcodes/i386-init.h
-@@ -1,5 +1,5 @@
- /* This file is automatically generated by i386-gen. Do not edit! */
--/* Copyright (C) 2007-2023 Free Software Foundation, Inc.
-+/* Copyright (C) 2007-2024 Free Software Foundation, Inc.
-
- This file is part of the GNU opcodes library.
-
-@@ -26,7 +26,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_286_FLAGS \
- { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -36,7 +36,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_386_FLAGS \
- { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -46,7 +46,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_486_FLAGS \
- { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -56,7 +56,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_586_FLAGS \
- { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -65,8 +65,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_686_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-@@ -75,8 +75,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CMOV_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -86,7 +86,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_FXSR_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -96,7 +96,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CLFLUSH_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -106,7 +106,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_NOP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -116,7 +116,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SYSCALL_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -126,7 +126,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_8087_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -136,7 +136,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_687_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-@@ -145,8 +145,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_FISTTP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-@@ -155,8 +155,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_MMX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-@@ -166,7 +166,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SSE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-@@ -176,7 +176,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SSE2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-@@ -186,7 +186,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SSE3_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -196,7 +196,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_PADLOCK_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-@@ -206,7 +206,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SVME_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-@@ -216,7 +216,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_VMX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -226,7 +226,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SMX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -236,7 +236,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SSSE3_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -246,7 +246,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SSE4A_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -256,7 +256,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_LZCNT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -266,7 +266,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_POPCNT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -276,7 +276,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_MONITOR_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -286,7 +286,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SSE4_1_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -296,7 +296,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SSE4_2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -306,7 +306,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -315,8 +315,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX512CD_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -325,8 +325,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512ER_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -335,8 +335,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512PF_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -345,8 +345,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512DQ_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -355,8 +355,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512BW_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -365,8 +365,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_IAMCU_FLAGS \
- { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -376,7 +376,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_XSAVE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -386,7 +386,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_XSAVEOPT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -396,7 +396,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AES_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-@@ -406,7 +406,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_PCLMULQDQ_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-@@ -416,7 +416,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_FMA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -425,8 +425,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_FMA4_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -435,8 +435,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_XOP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -445,8 +445,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_LWP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -456,7 +456,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_BMI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -466,7 +466,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_TBM_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -476,7 +476,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_MOVBE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -486,7 +486,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CX16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -496,7 +496,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_LAHF_SAHF_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -506,7 +506,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_EPT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -516,7 +516,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_RDTSCP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -526,7 +526,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_FSGSBASE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -536,7 +536,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_RDRND_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -546,7 +546,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_F16C_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -555,8 +555,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_BMI2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -566,7 +566,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_RTM_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -576,7 +576,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_INVPCID_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -586,7 +586,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_VMFUNC_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -596,7 +596,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_MPX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -606,7 +606,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_RDSEED_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -616,7 +616,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ADX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -626,7 +626,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_PRFCHW_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -636,7 +636,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SMAP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -646,7 +646,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SHA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-@@ -656,7 +656,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SHA512_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -665,8 +665,8 @@
- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SM3_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -675,8 +675,8 @@
- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SM4_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -685,8 +685,8 @@
- 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CLFLUSHOPT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -696,7 +696,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_XSAVES_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -706,7 +706,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_XSAVEC_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -716,7 +716,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_PREFETCHWT1_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -726,7 +726,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SE1_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -736,7 +736,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CLWB_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -746,7 +746,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX512IFMA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -755,8 +755,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512VBMI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -765,8 +765,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_4FMAPS_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -775,8 +775,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_4VNNIW_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -785,8 +785,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_VPOPCNTDQ_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -795,8 +795,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_VBMI2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -805,8 +805,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_VNNI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -815,8 +815,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_BITALG_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -825,8 +825,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_BF16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -835,8 +835,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_VP2INTERSECT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -845,8 +845,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_TDX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -856,7 +856,7 @@
- 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX_VNNI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -865,8 +865,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX512_FP16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -875,8 +875,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_PREFETCHI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -886,7 +886,7 @@
- 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX_IFMA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -895,8 +895,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX_VNNI_INT8_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -905,8 +905,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX_VNNI_INT16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -915,8 +915,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CMPCCXADD_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -926,7 +926,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_WRMSRNS_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -936,7 +936,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_MSRLIST_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -946,7 +946,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX_NE_CONVERT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -955,8 +955,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_RAO_INT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -966,7 +966,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_FRED_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -976,7 +976,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_LKGS_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -986,9 +986,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
--#define CPU_MWAITX_FLAGS \
-+#define CPU_USER_MSR_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -996,9 +996,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
--#define CPU_CLZERO_FLAGS \
-+#define CPU_MWAITX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1006,17 +1006,27 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-+
-+#define CPU_CLZERO_FLAGS \
-+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_OSPKE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_RDPID_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1024,9 +1034,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_PTWRITE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1034,9 +1044,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_IBT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1044,9 +1054,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SHSTK_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1054,9 +1064,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AMX_INT8_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1064,9 +1074,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AMX_BF16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1074,9 +1084,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AMX_FP16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1084,9 +1094,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AMX_COMPLEX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1094,9 +1104,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AMX_TILE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1104,9 +1114,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_GFNI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-@@ -1114,9 +1124,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_VAES_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -1124,9 +1134,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_VPCLMULQDQ_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -1134,9 +1144,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_WBNOINVD_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1144,9 +1154,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_PCONFIG_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1154,9 +1164,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_PBNDKB_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1164,9 +1174,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_WAITPKG_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1174,9 +1184,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_UINTR_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1184,9 +1194,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CLDEMOTE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1194,9 +1204,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_MOVDIRI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1204,9 +1214,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_MOVDIR64B_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1214,9 +1224,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ENQCMD_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1225,8 +1235,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SERIALIZE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1235,8 +1245,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_RDPRU_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1245,8 +1255,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_MCOMMIT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1255,8 +1265,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SEV_ES_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-@@ -1265,8 +1275,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_TSXLDTRK_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1275,8 +1285,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_KL_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-@@ -1285,8 +1295,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_WIDEKL_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-@@ -1295,8 +1305,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_HRESET_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1305,8 +1315,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_INVLPGB_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1315,8 +1325,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_TLBSYNC_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1325,8 +1335,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_SNP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-@@ -1335,8 +1345,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_RMPQUERY_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-@@ -1345,8 +1355,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_287_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1355,8 +1365,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_387_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1365,8 +1375,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_3DNOW_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-@@ -1375,8 +1385,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_3DNOWA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-@@ -1385,18 +1395,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-- 0, 0, 0, 0 } }
--
--#define CPU_64_FLAGS \
-- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -1405,8 +1405,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_HLE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1415,8 +1415,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 1, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX512F_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -1425,8 +1425,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 0, 0, 0, 0 } }
-
- #define CPU_AVX512VL_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -1435,8 +1435,18 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 1, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 1, 0, 0, 0 } }
-+
-+#define CPU_APX_F_FLAGS \
-+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 1, 0, 0 } }
-
- #define CPU_UNKNOWN_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
-@@ -1446,7 +1456,7 @@
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
-- 1, 1, 0, 0 } }
-+ 1, 1, 1, 1, 0, 0 } }
-
- #define CPU_GENERIC32_FLAGS \
- { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1456,7 +1466,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_GENERIC64_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
-@@ -1465,8 +1475,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_NONE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1476,7 +1486,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_PENTIUMPRO_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1485,8 +1495,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_P2_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, \
-@@ -1495,8 +1505,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_P3_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, \
-@@ -1505,8 +1515,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_P4_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
-@@ -1515,8 +1525,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_NOCONA_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
-@@ -1525,18 +1535,18 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CORE_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
- 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_CORE2_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
-@@ -1545,8 +1555,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_COREI7_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
-@@ -1555,8 +1565,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_K6_FLAGS \
- { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-@@ -1565,8 +1575,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_K6_2_FLAGS \
- { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-@@ -1575,8 +1585,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ATHLON_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, \
-@@ -1585,8 +1595,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_K8_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
-@@ -1595,8 +1605,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AMDFAM10_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
-@@ -1605,8 +1615,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_BDVER1_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
-@@ -1615,8 +1625,8 @@
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_BDVER2_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
-@@ -1625,8 +1635,8 @@
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_BDVER3_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
-@@ -1635,58 +1645,68 @@
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_BDVER4_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
- 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ZNVER1_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
- 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
- 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, \
- 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ZNVER2_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
- 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
- 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, \
- 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
-- 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-+ 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ZNVER3_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
- 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
- 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
- 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
-- 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 1, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-+ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 1, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ZNVER4_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
- 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, \
- 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
- 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, \
-- 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
-- 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, \
-- 1, 1, 0, 0 } }
-+ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-+ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, \
-+ 0, 1, 1, 0, 0, 0 } }
-+
-+#define CPU_ZNVER5_FLAGS \
-+ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
-+ 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, \
-+ 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
-+ 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, \
-+ 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-+ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, \
-+ 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, \
-+ 0, 1, 1, 0, 0, 0 } }
-
- #define CPU_BTVER1_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
-@@ -1695,8 +1715,8 @@
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_BTVER2_FLAGS \
- { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
-@@ -1705,8 +1725,8 @@
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ABM_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1716,7 +1736,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_AVX10_1_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -1725,8 +1745,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, \
- 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 1, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 1, 0, 0, 0 } }
-
- #define CPU_TSX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1735,8 +1755,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 1, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_FXSR_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -1744,9 +1764,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_8087_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
-@@ -1755,8 +1775,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_687_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-@@ -1766,7 +1786,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_FISTTP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-@@ -1776,7 +1796,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_MMX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-@@ -1785,8 +1805,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SSE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-@@ -1794,9 +1814,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SSE2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
-@@ -1804,9 +1824,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SSE3_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-@@ -1816,7 +1836,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SVME_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-@@ -1825,8 +1845,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_VMX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1836,7 +1856,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SSSE3_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1846,7 +1866,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SSE4A_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1856,7 +1876,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SSE4_1_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1866,7 +1886,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SSE4_2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1876,7 +1896,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1884,9 +1904,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
- 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 1, 1, 0, 0 } }
-+ 0, 1, 1, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512CD_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1896,7 +1916,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512ER_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1906,7 +1926,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512PF_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1916,7 +1936,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512DQ_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1926,7 +1946,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512BW_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1936,7 +1956,7 @@
- 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_IAMCU_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1946,17 +1966,17 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_XSAVE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, \
- 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, \
- 0, 0, 0, 0, 1, 1, 1, 0, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
-- 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, \
-- 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 1, 0, 0 } }
-+ 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-+ 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 1, 1, 0, 0 } }
-
- #define CPU_ANY_XSAVEOPT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1966,7 +1986,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AES_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1974,9 +1994,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_PCLMULQDQ_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1984,9 +2004,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_FMA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -1996,7 +2016,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_FMA4_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2006,7 +2026,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_XOP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2016,7 +2036,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_LWP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2026,7 +2046,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_EPT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2036,7 +2056,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_F16C_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2046,7 +2066,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_RTM_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2055,8 +2075,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_VMFUNC_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2066,7 +2086,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_MPX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2076,7 +2096,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SHA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2086,7 +2106,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SHA512_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2096,7 +2116,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SM3_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2106,7 +2126,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SM4_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2116,7 +2136,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_XSAVES_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2126,7 +2146,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_XSAVEC_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2136,7 +2156,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512IFMA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2146,7 +2166,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512VBMI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2156,7 +2176,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_4FMAPS_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2166,7 +2186,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_4VNNIW_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2176,7 +2196,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_VPOPCNTDQ_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2186,7 +2206,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_VBMI2_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2196,7 +2216,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_VNNI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2206,7 +2226,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_BITALG_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2216,7 +2236,7 @@
- 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_BF16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2226,7 +2246,7 @@
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_VP2INTERSECT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2236,7 +2256,7 @@
- 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX_VNNI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2246,7 +2266,7 @@
- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512_FP16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2256,7 +2276,7 @@
- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX_IFMA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2266,7 +2286,7 @@
- 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX_VNNI_INT8_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2276,7 +2296,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX_VNNI_INT16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2286,7 +2306,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AVX_NE_CONVERT_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2296,7 +2316,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_FRED_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2306,7 +2326,7 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_LKGS_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2316,17 +2336,17 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_OSPKE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AMX_INT8_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2334,9 +2354,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AMX_BF16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2344,9 +2364,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AMX_FP16_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2354,9 +2374,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AMX_COMPLEX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2364,9 +2384,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_AMX_TILE_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2374,9 +2394,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_GFNI_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2384,9 +2404,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_VAES_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2394,9 +2414,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_VPCLMULQDQ_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2404,9 +2424,9 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SEV_ES_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2415,8 +2435,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_TSXLDTRK_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2425,8 +2445,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_KL_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2435,8 +2455,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_WIDEKL_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2445,8 +2465,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_SNP_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2455,8 +2475,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_RMPQUERY_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2465,8 +2485,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_287_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-@@ -2475,8 +2495,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_387_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-@@ -2485,8 +2505,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_3DNOW_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2495,8 +2515,8 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-
- #define CPU_ANY_3DNOWA_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2505,8 +2525,18 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-- 0, 0, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 0 } }
-+
-+#define CPU_ANY_64_FLAGS \
-+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 1, 1, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 1, 0, 0 } }
-
- #define CPU_ANY_AVX_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2514,9 +2544,9 @@
- 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
- 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
-- 1, 1, 0, 0 } }
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-+ 0, 1, 1, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512F_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2526,7 +2556,7 @@
- 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 1, 1, 0, 0 } }
-+ 0, 1, 1, 0, 0, 0 } }
-
- #define CPU_ANY_AVX512VL_FLAGS \
- { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-@@ -2536,5 +2566,15 @@
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-- 0, 1, 0, 0 } }
-+ 0, 0, 1, 0, 0, 0 } }
-+
-+#define CPU_ANY_APX_F_FLAGS \
-+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-+ 0, 0, 0, 1, 0, 0 } }
-
-diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
---- a/opcodes/i386-opc.tbl
-+++ b/opcodes/i386-opc.tbl
-@@ -1,5 +1,5 @@
- // i386 opcode table.
--// Copyright (C) 2007-2023 Free Software Foundation, Inc.
-+// Copyright (C) 2007-2024 Free Software Foundation, Inc.
- //
- // This file is part of the GNU opcodes library.
- //
-@@ -85,6 +85,11 @@
- #define RegKludge OperandConstraint=REG_KLUDGE
- #define SwapSources OperandConstraint=SWAP_SOURCES
- #define Ugh OperandConstraint=UGH
-+#define ImplicitStackOp OperandConstraint=IMPLICIT_STACK_OP
-+
-+#define ATTSyntax Dialect=ATT_SYNTAX
-+#define ATTMnemonic Dialect=ATT_MNEMONIC
-+#define IntelSyntax Dialect=INTEL_SYNTAX
-
- #define IgnoreSize MnemonicSize=IGNORESIZE
- #define DefaultSize MnemonicSize=DEFAULTSIZE
-@@ -109,9 +114,12 @@
- #define SpaceXOP09 OpcodeSpace=SPACE_XOP09
- #define SpaceXOP0A OpcodeSpace=SPACE_XOP0A
-
-+#define EVexMap4 OpcodeSpace=SPACE_EVEXMAP4|EVex128
- #define EVexMap5 OpcodeSpace=SPACE_EVEXMAP5
- #define EVexMap6 OpcodeSpace=SPACE_EVEXMAP6
-
-+#define VexMap7 OpcodeSpace=SPACE_VEXMAP7
-+
- #define VexW0 VexW=VEXW0
- #define VexW1 VexW=VEXW1
- #define VexWIG VexW=VEXWIG
-@@ -133,12 +141,22 @@
-
- #define Disp8ShiftVL Disp8MemShift=DISP8_SHIFT_VL
-
--#define Vsz256 Vsz=VSZ256
--#define Vsz512 Vsz=VSZ512
-+#define DstVVVV VexVVVV=VexVVVV_DST
-+
-+// The template supports VEX format for cpuid and EVEX format for cpuid & APX_F.
-+// While therefore we really mean cpuid|(cpuid&APX_F) here, this can't be
-+// expressed in the generated templates. It's equivalent to just cpuid|APX_F
-+// anyway, but that is not what we want (as APX_F alone isn't a sufficient
-+// prereq for such insns). Instead the assembler will massage the CPU specifier
-+// to the equivalent of either cpuid&(cpuid) or cpuid&(APX_F) (or something
-+// substantially similar), depending on what encoding was requested.
-+#define APX_F(cpuid) cpuid&(cpuid|APX_F)
-
- // The EVEX purpose of StaticRounding appears only together with SAE. Re-use
- // the bit to mark commutative VEX encodings where swapping the source
- // operands may allow to switch from 3-byte to 2-byte VEX encoding.
-+// And re-use the bit to mark some NDD insns that swapping the source operands
-+// may allow to switch from EVEX encoding to REX2 encoding.
- #define C StaticRounding
-
- #define FP 387|287|8087
-@@ -156,6 +174,8 @@
- #define i287 287
- #define i387 387
- #define i687 687
-+// Note: Don't add this one to any templates already specifying a 64-bit-mode-
-+// only ISA extension: i386-gen takes care of adding such dependencies.
- #define x64 64
-
- ### MARKER ###
-@@ -164,11 +184,11 @@
- mov, 0xa0, No64, D|W|CheckOperandSize|No_sSuf|No_qSuf, { Disp16|Disp32|Unspecified|Byte|Word|Dword, Acc|Byte|Word|Dword }
- mov, 0xa0, x64, D|W|CheckOperandSize|No_sSuf, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword }
- movabs, 0xa0, x64, D|W|CheckOperandSize|No_sSuf, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword }
--mov, 0x88, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixRelease, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+mov, 0x88, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixRelease, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- // In the 64bit mode the short form mov immediate is redefined to have
- // 64bit value.
- mov, 0xb0, 0, W|No_sSuf|No_qSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32 }
--mov, 0xc6/0, 0, W|Modrm|No_sSuf|HLEPrefixRelease|Optimize, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+mov, 0xc6/0, 0, W|Modrm|No_sSuf|HLEPrefixRelease|Optimize, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- mov, 0xb8, x64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|Optimize, { Imm64, Reg64 }
- movabs, 0xb8, x64, No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Imm64, Reg64 }
- // The segment register moves accept WordReg so that a segment register
-@@ -181,14 +201,18 @@ mov, 0x8c, 0, D|Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { SReg, Word|U
- mov, 0x8e, 0, Modrm|IgnoreSize|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64, SReg }
- // Move to/from control debug registers. In the 16 or 32bit modes
- // they are 32bit. In the 64bit mode they are 64bit.
--mov, 0xf20, i386|No64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Control, Reg32 }
-+mov, 0xf20, i386&No64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Control, Reg32 }
- mov, 0xf20, x64, D|RegMem|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Control, Reg64 }
--mov, 0xf21, i386|No64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Debug, Reg32 }
-+mov, 0xf21, i386&No64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Debug, Reg32 }
- mov, 0xf21, x64, D|RegMem|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Debug, Reg64 }
--mov, 0xf24, i386|No64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Test, Reg32 }
-+mov, 0xf24, i386&No64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Test, Reg32 }
-
- // Move after swapping the bytes
- movbe, 0x0f38f0, Movbe, D|Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+movbe, 0x60, Movbe&APX_F, D|Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+// This needs to live here for easy EVEX -> REX2 conversion, which wants to
-+// restart with the next sequential template.
-+bswap, 0xfc8, i486, No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64 }
-
- // Move with sign extend.
- movsb, 0xfbe, i386, Modrm|No_bSuf|No_sSuf, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-@@ -201,37 +225,39 @@ movsxd, 0x63, x64, Amd64|Modrm|NoSuf, { Reg32|Unspecified|BaseIndex, Reg16 }
- movsxd, 0x63, x64, Intel64|Modrm|NoSuf, { Reg16|Unspecified|BaseIndex, Reg16 }
-
- // Move with zero extend.
--movzb, 0xfb6, i386, Modrm|No_bSuf|No_sSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
--movzw, 0xfb7, i386, Modrm|No_bSuf|No_wSuf|No_sSuf, { Reg16|Word|Unspecified|BaseIndex, Reg32|Reg64 }
-+movzb, 0xfb6, i386, Modrm|No_bSuf|No_sSuf, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+movzw, 0xfb7, i386, Modrm|No_bSuf|No_wSuf|No_sSuf, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
- // The 64-bit variant is not particularly useful since the zero extend
- // 32->64 is implicit, but we can encode them.
- movzx, 0xfb6, i386, W|Modrm|No_lSuf|No_sSuf|No_qSuf, { Reg8|Reg16|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-
- // Push instructions.
--push, 0x50, No64, No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 }
--push, 0xff/6, No64, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex }
--push, 0x6a, i186|No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm8S }
--push, 0x68, i186|No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16|Imm32 }
--push, 0x6, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { SReg }
-+push, 0x50, No64, ImplicitStackOp|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 }
-+push, 0xff/6, No64, Modrm|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32|Unspecified|BaseIndex }
-+push, 0x6a, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm8S }
-+push, 0x68, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16|Imm32 }
-+push, 0x6, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { SReg }
- // In 64bit mode, the operand size is implicitly 64bit.
--push, 0x50, x64, No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64 }
--push, 0xff/6, x64, Modrm|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex }
--push, 0x6a, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm8S }
--push, 0x68, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm16|Imm32S }
--push, 0xfa0, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { SReg }
-+push, 0x50, x64, ImplicitStackOp|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64 }
-+pushp, 0x50, APX_F, ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf|Rex2, { Reg64 }
-+push, 0xff/6, x64, Modrm|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64|Unspecified|BaseIndex }
-+push, 0x6a, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm8S }
-+push, 0x68, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm16|Imm32S }
-+push, 0xfa0, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { SReg }
-
--pusha, 0x60, i186|No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
-+pusha, 0x60, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
-
- // Pop instructions.
--pop, 0x58, No64, No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 }
--pop, 0x8f/0, No64, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex }
--pop, 0x7, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { SReg }
-+pop, 0x58, No64, ImplicitStackOp|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 }
-+pop, 0x8f/0, No64, Modrm|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32|Unspecified|BaseIndex }
-+pop, 0x7, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { SReg }
- // In 64bit mode, the operand size is implicitly 64bit.
--pop, 0x58, x64, No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64 }
--pop, 0x8f/0, x64, Modrm|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex }
--pop, 0xfa1, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { SReg }
-+pop, 0x58, x64, ImplicitStackOp|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64 }
-+popp, 0x58, APX_F, ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf|Rex2, { Reg64 }
-+pop, 0x8f/0, x64, Modrm|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Reg16|Reg64|Unspecified|BaseIndex }
-+pop, 0xfa1, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { SReg }
-
--popa, 0x61, i186|No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
-+popa, 0x61, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
-
- // Exchange instructions.
- // xchg commutes: we allow both operand orders.
-@@ -273,70 +299,67 @@ lahf, 0x9f, No64, NoSuf, {}
- lahf, 0x9f, LAHF_SAHF, NoSuf, {}
- sahf, 0x9e, No64, NoSuf, {}
- sahf, 0x9e, LAHF_SAHF, NoSuf, {}
--pushf, 0x9c, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
--pushf, 0x9c, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {}
--popf, 0x9d, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
--popf, 0x9d, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {}
-+pushf, 0x9c, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
-+pushf, 0x9c, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {}
-+popf, 0x9d, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
-+popf, 0x9d, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {}
- stc, 0xf9, 0, NoSuf, {}
- std, 0xfd, 0, NoSuf, {}
- sti, 0xfb, 0, NoSuf, {}
-
- // Arithmetic.
--add, 0x0, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--add, 0x83/0, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--add, 0x4, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--add, 0x80/0, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--inc, 0x40, No64, No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 }
--inc, 0xfe/0, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-
--sub, 0x28, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock|Optimize, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--sub, 0x83/5, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--sub, 0x2c, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--sub, 0x80/5, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+<alu2:opc:c:optz:optt:opti:nf, +
-+ add:0:C::::NF, +
-+ or:1:C::Optimize::NF, +
-+ adc:2:C::::, +
-+ sbb:3:::::, +
-+ and:4:C::Optimize:Optimize:NF, +
-+ sub:5::Optimize:::NF, +
-+ xor:6:C:Optimize:::NF>
-+
-+<alu2>, <alu2:opc> << 3, APX_F, D|<alu2:c>|W|CheckOperandSize|Modrm|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>|<alu2:optz>, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
-+<alu2>, <alu2:opc> << 3, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock|<alu2:optz>|<alu2:optt>, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<alu2>, <alu2:opc> << 3, APX_F, D|W|CheckOperandSize|Modrm|No_sSuf|EVexMap4|<alu2:nf>, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<alu2>, 0x83/<alu2:opc>, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+<alu2>, 0x83/<alu2:opc>, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock|<alu2:opti>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<alu2>, 0x83/<alu2:opc>, 0, Modrm|No_bSuf|No_sSuf|EVexMap4|<alu2:nf>, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<alu2>, 0x04 | (<alu2:opc> << 3), 0, W|No_sSuf|<alu2:opti>, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
-+<alu2>, 0x80/<alu2:opc>, APX_F, W|Modrm|CheckOperandSize|No_sSuf|DstVVVV|EVexMap4|<alu2:nf>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
-+<alu2>, 0x80/<alu2:opc>, 0, W|Modrm|No_sSuf|HLEPrefixLock|<alu2:opti>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<alu2>, 0x80/<alu2:opc>, APX_F, W|Modrm|EVexMap4|No_sSuf|<alu2:nf>, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+
-+<alu2>
-
--dec, 0x48, No64, No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 }
--dec, 0xfe/1, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--sbb, 0x18, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--sbb, 0x83/3, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--sbb, 0x1c, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--sbb, 0x80/3, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+// clr with 1 operand is really xor with 2 operands.
-+clr, 0x30, 0, W|Modrm|No_sSuf|RegKludge|Optimize, { Reg8|Reg16|Reg32|Reg64 }
-+clr, 0x30, APX_F, W|Modrm|No_sSuf|RegKludge|EVexMap4|NF, { Reg8|Reg16|Reg32|Reg64 }
-
--cmp, 0x38, 0, D|W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--cmp, 0x83/7, 0, Modrm|No_bSuf|No_sSuf, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
-+cmp, 0x38, 0, D|W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+cmp, 0x83/7, 0, Modrm|No_bSuf|No_sSuf, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- cmp, 0x3c, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--cmp, 0x80/7, 0, W|Modrm|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+cmp, 0x80/7, 0, W|Modrm|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-
- test, 0x84, 0, D|W|C|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- test, 0xa8, 0, W|No_sSuf|Optimize, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--test, 0xf6/0, 0, W|Modrm|No_sSuf|Optimize, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+test, 0xf6/0, 0, W|Modrm|No_sSuf|Optimize, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-
--and, 0x20, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock|Optimize, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--and, 0x83/4, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock|Optimize, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--and, 0x24, 0, W|No_sSuf|Optimize, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--and, 0x80/4, 0, W|Modrm|No_sSuf|HLEPrefixLock|Optimize, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+<incdec:opc, inc:0, dec:1>
-
--or, 0x8, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock|Optimize, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--or, 0x83/1, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--or, 0xc, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--or, 0x80/1, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+<incdec>, 0x40 | (<incdec:opc> << 3), No64, No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32 }
-+<incdec>, 0xfe/<incdec:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|NF, {Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64}
-+<incdec>, 0xfe/<incdec:opc>, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<incdec>, 0xfe/<incdec:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|NF, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-
--xor, 0x30, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock|Optimize, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--xor, 0x83/6, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--xor, 0x34, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--xor, 0x80/6, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+<incdec>
-
--// clr with 1 operand is really xor with 2 operands.
--clr, 0x30, 0, W|Modrm|No_sSuf|RegKludge|Optimize, { Reg8|Reg16|Reg32|Reg64 }
-+<alu1:opc:nf, not:2:, neg:3:NF>
-
--adc, 0x10, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--adc, 0x83/2, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--adc, 0x14, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword }
--adc, 0x80/2, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+<alu1>, 0xf6/<alu1:opc>, APX_F, W|Modrm|CheckOperandSize|No_sSuf|DstVVVV|EVexMap4|<alu1:nf>, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
-+<alu1>, 0xf6/<alu1:opc>, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<alu1>, 0xf6/<alu1:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<alu1:nf>, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-
--neg, 0xf6/3, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--not, 0xf6/2, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+<alu1>
-
- aaa, 0x37, No64, NoSuf, {}
- aas, 0x3f, No64, NoSuf, {}
-@@ -367,81 +390,82 @@ cqto, 0x99, x64, Size64|NoSuf, {}
- // expanding 64-bit multiplies, and *cannot* be selected to accomplish
- // 'imul %ebx, %eax' (opcode 0x0faf must be used in this case)
- // These multiplies can only be selected with single operand forms.
--mul, 0xf6/4, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--imul, 0xf6/5, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--imul, 0xfaf, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|Word|Dword|Qword|BaseIndex, Reg16|Reg32|Reg64 }
--imul, 0x6b, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
--imul, 0x69, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+<mul:opc, mul:4, imul:5>
-+
-+<mul>, 0xf6/<mul:opc>, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<mul>, 0xf6/<mul:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|NF, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+imul, 0xaf, APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64 }
-+imul, 0xfaf, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+imul, 0xaf, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+imul, 0x6b, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+imul, 0x6b, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Imm8S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+imul, 0x69, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+imul, 0x69, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
- // imul with 2 operands mimics imul with 3 by putting the register in
- // both i.rm.reg & i.rm.regmem fields. RegKludge enables this
- // transformation.
- imul, 0x6b, i186, Modrm|No_bSuf|No_sSuf|RegKludge, { Imm8S, Reg16|Reg32|Reg64 }
-+imul, 0x6b, APX_F, Modrm|No_bSuf|No_sSuf|RegKludge|EVexMap4|NF, { Imm8S, Reg16|Reg32|Reg64 }
- imul, 0x69, i186, Modrm|No_bSuf|No_sSuf|RegKludge, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64 }
--
--div, 0xf6/6, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--div, 0xf6/6, 0, W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword }
--idiv, 0xf6/7, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--idiv, 0xf6/7, 0, W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword }
--
--rol, 0xd0/0, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rol, 0xc0/0, i186, W|Modrm|No_sSuf, { Imm8|Imm8S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rol, 0xd2/0, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rol, 0xd0/0, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--ror, 0xd0/1, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--ror, 0xc0/1, i186, W|Modrm|No_sSuf, { Imm8|Imm8S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--ror, 0xd2/1, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--ror, 0xd0/1, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--rcl, 0xd0/2, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rcl, 0xc0/2, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rcl, 0xd2/2, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rcl, 0xd0/2, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--rcr, 0xd0/3, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rcr, 0xc0/3, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rcr, 0xd2/3, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--rcr, 0xd0/3, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--sal, 0xd0/4, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--sal, 0xc0/4, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--sal, 0xd2/4, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--sal, 0xd0/4, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--shl, 0xd0/4, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--shl, 0xc0/4, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--shl, 0xd2/4, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--shl, 0xd0/4, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--shr, 0xd0/5, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--shr, 0xc0/5, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--shr, 0xd2/5, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--shr, 0xd0/5, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--sar, 0xd0/7, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--sar, 0xc0/7, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--sar, 0xd2/7, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--sar, 0xd0/7, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--
--shld, 0xfa4, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm8, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--shld, 0xfa5, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { ShiftCount, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--shld, 0xfa5, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--
--shrd, 0xfac, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm8, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--shrd, 0xfad, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { ShiftCount, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
--shrd, 0xfad, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
-+imul, 0x69, APX_F, Modrm|No_bSuf|No_sSuf|RegKludge|EVexMap4|NF, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64 }
-+
-+<mul>
-+
-+<div:opc, div:6, idiv:7>
-+
-+<div>, 0xf6/<div:opc>, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<div>, 0xf6/<div:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|NF, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<div>, 0xf6/<div:opc>, 0, W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword }
-+<div>, 0xf6/<div:opc>, APX_F, W|CheckOperandSize|Modrm|No_sSuf|EVexMap4|NF, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword }
-+
-+<div>
-+
-+<sr:opc:imm8:nf, +
-+ rol:0:Imm8|Imm8S:NF, +
-+ ror:1:Imm8|Imm8S:NF, +
-+ rcl:2:Imm8:, +
-+ rcr:3:Imm8:, +
-+ sal:4:Imm8:NF, +
-+ shl:4:Imm8:NF, +
-+ shr:5:Imm8:NF, +
-+ sar:7:Imm8:NF>
-+
-+<sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
-+<sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<sr>, 0xd0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { Imm1, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
-+<sr>, 0xc0/<sr:opc>, i186, W|Modrm|No_sSuf, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<sr>, 0xc0/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { <sr:imm8>, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|CheckOperandSize|DstVVVV|EVexMap4|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg8|Reg16|Reg32|Reg64 }
-+<sr>, 0xd2/<sr:opc>, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<sr>, 0xd2/<sr:opc>, APX_F, W|Modrm|No_sSuf|EVexMap4|<sr:nf>, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+<sr>, 0xd0/<sr:opc>, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+
-+<sr>
-+
-+<shd:opc, l:0, r:8>
-+
-+sh<shd>d, 0x24 | <shd:opc>, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|NF, { Imm8, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+sh<shd>d, 0x0fa4 | <shd:opc>, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Imm8, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+sh<shd>d, 0x24 | <shd:opc>, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Imm8, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+sh<shd>d, 0xa5 | <shd:opc>, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|NF, { ShiftCount, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+sh<shd>d, 0x0fa5 | <shd:opc>, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { ShiftCount, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+sh<shd>d, 0xa5 | <shd:opc>, APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { ShiftCount, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+sh<shd>d, 0x0fa5 | <shd:opc>, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+
-+<shd>
-
- // Control transfer instructions.
--call, 0xe8, No64, JumpDword|DefaultSize|No_bSuf|No_sSuf|No_qSuf|BNDPrefixOk, { Disp16|Disp32 }
--call, 0xe8, x64, Amd64|JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk, { Disp16|Disp32 }
--call, 0xe8, x64, Intel64|JumpDword|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk, { Disp32 }
--call, 0xff/2, No64, Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_sSuf|No_qSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Unspecified|BaseIndex }
--call, 0xff/2, x64, Amd64|Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Unspecified|BaseIndex }
--call, 0xff/2, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Unspecified|BaseIndex }
-+call, 0xe8, No64, JumpDword|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|BNDPrefixOk, { Disp16|Disp32 }
-+call, 0xe8, x64, Amd64|JumpDword|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk, { Disp16|Disp32 }
-+call, 0xe8, x64, Intel64|JumpDword|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk, { Disp32 }
-+call, 0xff/2, No64, Modrm|JumpAbsolute|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg32|Unspecified|BaseIndex }
-+call, 0xff/2, x64, Amd64|Modrm|JumpAbsolute|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg16|Reg64|Unspecified|BaseIndex }
-+call, 0xff/2, x64, Intel64|Modrm|JumpAbsolute|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|BNDPrefixOk|NoTrackPrefixOk, { Reg64|Unspecified|BaseIndex }
- // Intel Syntax remaining call instances.
--call, 0x9a, No64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32 }
--call, 0xff/3, 0, Amd64|Modrm|JumpAbsolute|DefaultSize|NoSuf, { Dword|Fword|BaseIndex }
--call, 0xff/3, x64, Intel64|Modrm|JumpAbsolute|NoSuf, { Dword|Fword|Tbyte|BaseIndex }
-+call, 0x9a, No64, JumpInterSegment|ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32 }
-+call, 0xff/3, 0, Amd64|Modrm|JumpAbsolute|ImplicitStackOp|DefaultSize|NoSuf, { Dword|Fword|BaseIndex }
-+call, 0xff/3, x64, Intel64|Modrm|JumpAbsolute|ImplicitStackOp|NoSuf, { Dword|Fword|Tbyte|BaseIndex }
- lcall, 0x9a, No64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32 }
- lcall, 0xff/3, 0, Amd64|Modrm|JumpAbsolute|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Unspecified|BaseIndex }
- lcall, 0xff/3, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_sSuf, { Unspecified|BaseIndex }
-@@ -459,22 +483,22 @@ ljmp, 0xea, No64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32
- ljmp, 0xff/5, 0, Amd64|Modrm|JumpAbsolute|No_bSuf|No_sSuf|No_qSuf, { Unspecified|BaseIndex }
- ljmp, 0xff/5, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_sSuf, { Unspecified|BaseIndex }
-
--ret, 0xc3, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, {}
--ret, 0xc2, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, { Imm16 }
--ret, 0xc3, x64, Amd64|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {}
--ret, 0xc2, x64, Amd64|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, { Imm16 }
--ret, 0xc3, x64, Intel64|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {}
--ret, 0xc2, x64, Intel64|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, { Imm16 }
-+ret, 0xc3, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, {}
-+ret, 0xc2, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, { Imm16 }
-+ret, 0xc3, x64, Amd64|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {}
-+ret, 0xc2, x64, Amd64|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, { Imm16 }
-+ret, 0xc3, x64, Intel64|ImplicitStackOp|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {}
-+ret, 0xc2, x64, Intel64|ImplicitStackOp|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, { Imm16 }
- lret, 0xcb, 0, DefaultSize|No_bSuf|No_sSuf, {}
- lret, 0xca, 0, DefaultSize|No_bSuf|No_sSuf, { Imm16 }
- // Intel Syntax.
- retf, 0xcb, 0, DefaultSize|No_bSuf|No_sSuf, {}
- retf, 0xca, 0, DefaultSize|No_bSuf|No_sSuf, { Imm16 }
-
--enter, 0xc8, i186|No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm8 }
--enter, 0xc8, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm16, Imm8 }
--leave, 0xc9, i186|No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
--leave, 0xc9, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {}
-+enter, 0xc8, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm8 }
-+enter, 0xc8, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, { Imm16, Imm8 }
-+leave, 0xc9, i186&No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
-+leave, 0xc9, x64, ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {}
-
- <cc:opc, o:0, no:1, b:2, c:2, nae:2, nb:3, nc:3, ae:3, e:4, z:4, ne:5, nz:5, be:6, na:6, nbe:7, a:7, +
- s:8, ns:9, p:a, pe:a, np:b, po:b, l:c, nge:c, nl:d, ge:d, le:e, ng:e, nle:f, g:f>
-@@ -503,7 +527,7 @@ loopne, 0xe0, No64, JumpByte|No_bSuf|No_sSuf|No_qSuf, { Disp8 }
- loopne, 0xe0, x64, JumpByte|No_bSuf|No_wSuf|No_sSuf|NoRex64, { Disp8 }
-
- // Set byte on flag instructions.
--set<cc>, 0xf9<cc:opc>/0, i386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Reg8|Byte|Unspecified|BaseIndex }
-+set<cc>, 0xf9<cc:opc>/0, i386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Reg8|Unspecified|BaseIndex }
-
- // String manipulation.
- cmps, 0xa6, 0, W|No_sSuf|RepPrefixOk, {}
-@@ -540,58 +564,58 @@ xlat, 0xd7, 0, No_wSuf|No_lSuf|No_sSuf|No_qSuf, {}
- xlat, 0xd7, 0, No_wSuf|No_lSuf|No_sSuf|No_qSuf|IsString, { Byte|Unspecified|BaseIndex }
-
- // Bit manipulation.
--bsf, 0xfbc, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|RepPrefixOk, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
--bsr, 0xfbd, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|RepPrefixOk, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
--bt, 0xfa3, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
-+bsf, 0xfbc, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|RepPrefixOk, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+bsr, 0xfbd, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|RepPrefixOk, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+bt, 0xfa3, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- bt, 0xfba/4, i386, Modrm|No_bSuf|No_sSuf|Optimize, { Imm8, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
--btc, 0xfbb, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
-+btc, 0xfbb, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- btc, 0xfba/7, i386, Modrm|No_bSuf|No_sSuf|Optimize|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
--btr, 0xfb3, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
-+btr, 0xfb3, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- btr, 0xfba/6, i386, Modrm|No_bSuf|No_sSuf|Optimize|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
--bts, 0xfab, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
-+bts, 0xfab, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- bts, 0xfba/5, i386, Modrm|No_bSuf|No_sSuf|Optimize|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-
- // Interrupts & op. sys insns.
- // See gas/config/tc-i386.c for conversion of 'int $3' into the special
- // int 3 insn.
--int, 0xcd, 0, NoSuf, { Imm8 }
--int1, 0xf1, 0, NoSuf, {}
--int3, 0xcc, 0, NoSuf, {}
--into, 0xce, No64, NoSuf, {}
--iret, 0xcf, 0, DefaultSize|No_bSuf|No_sSuf, {}
-+int, 0xcd, 0, ImplicitStackOp|NoSuf, { Imm8 }
-+int1, 0xf1, 0, ImplicitStackOp|NoSuf, {}
-+int3, 0xcc, 0, ImplicitStackOp|NoSuf, {}
-+into, 0xce, No64, ImplicitStackOp|NoSuf, {}
-+iret, 0xcf, 0, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf, {}
- // i386sl, i486sl, later 486, and Pentium.
- rsm, 0xfaa, i386, NoSuf, {}
-
--bound, 0x62, i186|No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32, Dword|Qword|Unspecified|BaseIndex }
-+bound, 0x62, i186&No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32, Dword|Qword|Unspecified|BaseIndex }
-
- hlt, 0xf4, 0, NoSuf, {}
-
--nop, 0xf1f/0, Nop, Modrm|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex }
-+nop, 0xf1f/0, Nop, Modrm|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-
- // nop is actually "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
- // 32bit mode and "xchg %rax,%rax" in 64bit mode.
- nop, 0x90, 0, NoSuf|RepPrefixOk, {}
-
- // Protection control.
--arpl, 0x63, i286|No64, RegMem|CheckOperandSize|IgnoreSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32, Reg16|Reg32 }
--arpl, 0x63, i286|No64, Modrm|IgnoreSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32, Word|Unspecified|BaseIndex }
-+arpl, 0x63, i286&No64, RegMem|CheckOperandSize|IgnoreSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32, Reg16|Reg32 }
-+arpl, 0x63, i286&No64, Modrm|IgnoreSize|No_bSuf|No_sSuf|No_qSuf, { Reg16|Reg32, Word|Unspecified|BaseIndex }
- lar, 0xf02, i286, Modrm|CheckOperandSize|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64 }
- lar, 0xf02, i286, Modrm|No_bSuf|No_sSuf|NoRex64, { Reg16|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
--lgdt, 0xf01/2, i286|No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex }
-+lgdt, 0xf01/2, i286&No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex }
- lgdt, 0xf01/2, x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Tbyte|Unspecified|BaseIndex }
--lidt, 0xf01/3, i286|No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex }
-+lidt, 0xf01/3, i286&No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex }
- lidt, 0xf01/3, x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Tbyte|Unspecified|BaseIndex }
- lldt, 0xf00/2, i286, Modrm|IgnoreSize|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64 }
- lldt, 0xf00/2, i286, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { Word|Unspecified|BaseIndex }
--lmsw, 0xf01/6, i286, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { Reg16|Word|Unspecified|BaseIndex }
-+lmsw, 0xf01/6, i286, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { Reg16|Unspecified|BaseIndex }
- lsl, 0xf03, i286, Modrm|CheckOperandSize|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64 }
- lsl, 0xf03, i286, Modrm|No_bSuf|No_sSuf|NoRex64, { Reg16|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
- ltr, 0xf00/3, i286, Modrm|IgnoreSize|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64 }
- ltr, 0xf00/3, i286, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { Word|Unspecified|BaseIndex }
-
--sgdt, 0xf01/0, i286|No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex }
-+sgdt, 0xf01/0, i286&No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex }
- sgdt, 0xf01/0, x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Tbyte|Unspecified|BaseIndex }
--sidt, 0xf01/1, i286|No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex }
-+sidt, 0xf01/1, i286&No64, Modrm|No_bSuf|No_sSuf|No_qSuf, { Fword|Unspecified|BaseIndex }
- sidt, 0xf01/1, x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Tbyte|Unspecified|BaseIndex }
- sldt, 0xf00/0, i286, Modrm|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64 }
- sldt, 0xf00/0, i286, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { Word|Unspecified|BaseIndex }
-@@ -700,14 +724,13 @@ faddp, 0xdec1, FP, NoSuf, {}
- fsub, 0xd8/4, FP, Modrm|NoSuf, { FloatReg }
- fsub, 0xd8/4, FP, D|Modrm|NoSuf, { FloatReg, FloatAcc }
- // alias for fsubp
--fsub, 0xdee1, FP, NoSuf|Ugh|ATTMnemonic|ATTSyntax, {}
--fsub, 0xdee9, FP, NoSuf|Ugh|ATTMnemonic, {}
-+fsub, 0xdee1, FP, NoSuf|Ugh|ATTMnemonic, {}
- fsub, 0xd8/4, FP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf, { Dword|Qword|Unspecified|BaseIndex }
- fisub, 0xde/4, FP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf, { Word|Dword|Unspecified|BaseIndex }
-
--fsubp, 0xde/4, FP, Modrm|NoSuf|ATTMnemonic|ATTSyntax, { FloatAcc, FloatReg }
--fsubp, 0xde/4, FP, Modrm|NoSuf|ATTMnemonic|ATTSyntax, { FloatReg }
--fsubp, 0xdee1, FP, NoSuf|ATTMnemonic|ATTSyntax, {}
-+fsubp, 0xde/4, FP, Modrm|NoSuf|ATTMnemonic, { FloatAcc, FloatReg }
-+fsubp, 0xde/4, FP, Modrm|NoSuf|ATTMnemonic, { FloatReg }
-+fsubp, 0xdee1, FP, NoSuf|ATTMnemonic, {}
- fsubp, 0xde/5, FP, Modrm|NoSuf, { FloatAcc, FloatReg }
- fsubp, 0xde/5, FP, Modrm|NoSuf, { FloatReg }
- fsubp, 0xdee9, FP, NoSuf, {}
-@@ -716,14 +739,13 @@ fsubp, 0xdee9, FP, NoSuf, {}
- fsubr, 0xd8/5, FP, Modrm|NoSuf, { FloatReg }
- fsubr, 0xd8/5, FP, D|Modrm|NoSuf, { FloatReg, FloatAcc }
- // alias for fsubrp
--fsubr, 0xdee9, FP, NoSuf|Ugh|ATTMnemonic|ATTSyntax, {}
--fsubr, 0xdee1, FP, NoSuf|Ugh|ATTMnemonic, {}
-+fsubr, 0xdee9, FP, NoSuf|Ugh|ATTMnemonic, {}
- fsubr, 0xd8/5, FP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf, { Dword|Qword|Unspecified|BaseIndex }
- fisubr, 0xde/5, FP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf, { Word|Dword|Unspecified|BaseIndex }
-
--fsubrp, 0xde/5, FP, Modrm|NoSuf|ATTMnemonic|ATTSyntax, { FloatAcc, FloatReg }
--fsubrp, 0xde/5, FP, Modrm|NoSuf|ATTMnemonic|ATTSyntax, { FloatReg }
--fsubrp, 0xdee9, FP, NoSuf|ATTMnemonic|ATTSyntax, {}
-+fsubrp, 0xde/5, FP, Modrm|NoSuf|ATTMnemonic, { FloatAcc, FloatReg }
-+fsubrp, 0xde/5, FP, Modrm|NoSuf|ATTMnemonic, { FloatReg }
-+fsubrp, 0xdee9, FP, NoSuf|ATTMnemonic, {}
- fsubrp, 0xde/4, FP, Modrm|NoSuf, { FloatAcc, FloatReg }
- fsubrp, 0xde/4, FP, Modrm|NoSuf, { FloatReg }
- fsubrp, 0xdee1, FP, NoSuf, {}
-@@ -745,14 +767,13 @@ fmulp, 0xdec9, FP, NoSuf, {}
- fdiv, 0xd8/6, FP, Modrm|NoSuf, { FloatReg }
- fdiv, 0xd8/6, FP, D|Modrm|NoSuf, { FloatReg, FloatAcc }
- // alias for fdivp
--fdiv, 0xdef1, FP, NoSuf|Ugh|ATTMnemonic|ATTSyntax, {}
--fdiv, 0xdef9, FP, NoSuf|Ugh|ATTMnemonic, {}
-+fdiv, 0xdef1, FP, NoSuf|Ugh|ATTMnemonic, {}
- fdiv, 0xd8/6, FP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf, { Dword|Qword|Unspecified|BaseIndex }
- fidiv, 0xde/6, FP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf, { Word|Dword|Unspecified|BaseIndex }
-
--fdivp, 0xde/6, FP, Modrm|NoSuf|ATTMnemonic|ATTSyntax, { FloatAcc, FloatReg }
--fdivp, 0xde/6, FP, Modrm|NoSuf|ATTMnemonic|ATTSyntax, { FloatReg }
--fdivp, 0xdef1, FP, NoSuf|ATTMnemonic|ATTSyntax, {}
-+fdivp, 0xde/6, FP, Modrm|NoSuf|ATTMnemonic, { FloatAcc, FloatReg }
-+fdivp, 0xde/6, FP, Modrm|NoSuf|ATTMnemonic, { FloatReg }
-+fdivp, 0xdef1, FP, NoSuf|ATTMnemonic, {}
- fdivp, 0xde/7, FP, Modrm|NoSuf, { FloatAcc, FloatReg }
- fdivp, 0xde/7, FP, Modrm|NoSuf, { FloatReg }
- fdivp, 0xdef9, FP, NoSuf, {}
-@@ -761,14 +782,13 @@ fdivp, 0xdef9, FP, NoSuf, {}
- fdivr, 0xd8/7, FP, Modrm|NoSuf, { FloatReg }
- fdivr, 0xd8/7, FP, D|Modrm|NoSuf, { FloatReg, FloatAcc }
- // alias for fdivrp
--fdivr, 0xdef9, FP, NoSuf|Ugh|ATTMnemonic|ATTSyntax, {}
--fdivr, 0xdef1, FP, NoSuf|Ugh|ATTMnemonic, {}
-+fdivr, 0xdef9, FP, NoSuf|Ugh|ATTMnemonic, {}
- fdivr, 0xd8/7, FP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf, { Dword|Qword|Unspecified|BaseIndex }
- fidivr, 0xde/7, FP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf, { Word|Dword|Unspecified|BaseIndex }
-
--fdivrp, 0xde/7, FP, Modrm|NoSuf|ATTMnemonic|ATTSyntax, { FloatAcc, FloatReg }
--fdivrp, 0xde/7, FP, Modrm|NoSuf|ATTMnemonic|ATTSyntax, { FloatReg }
--fdivrp, 0xdef9, FP, NoSuf|ATTMnemonic|ATTSyntax, {}
-+fdivrp, 0xde/7, FP, Modrm|NoSuf|ATTMnemonic, { FloatAcc, FloatReg }
-+fdivrp, 0xde/7, FP, Modrm|NoSuf|ATTMnemonic, { FloatReg }
-+fdivrp, 0xdef9, FP, NoSuf|ATTMnemonic, {}
- fdivrp, 0xde/6, FP, Modrm|NoSuf, { FloatAcc, FloatReg }
- fdivrp, 0xde/6, FP, Modrm|NoSuf, { FloatReg }
- fdivrp, 0xdef1, FP, NoSuf, {}
-@@ -831,14 +851,14 @@ fwait, 0x9b, FP, NoSuf, {}
-
- // Opcode prefixes; we allow them as separate insns too.
-
--addr16, 0x67, i386|No64, Size16|IgnoreSize|NoSuf|IsPrefix, {}
-+addr16, 0x67, i386&No64, Size16|IgnoreSize|NoSuf|IsPrefix, {}
- addr32, 0x67, i386, Size32|IgnoreSize|NoSuf|IsPrefix, {}
--aword, 0x67, i386|No64, Size16|IgnoreSize|NoSuf|IsPrefix, {}
-+aword, 0x67, i386&No64, Size16|IgnoreSize|NoSuf|IsPrefix, {}
- adword, 0x67, i386, Size32|IgnoreSize|NoSuf|IsPrefix, {}
- data16, 0x66, i386, Size16|IgnoreSize|NoSuf|IsPrefix, {}
--data32, 0x66, i386|No64, Size32|IgnoreSize|NoSuf|IsPrefix, {}
-+data32, 0x66, i386&No64, Size32|IgnoreSize|NoSuf|IsPrefix, {}
- word, 0x66, i386, Size16|IgnoreSize|NoSuf|IsPrefix, {}
--dword, 0x66, i386|No64, Size32|IgnoreSize|NoSuf|IsPrefix, {}
-+dword, 0x66, i386&No64, Size32|IgnoreSize|NoSuf|IsPrefix, {}
- lock, 0xf0, 0, NoSuf|IsPrefix, {}
- wait, 0x9b, 0, NoSuf|IsPrefix, {}
- cs, 0x2e, 0, NoSuf|IsPrefix, {}
-@@ -888,18 +908,18 @@ rex.wrxb, 0x4f, x64, NoSuf|IsPrefix, {}
-
- // Pseudo prefixes (base_opcode == PSEUDO_PREFIX)
-
--<pseudopfx:ident:cpu, disp8:Disp8:0, disp16:Disp16:0, disp32:Disp32:0, +
-+<pseudopfx:ident:cpu, disp8:Disp8:0, disp16:Disp16:No64, disp32:Disp32:i386, +
- load:Load:0, store:Store:0, +
- vex:VEX:0, vex2:VEX:0, vex3:VEX3:0, evex:EVEX:0, +
-- rex:REX:x64, nooptimize:NoOptimize:0>
-+ rex:REX:x64, rex2:REX2:APX_F, nf:NF:APX_F, +
-+ nooptimize:NoOptimize:0>
-
- {<pseudopfx>}, PSEUDO_PREFIX/Prefix_<pseudopfx:ident>, <pseudopfx:cpu>, NoSuf|IsPrefix, {}
-
--// 486 extensions.
-+// 486 extensions (BSWAP moved elsewhere).
-
--bswap, 0xfc8, i486, No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64 }
--xadd, 0xfc0, i486, W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
--cmpxchg, 0xfb0, i486, W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
-+xadd, 0xfc0, i486, W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
-+cmpxchg, 0xfb0, i486, W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
- invd, 0xf08, i486, NoSuf, {}
- wbinvd, 0xf09, i486, NoSuf, {}
- invlpg, 0xf01/7, i486, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex }
-@@ -915,13 +935,13 @@ cmpxchg8b, 0xfc7/1, i586, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64|HLEPrefi
-
- // Pentium II/Pentium Pro extensions.
- sysenter, 0xf34, x64, Intel64Only|NoSuf, {}
--sysenter, 0xf34, i686|No64, NoSuf, {}
-+sysenter, 0xf34, i686&No64, NoSuf, {}
- sysexit, 0xf35, x64, Intel64Only|No_bSuf|No_wSuf|No_sSuf, {}
--sysexit, 0xf35, i686|No64, NoSuf, {}
-+sysexit, 0xf35, i686&No64, NoSuf, {}
- fxsave, 0xfae/0, FXSR, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Unspecified|BaseIndex }
--fxsave64, 0xfae/0, FXSR|x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
-+fxsave64, 0xfae/0, FXSR&x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
- fxrstor, 0xfae/1, FXSR, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Unspecified|BaseIndex }
--fxrstor64, 0xfae/1, FXSR|x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
-+fxrstor64, 0xfae/1, FXSR&x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
- rdpmc, 0xf33, i686, NoSuf, {}
- // official undefined instr.
- ud2, 0xf0b, i186, NoSuf, {}
-@@ -934,7 +954,8 @@ ud2b, 0xfb9, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|U
- // 3rd official undefined instr (older CPUs don't take a ModR/M byte)
- ud0, 0xfff, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-
--cmov<cc>, 0xf4<cc:opc>, CMOV, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+cmov<cc>, 0x4<cc:opc>, CMOV&APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64 }
-+cmov<cc>, 0xf4<cc:opc>, CMOV, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-
- fcmovb, 0xda/0, i687, Modrm|NoSuf, { FloatReg, FloatAcc }
- fcmovnae, 0xda/0, i687, Modrm|NoSuf, { FloatReg, FloatAcc }
-@@ -992,9 +1013,9 @@ pause, 0xf390, i186, NoSuf, {}
- b:0:VexW0:Byte:AVX512DQ:66:AVX512VBMI, +
- w:1:VexW1:Word:AVX512F::AVX512BW>
-
--<dq:opc:vexw:vexw64:elem:cpu64:gpr:kpfx:kvsz, +
-- d:0:VexW0::Dword::Reg32:66:Vsz256, +
-- q:1:VexW1:VexW1:Qword:x64:Reg64::Vsz512>
-+<dq:opc:vexw:vexw64:elem:cpu64:gpr:kpfx, +
-+ d:0:VexW0::Dword::Reg32:66, +
-+ q:1:VexW1:VexW1:Qword:x64:Reg64:>
-
- emms, 0xf77, MMX, NoSuf, {}
- // These really shouldn't allow for Reg64 (movq is the right mnemonic for
-@@ -1002,21 +1023,21 @@ emms, 0xf77, MMX, NoSuf, {}
- // spec). AMD's spec, having been in existence for much longer, failed to
- // recognize that and specified movd for 32- and 64-bit operations.
- movd, 0x666e, AVX, D|Modrm|Vex128|Space0F|VexW0|NoSuf|SSE2AVX, { Reg32|Unspecified|BaseIndex, RegXMM }
--movd, 0x666e, AVX|x64, D|Modrm|Vex=1|Space0F|VexW1|NoSuf|Size64|SSE2AVX, { Reg64|BaseIndex, RegXMM }
-+movd, 0x666e, AVX&x64, D|Modrm|Vex=1|Space0F|VexW1|NoSuf|Size64|SSE2AVX, { Reg64|BaseIndex, RegXMM }
- movd, 0x660f6e, SSE2, D|Modrm|IgnoreSize|NoSuf, { Reg32|Unspecified|BaseIndex, RegXMM }
--movd, 0x660f6e, SSE2|x64, D|Modrm|NoSuf|Size64, { Reg64|BaseIndex, RegXMM }
-+movd, 0x660f6e, SSE2&x64, D|Modrm|NoSuf|Size64, { Reg64|BaseIndex, RegXMM }
- // The MMX templates have to remain after at least the SSE2AVX ones.
- movd, 0xf6e, MMX, D|Modrm|IgnoreSize|NoSuf, { Reg32|Unspecified|BaseIndex, RegMMX }
--movd, 0xf6e, MMX|x64, D|Modrm|NoSuf|Size64, { Reg64|BaseIndex, RegMMX }
--movq, 0xf37e, AVX, Load|Modrm|Vex=1|Space0F|VexWIG|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
--movq, 0x66d6, AVX, Modrm|Vex=1|Space0F|VexWIG|NoSuf|SSE2AVX, { RegXMM, Qword|Unspecified|BaseIndex|RegXMM }
--movq, 0x666e, AVX|x64, D|Modrm|Vex=1|Space0F|VexW1|NoSuf|Size64|SSE2AVX, { Reg64|Unspecified|BaseIndex, RegXMM }
-+movd, 0xf6e, MMX&x64, D|Modrm|NoSuf|Size64, { Reg64|BaseIndex, RegMMX }
-+movq, 0xf37e, AVX, Load|Modrm|Vex128|Space0F|VexW0|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-+movq, 0x66d6, AVX, Modrm|Vex128|Space0F|VexW0|NoSuf|SSE2AVX, { RegXMM, Qword|Unspecified|BaseIndex|RegXMM }
-+movq, 0x666e, AVX&x64, D|Modrm|Vex=1|Space0F|VexW1|NoSuf|Size64|SSE2AVX, { Reg64|Unspecified|BaseIndex, RegXMM }
- movq, 0xf30f7e, SSE2, Load|Modrm|NoSuf, { Unspecified|Qword|BaseIndex|RegXMM, RegXMM }
- movq, 0x660fd6, SSE2, Modrm|NoSuf, { RegXMM, Unspecified|Qword|BaseIndex|RegXMM }
--movq, 0x660f6e, SSE2|x64, D|Modrm|NoSuf|Size64, { Reg64|Unspecified|BaseIndex, RegXMM }
-+movq, 0x660f6e, SSE2&x64, D|Modrm|NoSuf|Size64, { Reg64|Unspecified|BaseIndex, RegXMM }
- // The MMX templates have to remain after at least the SSE2AVX ones.
- movq, 0xf6f, MMX, D|Modrm|NoSuf, { Unspecified|Qword|BaseIndex|RegMMX, RegMMX }
--movq, 0xf6e, MMX|x64, D|Modrm|NoSuf|Size64, { Reg64|Unspecified|BaseIndex, RegMMX }
-+movq, 0xf6e, MMX&x64, D|Modrm|NoSuf|Size64, { Reg64|Unspecified|BaseIndex, RegMMX }
- packssdw<mmx>, 0x<mmx:pfx>0f6b, <mmx:cpu>, Modrm|<mmx:attr>|NoSuf, { <mmx:reg>|<mmx:mem>|Unspecified|BaseIndex, <mmx:reg> }
- packsswb<mmx>, 0x<mmx:pfx>0f63, <mmx:cpu>, Modrm|<mmx:attr>|NoSuf, { <mmx:reg>|<mmx:mem>|Unspecified|BaseIndex, <mmx:reg> }
- packuswb<mmx>, 0x<mmx:pfx>0f67, <mmx:cpu>, Modrm|<mmx:attr>|NoSuf, { <mmx:reg>|<mmx:mem>|Unspecified|BaseIndex, <mmx:reg> }
-@@ -1083,11 +1104,11 @@ cmpss<sse>, 0xf30fc2, <sse:cpu>, Modrm|<sse:scal>|<sse:vvvv>|NoSuf, { Imm8, Dwor
- comiss<sse>, 0x0f2f, <sse:cpu>, Modrm|<sse:scal>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
- cvtpi2ps, 0xf2a, SSE, Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegMMX, RegXMM }
- cvtps2pi, 0xf2d, SSE, Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegMMX }
--cvtsi2ss<sse>, 0xf30f2a, <sse:cpu>|No64, Modrm|<sse:scal>|<sse:vvvv>|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, RegXMM }
--cvtsi2ss, 0xf32a, AVX|x64, Modrm|Vex=3|Space0F|VexVVVV|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|ATTSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--cvtsi2ss, 0xf32a, AVX|x64, Modrm|Vex=3|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--cvtsi2ss, 0xf30f2a, SSE|x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|ATTSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--cvtsi2ss, 0xf30f2a, SSE|x64, Modrm|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+cvtsi2ss<sse>, 0xf30f2a, <sse:cpu>&No64, Modrm|<sse:scal>|<sse:vvvv>|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, RegXMM }
-+cvtsi2ss, 0xf32a, AVX&x64, Modrm|Vex=3|Space0F|VexVVVV|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|ATTSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
-+cvtsi2ss, 0xf32a, AVX&x64, Modrm|Vex=3|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
-+cvtsi2ss, 0xf30f2a, SSE&x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|ATTSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
-+cvtsi2ss, 0xf30f2a, SSE&x64, Modrm|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
- cvtss2si, 0xf32d, AVX, Modrm|VexLIG|Space0F|No_bSuf|No_wSuf|No_sSuf|SSE2AVX, { Dword|Unspecified|BaseIndex|RegXMM, Reg32|Reg64 }
- cvtss2si, 0xf30f2d, SSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Dword|Unspecified|BaseIndex|RegXMM, Reg32|Reg64 }
- cvttps2pi, 0xf2c, SSE, Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegMMX }
-@@ -1178,11 +1199,11 @@ comisd<sse2>, 0x660f2f, <sse2:cpu>, Modrm|<sse2:scal>|NoSuf, { Qword|Unspecified
- cvtpi2pd, 0x660f2a, SSE2, Modrm|NoSuf, { RegMMX, RegXMM }
- cvtpi2pd, 0xf3e6, AVX, Modrm|Vex|Space0F|VexW0|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM }
- cvtpi2pd, 0x660f2a, SSE2, Modrm|NoSuf, { Qword|Unspecified|BaseIndex, RegXMM }
--cvtsi2sd<sse2>, 0xf20f2a, <sse2:cpu>|No64, Modrm|IgnoreSize|<sse2:scal>|<sse2:vvvv>|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, RegXMM }
--cvtsi2sd, 0xf22a, AVX|x64, Modrm|Vex=3|Space0F|VexVVVV|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|ATTSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--cvtsi2sd, 0xf22a, AVX|x64, Modrm|Vex=3|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--cvtsi2sd, 0xf20f2a, SSE2|x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|ATTSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--cvtsi2sd, 0xf20f2a, SSE2|x64, Modrm|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+cvtsi2sd<sse2>, 0xf20f2a, <sse2:cpu>&No64, Modrm|IgnoreSize|<sse2:scal>|<sse2:vvvv>|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, RegXMM }
-+cvtsi2sd, 0xf22a, AVX&x64, Modrm|Vex=3|Space0F|VexVVVV|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|ATTSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
-+cvtsi2sd, 0xf22a, AVX&x64, Modrm|Vex=3|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
-+cvtsi2sd, 0xf20f2a, SSE2&x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|ATTSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
-+cvtsi2sd, 0xf20f2a, SSE2&x64, Modrm|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
- divpd<sse2>, 0x660f5e, <sse2:cpu>, Modrm|<sse2:attr>|<sse2:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
- divsd<sse2>, 0xf20f5e, <sse2:cpu>, Modrm|<sse2:scal>|<sse2:vvvv>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
- maxpd<sse2>, 0x660f5f, <sse2:cpu>, Modrm|<sse2:attr>|<sse2:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-@@ -1271,7 +1292,7 @@ fisttpll, 0xdd/1, FISTTP, Modrm|NoSuf|ATTSyntax, { Unspecified|BaseIndex }
-
- // CMPXCHG16B instruction.
-
--cmpxchg16b, 0xfc7/1, CX16|x64, Modrm|NoSuf|Size64|LockPrefixOk, { Oword|Unspecified|BaseIndex }
-+cmpxchg16b, 0xfc7/1, CX16, Modrm|NoSuf|Size64|LockPrefixOk, { Oword|Unspecified|BaseIndex }
-
- // MONITOR instructions.
-
-@@ -1281,7 +1302,7 @@ monitor, 0xf01c8, MONITOR, NoSuf, {}
- // all modes.
- monitor, 0xf01c8, MONITOR, AddrPrefixOpReg|NoSuf, { Acc|Word|Dword|Qword, RegC|Dword, RegD|Dword }
- // The 64-bit form exists only for compatibility with older gas.
--monitor, 0xf01c8, MONITOR|x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
-+monitor, 0xf01c8, MONITOR&x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
- mwait, 0xf01c9, MONITOR, NoSuf, {}
- // mwait is very special. AX and CX are always 32 bits.
- // The 64-bit form exists only for compatibility with older gas.
-@@ -1295,10 +1316,10 @@ vmlaunch, 0xf01c2, VMX, NoSuf, {}
- vmresume, 0xf01c3, VMX, NoSuf, {}
- vmptrld, 0xfc7/6, VMX, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
- vmptrst, 0xfc7/7, VMX, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
--vmread, 0xf78, VMX|No64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32, Reg32|Unspecified|BaseIndex }
--vmread, 0xf78, VMX|x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Reg64, Reg64|Qword|Unspecified|BaseIndex }
--vmwrite, 0xf79, VMX|No64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, Reg32 }
--vmwrite, 0xf79, VMX|x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Reg64|Qword|Unspecified|BaseIndex, Reg64 }
-+vmread, 0xf78, VMX&No64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32, Reg32|Unspecified|BaseIndex }
-+vmread, 0xf78, VMX&x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Reg64, Reg64|Unspecified|BaseIndex }
-+vmwrite, 0xf79, VMX&No64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, Reg32 }
-+vmwrite, 0xf79, VMX&x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoRex64, { Reg64|Unspecified|BaseIndex, Reg64 }
- vmxoff, 0xf01c4, VMX, NoSuf, {}
- vmxon, 0xf30fc7/6, VMX, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
-
-@@ -1312,15 +1333,18 @@ getsec, 0xf37, SMX, NoSuf, {}
-
- // EPT instructions.
-
--invept, 0x660f3880, EPT|No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 }
--invept, 0x660f3880, EPT|x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 }
--invvpid, 0x660f3881, EPT|No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 }
--invvpid, 0x660f3881, EPT|x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 }
-+invept, 0x660f3880, EPT&No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 }
-+invept, 0x660f3880, EPT&x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 }
-+invept, 0xf3f0, EPT&APX_F, Modrm|NoSuf|EVexMap4|VexWIG, { Oword|Unspecified|BaseIndex, Reg64 }
-+invvpid, 0x660f3881, EPT&No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 }
-+invvpid, 0x660f3881, EPT&x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 }
-+invvpid, 0xf3f1, EPT&APX_F, Modrm|NoSuf|EVexMap4|VexWIG, { Oword|Unspecified|BaseIndex, Reg64 }
-
- // INVPCID instruction
-
--invpcid, 0x660f3882, INVPCID|No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 }
--invpcid, 0x660f3882, INVPCID|x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 }
-+invpcid, 0x660f3882, INVPCID&No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 }
-+invpcid, 0x660f3882, INVPCID&x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 }
-+invpcid, 0xf3f2, INVPCID&APX_F, Modrm|NoSuf|EVexMap4|VexWIG, { Oword|Unspecified|BaseIndex, Reg64 }
-
- // SSSE3 instructions.
-
-@@ -1355,10 +1379,10 @@ blendvp<sd>, 0x664a | <sd:opc>, AVX, Modrm|Vex128|Space0F3A|VexVVVV|VexW0|NoSuf|
- blendvp<sd>, 0x660f3814 | <sd:opc>, SSE4_1, Modrm|NoSuf, { Acc|Xmmword, RegXMM|Unspecified|BaseIndex, RegXMM }
- blendvp<sd>, 0x660f3814 | <sd:opc>, SSE4_1, Modrm|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
- dpp<sd><sse41>, 0x660f3a40 | <sd:opc>, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
--extractps, 0x6617, AVX, Modrm|Vex|Space0F3A|VexWIG|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg32|Dword|Unspecified|BaseIndex }
--extractps, 0x6617, AVX|x64, RegMem|Vex|Space0F3A|VexWIG|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg64 }
--extractps, 0x660f3a17, SSE4_1, Modrm|IgnoreSize|NoSuf, { Imm8, RegXMM, Reg32|Dword|Unspecified|BaseIndex }
--extractps, 0x660f3a17, SSE4_1|x64, RegMem|NoSuf|NoRex64, { Imm8, RegXMM, Reg64 }
-+extractps, 0x6617, AVX, Modrm|Vex128|Space0F3A|VexW0|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
-+extractps, 0x6617, AVX&x64, RegMem|Vex128|Space0F3A|VexW1|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg64 }
-+extractps, 0x660f3a17, SSE4_1, Modrm|IgnoreSize|NoSuf, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
-+extractps, 0x660f3a17, SSE4_1&x64, RegMem|NoSuf|NoRex64, { Imm8, RegXMM, Reg64 }
- insertps<sse41>, 0x660f3a21, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
- movntdqa<sse41>, 0x660f382a, <sse41:cpu>, Modrm|<sse41:attr>|NoSuf, { Xmmword|Unspecified|BaseIndex, RegXMM }
- mpsadbw<sse41>, 0x660f3a42, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
-@@ -1372,14 +1396,14 @@ pcmpeqq<sse41>, 0x660f3829, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf|O
- pextr<bw><sse41>, 0x660f3a14 | <bw:opc>, <sse41:cpu>, RegMem|<sse41:attr>|NoSuf|IgnoreSize|NoRex64, { Imm8, RegXMM, Reg32|Reg64 }
- pextr<bw><sse41>, 0x660f3a14 | <bw:opc>, <sse41:cpu>, Modrm|<sse41:attr>|NoSuf, { Imm8, RegXMM, <bw:elem>|Unspecified|BaseIndex }
- pextrd<sse41>, 0x660f3a16, <sse41:cpu>, Modrm|<sse41:attr>|NoSuf|IgnoreSize, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
--pextrq, 0x6616, AVX|x64, Modrm|Vex|Space0F3A|VexW1|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
--pextrq, 0x660f3a16, SSE4_1|x64, Modrm|Size64|NoSuf, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
-+pextrq, 0x6616, AVX&x64, Modrm|Vex|Space0F3A|VexW1|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
-+pextrq, 0x660f3a16, SSE4_1&x64, Modrm|Size64|NoSuf, { Imm8, RegXMM, Reg64|Unspecified|BaseIndex }
- phminposuw<sse41>, 0x660f3841, <sse41:cpu>, Modrm|<sse41:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
- pinsrb<sse41>, 0x660f3a20, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf|IgnoreSize|NoRex64, { Imm8, Reg32|Reg64, RegXMM }
- pinsrb<sse41>, 0x660f3a20, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { Imm8, Byte|Unspecified|BaseIndex, RegXMM }
- pinsrd<sse41>, 0x660f3a22, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf|IgnoreSize, { Imm8, Reg32|Unspecified|BaseIndex, RegXMM }
--pinsrq, 0x6622, AVX|x64, Modrm|Vex|Space0F3A|VexVVVV|VexW1|NoSuf|SSE2AVX, { Imm8, Reg64|Unspecified|BaseIndex, RegXMM }
--pinsrq, 0x660f3a22, SSE4_1|x64, Modrm|Size64|NoSuf, { Imm8, Reg64|Unspecified|BaseIndex, RegXMM }
-+pinsrq, 0x6622, AVX&x64, Modrm|Vex|Space0F3A|VexVVVV|VexW1|NoSuf|SSE2AVX, { Imm8, Reg64|Unspecified|BaseIndex, RegXMM }
-+pinsrq, 0x660f3a22, SSE4_1&x64, Modrm|Size64|NoSuf, { Imm8, Reg64|Unspecified|BaseIndex, RegXMM }
- pmaxsb<sse41>, 0x660f383c, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
- pmaxsd<sse41>, 0x660f383d, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
- pmaxud<sse41>, 0x660f383f, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-@@ -1411,33 +1435,36 @@ rounds<sd><sse41>, 0x660f3a0a | <sd:opc>, <sse41:cpu>, Modrm|<sse41:scal>|<sse41
- <sse42:cpu:attr:vvvv, $avx:AVX:Vex128|VexW0|SSE2AVX:VexVVVV, $sse:SSE4_2::>
-
- pcmpgtq<sse42>, 0x660f3837, <sse42:cpu>, Modrm|<sse42:attr>|<sse42:vvvv>|NoSuf|Optimize, { RegXMM|Unspecified|BaseIndex, RegXMM }
--pcmpestri<sse42>, 0x660f3a61, <sse42:cpu>|No64, Modrm|<sse42:attr>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
--pcmpestri, 0x6661, AVX|x64, Modrm|Vex|Space0F3A|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|RegXMM, RegXMM }
--pcmpestri, 0x660f3a61, SSE4_2|x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Imm8, Xmmword|Unspecified|BaseIndex|RegXMM, RegXMM }
--pcmpestrm<sse42>, 0x660f3a60, <sse42:cpu>|No64, Modrm|<sse42:attr>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
--pcmpestrm, 0x6660, AVX|x64, Modrm|Vex|Space0F3A|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|RegXMM, RegXMM }
--pcmpestrm, 0x660f3a60, SSE4_2|x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Imm8, Xmmword|Unspecified|BaseIndex|RegXMM, RegXMM }
-+pcmpestri<sse42>, 0x660f3a61, <sse42:cpu>&No64, Modrm|<sse42:attr>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
-+pcmpestri, 0x6661, AVX&x64, Modrm|Vex|Space0F3A|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|SSE2AVX, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
-+pcmpestri, 0x660f3a61, SSE4_2&x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
-+pcmpestrm<sse42>, 0x660f3a60, <sse42:cpu>&No64, Modrm|<sse42:attr>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
-+pcmpestrm, 0x6660, AVX&x64, Modrm|Vex|Space0F3A|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|SSE2AVX, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
-+pcmpestrm, 0x660f3a60, SSE4_2&x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
- pcmpistri<sse42>, 0x660f3a63, <sse42:cpu>, Modrm|<sse42:attr>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
- pcmpistrm<sse42>, 0x660f3a62, <sse42:cpu>, Modrm|<sse42:attr>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
- crc32, 0xf20f38f0, SSE4_2, W|Modrm|No_sSuf|No_qSuf, { Reg8|Reg16|Reg32|Unspecified|BaseIndex, Reg32 }
--crc32, 0xf20f38f0, SSE4_2|x64, W|Modrm|No_wSuf|No_lSuf|No_sSuf, { Reg8|Reg64|Unspecified|BaseIndex, Reg64 }
-+crc32, 0xf20f38f0, SSE4_2&x64, W|Modrm|No_wSuf|No_lSuf|No_sSuf, { Reg8|Reg64|Unspecified|BaseIndex, Reg64 }
-+crc32, 0xf0, APX_F, W|Modrm|No_sSuf|No_qSuf|EVexMap4, { Reg8|Reg16|Reg32|Unspecified|BaseIndex, Reg32 }
-+crc32, 0xf0, APX_F, W|Modrm|No_wSuf|No_lSuf|No_sSuf|EVexMap4, { Reg8|Reg64|Unspecified|BaseIndex, Reg64 }
-
- // xsave/xrstor New Instructions.
-
--xsave, 0xfae/4, Xsave, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Unspecified|BaseIndex }
--xsave64, 0xfae/4, Xsave|x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
--xrstor, 0xfae/5, Xsave, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Unspecified|BaseIndex }
--xrstor64, 0xfae/5, Xsave|x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
-+xsave, 0xfae/4, Xsave, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoEgpr, { Unspecified|BaseIndex }
-+xsave64, 0xfae/4, Xsave&x64, Modrm|NoSuf|Size64|NoEgpr, { Unspecified|BaseIndex }
-+xrstor, 0xfae/5, Xsave, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoEgpr, { Unspecified|BaseIndex }
-+xrstor64, 0xfae/5, Xsave&x64, Modrm|NoSuf|Size64|NoEgpr, { Unspecified|BaseIndex }
- xgetbv, 0xf01d0, Xsave, NoSuf, {}
- xsetbv, 0xf01d1, Xsave, NoSuf, {}
-
- // xsaveopt
--xsaveopt, 0xfae/6, Xsaveopt, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Unspecified|BaseIndex }
--xsaveopt64, 0xfae/6, Xsaveopt|x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
-+
-+xsaveopt, 0xfae/6, Xsaveopt, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|NoEgpr, { Unspecified|BaseIndex }
-+xsaveopt64, 0xfae/6, Xsaveopt&x64, Modrm|NoSuf|Size64|NoEgpr, { Unspecified|BaseIndex }
-
- // AES instructions.
-
--<aes:cpu:attr:vvvv, $avx:AVX|:Vex128|VexW0|SSE2AVX:VexVVVV, $sse:::>
-+<aes:cpu:attr:vvvv, $avx:AVX&:Vex128|VexW0|SSE2AVX:VexVVVV, $sse:::>
-
- aesdec<aes>, 0x660f38de, <aes:cpu>AES, Modrm|<aes:attr>|<aes:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
- aesdeclast<aes>, 0x660f38df, <aes:cpu>AES, Modrm|<aes:attr>|<aes:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-@@ -1448,7 +1475,7 @@ aeskeygenassist<aes>, 0x660f3adf, <aes:cpu>AES, Modrm|<aes:attr>|NoSuf, { Imm8,
-
- // PCLMULQDQ
-
--<pclmul:cpu:attr, $avx:AVX|:Vex128|VexW0|SSE2AVX|VexVVVV, $sse::>
-+<pclmul:cpu:attr, $avx:AVX&:Vex128|VexW0|SSE2AVX|VexVVVV, $sse::>
-
- pclmulqdq<pclmul>, 0x660f3a44, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
- pclmullqlqdq<pclmul>, 0x660f3a44/0x00, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-@@ -1458,7 +1485,7 @@ pclmulhqhqdq<pclmul>, 0x660f3a44/0x11, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr
-
- // GFNI
-
--<gfni:cpu:w0:w1, $avx:AVX|:Vex128|VexW0|SSE2AVX|VexVVVV:Vex128|VexW1|SSE2AVX|VexVVVV, $sse:::>
-+<gfni:cpu:w0:w1, $avx:AVX&:Vex128|VexW0|SSE2AVX|VexVVVV:Vex128|VexW1|SSE2AVX|VexVVVV, $sse:::>
-
- gf2p8affineqb<gfni>, 0x660f3ace, <gfni:cpu>GFNI, Modrm|<gfni:w1>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
- gf2p8affineinvqb<gfni>, 0x660f3acf, <gfni:cpu>GFNI, Modrm|<gfni:w1>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
-@@ -1477,6 +1504,9 @@ gf2p8mulb<gfni>, 0x660f38cf, <gfni:cpu>GFNI, Modrm|<gfni:w0>|NoSuf, { RegXMM|Uns
- true_us:1f:C>
-
- // <Vxy> is used for VEX instructions with x/y suffixes.
-+// NOTE: The order of the "unnamed" ($-prefixed) entries here needs to remain
-+// in sync with <Exy>, for match_template()'s EVEX-to-VEX lowering to
-+// continue to work.
- <Vxy:vex:syntax:src, +
- $i:Vex:IntelSyntax:RegXMM|RegYMM|Unspecified|BaseIndex, +
- $a:Vex:ATTSyntax:RegXMM|RegYMM, +
-@@ -1491,7 +1521,9 @@ vandnp<sd>, 0x<sd:ppfx>55, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSiz
- vandp<sd>, 0x<sd:ppfx>54, AVX, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vblendp<sd>, 0x660c | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vblendvp<sd>, 0x664a | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
--vbroadcastf128, 0x661a, AVX, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-+vbroadcastf128, 0x661a, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-+// vbroadcastf32x4 in disguise (see vround{p,s}{s,d} comment)
-+vbroadcastf128, 0x661a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
- vbroadcastsd, 0x6619, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
- vbroadcastss, 0x6618, AVX, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM|RegYMM }
- vcmp<frel>p<sd>, 0x<sd:ppfx>c2/0x<frel:imm>, AVX, Modrm|<frel:comm>|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1519,14 +1551,18 @@ vdivp<sd>, 0x<sd:ppfx>5e, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize
- vdivs<sd>, 0x<sd:spfx>5e, AVX, Modrm|VexLIG|Space0F|VexVVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vdppd, 0x6641, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vdpps, 0x6640, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
--vextractf128, 0x6619, AVX, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
--vextractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexWIG|Disp8MemShift=2|NoSuf, { Imm8, RegXMM, Reg32|Dword|Unspecified|BaseIndex }
--vextractps, 0x6617, AVX|AVX512F|x64, RegMem|Vex128|EVex128|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg64 }
-+vextractf128, 0x6619, AVX, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-+// vextractf32x4 in disguise (see vround{p,s}{s,d} comment)
-+vextractf128, 0x6619, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
-+vextractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexWIG|Disp8MemShift=2|NoSuf, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
-+vextractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg64 }
- vhaddpd, 0x667c, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vhaddps, 0xf27c, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vhsubpd, 0x667d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vhsubps, 0xf27d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vinsertf128, 0x6618, AVX, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
-+// vinsertf32x4 in disguise (see vround{p,s}{s,d} comment)
-+vinsertf128, 0x6618, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
- vinsertps, 0x6621, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vlddqu, 0xf2f0, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
- vldmxcsr, 0xae/2, AVX, Modrm|Vex128|Space0F|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex }
-@@ -1544,7 +1580,7 @@ vmovap<sd>, 0x<sd:ppfx>28, AVX, D|Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSu
- // support assembler for AMD64, we accept 64bit operand on vmovd so
- // that we can use one template for both SSE and AVX instructions.
- vmovd, 0x666e, AVX|AVX512F, D|Modrm|Vex128|EVex128|Space0F|Disp8MemShift=2|NoSuf, { Reg32|Unspecified|BaseIndex, RegXMM }
--vmovd, 0x667e, AVX|x64, D|RegMem|Vex=1|Space0F|VexW=2|NoSuf|Size64, { RegXMM, Reg64 }
-+vmovd, 0x667e, AVX&x64, D|RegMem|Vex=1|Space0F|VexW=2|NoSuf|Size64, { RegXMM, Reg64 }
- vmovddup, 0xf212, AVX, Modrm|Vex|Space0F|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
- vmovddup, 0xf212, AVX, Modrm|Vex=2|Space0F|VexWIG|NoSuf, { Unspecified|BaseIndex|RegYMM, RegYMM }
- vmovdqa, 0x666f, AVX, D|Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1561,7 +1597,7 @@ vmovntdqa, 0x662a, AVX|AVX2, Modrm|Vex|Space0F38|VexWIG|CheckOperandSize|NoSuf,
- vmovntp<sd>, 0x<sd:ppfx>2b, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
- vmovq, 0xf37e, AVX, Load|Modrm|Vex=1|Space0F|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
- vmovq, 0x66d6, AVX, Modrm|Vex=1|Space0F|VexWIG|NoSuf, { RegXMM, Qword|Unspecified|BaseIndex|RegXMM }
--vmovq, 0x666e, AVX|AVX512F|x64, D|Modrm|Vex128|EVex128|Space0F|VexW1|Disp8MemShift=3|NoSuf, { Reg64|Unspecified|BaseIndex, RegXMM }
-+vmovq, 0x666e, x64&(AVX|AVX512F), D|Modrm|Vex128|EVex128|Space0F|VexW1|Disp8MemShift=3|NoSuf, { Reg64|Unspecified|BaseIndex, RegXMM }
- vmovs<sd>, 0x<sd:spfx>10, AVX, D|Modrm|VexLIG|Space0F|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex, RegXMM }
- vmovs<sd>, 0x<sd:spfx>10, AVX, D|Modrm|VexLIG|Space0F|VexVVVV|VexWIG|NoSuf, { RegXMM, RegXMM, RegXMM }
- vmovshdup, 0xf316, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1591,10 +1627,10 @@ vpblendw, 0x660e, AVX|AVX2, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|
- vpcmpeq<bw>, 0x6674 | <bw:opc>, AVX|AVX2, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpcmpeqd, 0x6676, AVX|AVX2, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpcmpeqq, 0x6629, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
--vpcmpestri, 0x6661, AVX|No64, Modrm|Vex|Space0F3A|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
--vpcmpestri, 0x6661, AVX|x64, Modrm|Vex|Space0F3A|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Imm8, Xmmword|Unspecified|BaseIndex|RegXMM, RegXMM }
--vpcmpestrm, 0x6660, AVX|No64, Modrm|Vex|Space0F3A|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
--vpcmpestrm, 0x6660, AVX|x64, Modrm|Vex|Space0F3A|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Imm8, Xmmword|Unspecified|BaseIndex|RegXMM, RegXMM }
-+vpcmpestri, 0x6661, AVX&No64, Modrm|Vex|Space0F3A|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
-+vpcmpestri, 0x6661, AVX&x64, Modrm|Vex|Space0F3A|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
-+vpcmpestrm, 0x6660, AVX&No64, Modrm|Vex|Space0F3A|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
-+vpcmpestrm, 0x6660, AVX&x64, Modrm|Vex|Space0F3A|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
- vpcmpgt<bw>, 0x6664 | <bw:opc>, AVX|AVX2, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpcmpgtd, 0x6666, AVX|AVX2, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpcmpgtq, 0x6637, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1605,7 +1641,7 @@ vpermilps, 0x660c, AVX|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexVVVV|VexW
- vpermilps, 0x6604, AVX|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F3A|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vpermilpd, 0x660d, AVX, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpermilpd, 0x6605, AVX, Modrm|Vex|Space0F3A|VexW0|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
--vpextr<dq>, 0x6616, AVX|<dq:cpu64>, Modrm|Vex|Space0F3A|<dq:vexw64>|NoSuf, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
-+vpextr<dq>, 0x6616, AVX&<dq:cpu64>, Modrm|Vex|Space0F3A|<dq:vexw64>|NoSuf, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
- vpextrw, 0x66c5, AVX, Load|Modrm|Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_sSuf, { Imm8, RegXMM, Reg32|Reg64 }
- vpextr<bw>, 0x6614 | <bw:opc>, AVX, RegMem|Vex|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg32|Reg64 }
- vpextr<bw>, 0x6614 | <bw:opc>, AVX, Modrm|Vex|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, <bw:elem>|Unspecified|BaseIndex }
-@@ -1618,7 +1654,7 @@ vphsubsw, 0x6607, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|
- vphsubw, 0x6605, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpinsrb, 0x6620, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, Reg32|Reg64, RegXMM, RegXMM }
- vpinsrb, 0x6620, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, Byte|Unspecified|BaseIndex, RegXMM, RegXMM }
--vpinsr<dq>, 0x6622, AVX|<dq:cpu64>, Modrm|Vex|Space0F3A|VexVVVV|<dq:vexw64>|NoSuf, { Imm8, <dq:gpr>|Unspecified|BaseIndex, RegXMM, RegXMM }
-+vpinsr<dq>, 0x6622, AVX&<dq:cpu64>, Modrm|Vex|Space0F3A|VexVVVV|<dq:vexw64>|NoSuf, { Imm8, <dq:gpr>|Unspecified|BaseIndex, RegXMM, RegXMM }
- vpinsrw, 0x66c4, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|No_bSuf|No_wSuf|No_sSuf, { Imm8, Reg32|Reg64, RegXMM, RegXMM }
- vpinsrw, 0x66c4, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|NoSuf, { Imm8, Word|Unspecified|BaseIndex, RegXMM, RegXMM }
- vpmaddubsw, 0x6604, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1636,18 +1672,18 @@ vpminub, 0x66da, AVX|AVX2, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|N
- vpminud, 0x663b, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpminuw, 0x663a, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpmovmskb, 0x66d7, AVX|AVX2, Modrm|Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_sSuf, { RegXMM|RegYMM, Reg32|Reg64 }
--vpmovsxbd, 0x6621, AVX|AVX512F|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
--vpmovsxbq, 0x6622, AVX|AVX512F|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=1|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM }
-+vpmovsxbd, 0x6621, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
-+vpmovsxbq, 0x6622, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=1|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM }
- vpmovsxbw, 0x6620, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
- vpmovsxdq, 0x6625, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
--vpmovsxwd, 0x6623, AVX|AVX512F|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
--vpmovsxwq, 0x6624, AVX|AVX512F|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
--vpmovzxbd, 0x6631, AVX|AVX512F|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
--vpmovzxbq, 0x6632, AVX|AVX512F|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=1|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM }
-+vpmovsxwd, 0x6623, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-+vpmovsxwq, 0x6624, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
-+vpmovzxbd, 0x6631, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
-+vpmovzxbq, 0x6632, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=1|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM }
- vpmovzxbw, 0x6630, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
- vpmovzxdq, 0x6635, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
--vpmovzxwd, 0x6633, AVX|AVX512F|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
--vpmovzxwq, 0x6634, AVX|AVX512F|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
-+vpmovzxwd, 0x6633, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-+vpmovzxwq, 0x6634, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
- vpmuldq, 0x6628, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpmulhrsw, 0x660b, AVX|AVX2, Modrm|Vex|Space0F38|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
- vpmulhuw, 0x66e4, AVX|AVX2, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1695,6 +1731,10 @@ vrcpps, 0x53, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecifie
- vrcpss, 0xf353, AVX, Modrm|Vex=3|Space0F|VexVVVV|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vroundp<sd>, 0x6608 | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexWIG|CheckOperandSize|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
- vrounds<sd>, 0x660a | <sd:opc>, AVX, Modrm|VexLIG|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+// These are really clones of VRNDSCALE{P,S}{S,D}, with broadcast, masking, SAE,
-+// 512-bit operand size, and register sources dropped.
-+vroundp<sd>, 0x6608 | <sd:opc>, APX_F&AVX512VL, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
-+vrounds<sd>, 0x660a | <sd:opc>, APX_F&AVX512F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
- vrsqrtps, 0x52, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
- vrsqrtss, 0xf352, AVX, Modrm|Vex=3|Space0F|VexVVVV|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
- vshufp<sd>, 0x<sd:ppfx>c6, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1714,22 +1754,24 @@ vzeroupper, 0x77, AVX, Vex|Space0F|VexWIG|NoSuf, {}
-
- // 256bit integer AVX2 instructions.
-
--vpmovsxbd, 0x6621, AVX2|AVX512F|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
--vpmovsxbq, 0x6622, AVX2|AVX512F|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+vpmovsxbd, 0x6621, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
-+vpmovsxbq, 0x6622, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
- vpmovsxbw, 0x6620, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
- vpmovsxdq, 0x6625, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
--vpmovsxwd, 0x6623, AVX2|AVX512F|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
--vpmovsxwq, 0x6624, AVX2|AVX512F|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
--vpmovzxbd, 0x6631, AVX2|AVX512F|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
--vpmovzxbq, 0x6632, AVX2|AVX512F|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+vpmovsxwd, 0x6623, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-+vpmovsxwq, 0x6624, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
-+vpmovzxbd, 0x6631, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
-+vpmovzxbq, 0x6632, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
- vpmovzxbw, 0x6630, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
- vpmovzxdq, 0x6635, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
--vpmovzxwd, 0x6633, AVX2|AVX512F|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
--vpmovzxwq, 0x6634, AVX2|AVX512F|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
-+vpmovzxwd, 0x6633, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-+vpmovzxwq, 0x6634, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
-
- // New AVX2 instructions.
-
--vbroadcasti128, 0x665A, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-+vbroadcasti128, 0x665A, AVX2, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-+// vbroadcasti32x4 in disguise (see vround{p,s}{s,d} comment)
-+vbroadcasti128, 0x665a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
- vbroadcastsd, 0x6619, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { RegXMM, RegYMM }
- vbroadcastss, 0x6618, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vpblendd, 0x6602, AVX2, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-@@ -1741,8 +1783,12 @@ vpermd, 0x6636, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F38|VexVVVV|Vex
- vpermpd, 0x6601, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
- vpermps, 0x6616, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F38|VexVVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
- vpermq, 0x6600, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
--vextracti128, 0x6639, AVX2, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-+vextracti128, 0x6639, AVX2, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-+// vextracti32x4 in disguise (see vround{p,s}{s,d} comment)
-+vextracti128, 0x6639, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
- vinserti128, 0x6638, AVX2, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
-+// vinserti32x4 in disguise (see vround{p,s}{s,d} comment)
-+vinserti128, 0x6638, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
- vpmaskmov<dq>, 0x668e, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { RegXMM|RegYMM, RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
- vpmaskmov<dq>, 0x668c, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
- vpsllv<dq>, 0x6647, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-@@ -1765,26 +1811,26 @@ vpgatherqq, 0x6691, AVX2, Modrm|Vex256|Space0F38|VexVVVV|VexW1|SwapSources|NoSuf
-
- // AES + AVX
-
--vaesdec, 0x66de, AVX|AES, Modrm|Vex|Space0F38|VexVVVV|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
--vaesdeclast, 0x66df, AVX|AES, Modrm|Vex|Space0F38|VexVVVV|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
--vaesenc, 0x66dc, AVX|AES, Modrm|Vex|Space0F38|VexVVVV|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
--vaesenclast, 0x66dd, AVX|AES, Modrm|Vex|Space0F38|VexVVVV|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
--vaesimc, 0x66db, AVX|AES, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM }
--vaeskeygenassist, 0x66df, AVX|AES, Modrm|Vex|Space0F3A|VexWIG|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
-+vaesdec, 0x66de, AVX&AES, Modrm|Vex|Space0F38|VexVVVV|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vaesdeclast, 0x66df, AVX&AES, Modrm|Vex|Space0F38|VexVVVV|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vaesenc, 0x66dc, AVX&AES, Modrm|Vex|Space0F38|VexVVVV|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vaesenclast, 0x66dd, AVX&AES, Modrm|Vex|Space0F38|VexVVVV|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vaesimc, 0x66db, AVX&AES, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM }
-+vaeskeygenassist, 0x66df, AVX&AES, Modrm|Vex|Space0F3A|VexWIG|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
-
- // PCLMULQDQ + AVX
-
--vpclmulqdq, 0x6644, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
--vpclmullqlqdq, 0x6644/0x00, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
--vpclmulhqlqdq, 0x6644/0x01, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
--vpclmullqhqdq, 0x6644/0x10, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
--vpclmulhqhqdq, 0x6644/0x11, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmulqdq, 0x6644, AVX&PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmullqlqdq, 0x6644/0x00, AVX&PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmulhqlqdq, 0x6644/0x01, AVX&PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmullqhqdq, 0x6644/0x10, AVX&PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-+vpclmulhqhqdq, 0x6644/0x11, AVX&PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-
- // GFNI + AVX
-
--vgf2p8affineinvqb, 0x66cf, AVX|GFNI, Modrm|Vex|Space0F3A|VexVVVV|VexW1|CheckOperandSize|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
--vgf2p8affineqb, 0x66ce, AVX|GFNI, Modrm|Vex|Space0F3A|VexVVVV|VexW1|CheckOperandSize|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
--vgf2p8mulb, 0x66cf, GFNI|AVX|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexVVVV|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vgf2p8affineinvqb, 0x66cf, AVX&GFNI, Modrm|Vex|Space0F3A|VexVVVV|VexW1|CheckOperandSize|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-+vgf2p8affineqb, 0x66ce, AVX&GFNI, Modrm|Vex|Space0F3A|VexVVVV|VexW1|CheckOperandSize|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-+vgf2p8mulb, 0x66cf, GFNI&(AVX|AVX512F), Modrm|Vex|EVexDYN|Masking|Space0F38|VexVVVV|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-
- // FSGSBASE, RDRND and F16C
-
-@@ -1803,8 +1849,8 @@ vcvtps2ph, 0x661d, F16C, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Uns
- <fma:opc, 132:10, 213:20, 231:30>
-
- <sdh:cpu:cpudq:fma:ppfx:spfx:pfx:spc1:spc2:opc:vex:vexlig:vexw:elem, +
-- s:AVX512F:AVX512DQ:FMA|AVX|AVX512F::f3:66:Space0F:Space0F38:0:Vex|EVexDYN:VexLIG|EVexLIG:VexW0:Dword, +
-- d:AVX512F:AVX512DQ:FMA|AVX|AVX512F:66:f2:66:Space0F:Space0F38:1:Vex|EVexDYN:VexLIG|EVexLIG:VexW1:Qword, +
-+ s:AVX512F:AVX512DQ:FMA|AVX512F::f3:66:Space0F:Space0F38:0:Vex|EVexDYN:VexLIG|EVexLIG:VexW0:Dword, +
-+ d:AVX512F:AVX512DQ:FMA|AVX512F:66:f2:66:Space0F:Space0F38:1:Vex|EVexDYN:VexLIG|EVexLIG:VexW1:Qword, +
- h:AVX512_FP16:AVX512_FP16:AVX512_FP16::f3::EVexMap5:EVexMap6:0::EVexLIG:VexW0:Word>
-
- vfmadd<fma>p<sdh>, 0x6688 | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|VexVVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-@@ -1831,14 +1877,14 @@ xtest, 0xf01d6, HLE|RTM, NoSuf, {}
-
- // BMI2 instructions.
-
--bzhi, 0xf5, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
--mulx, 0xf2f6, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
--pdep, 0xf2f5, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
--pext, 0xf3f5, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
--rorx, 0xf2f0, BMI2, Modrm|CheckOperandSize|Vex128|Space0F3A|No_bSuf|No_wSuf|No_sSuf, { Imm8|Imm8S, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, Reg32|Reg64 }
--sarx, 0xf3f7, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
--shlx, 0x66f7, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
--shrx, 0xf2f7, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+bzhi, 0xf5, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf|NF, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+mulx, 0xf2f6, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
-+pdep, 0xf2f5, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
-+pext, 0xf3f5, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
-+rorx, 0xf2f0, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F3A|No_bSuf|No_wSuf|No_sSuf, { Imm8|Imm8S, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+sarx, 0xf3f7, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+shlx, 0x66f7, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+shrx, 0xf2f7, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-
- // FMA4 instructions
-
-@@ -1908,12 +1954,13 @@ lwpins, 0x12/0, LWP, Modrm|SpaceXOP0A|NoSuf|VexVVVV|Vex, { Imm32|Imm32S, Reg32|U
-
- // BMI instructions
-
--andn, 0xf2, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
--bextr, 0xf7, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
--blsi, 0xf3/3, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
--blsmsk, 0xf3/2, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
--blsr, 0xf3/1, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
--tzcnt, 0xf30fbc, BMI, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+andn, 0xf2, APX_F(BMI), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf|NF, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
-+bextr, 0xf7, APX_F(BMI), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf|NF, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+blsi, 0xf3/3, APX_F(BMI), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf|NF, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+blsmsk, 0xf3/2, APX_F(BMI), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf|NF, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+blsr, 0xf3/1, APX_F(BMI), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf|NF, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+tzcnt, 0xf30fbc, BMI, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+tzcnt, 0xf4, BMI&APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-
- // TBM instructions
-
-@@ -1990,10 +2037,12 @@ insertq, 0xf20f79, SSE4a, Modrm|NoSuf, { RegXMM, RegXMM }
- insertq, 0xf20f78, SSE4a, Modrm|NoSuf, { Imm8, Imm8, RegXMM, RegXMM }
-
- // LZCNT instruction
--lzcnt, 0xf30fbd, LZCNT, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+lzcnt, 0xf30fbd, LZCNT, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+lzcnt, 0xf5, LZCNT&APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-
- // POPCNT instruction
--popcnt, 0xf30fb8, POPCNT, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+popcnt, 0xf30fb8, POPCNT, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+popcnt, 0x88, POPCNT&APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|NF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-
- // VIA PadLock extensions.
- xstore-rng, 0xfa7c0, PadLock, NoSuf|RepPrefixOk, {}
-@@ -2016,8 +2065,11 @@ xcryptofb, 0xf30fa7e8, PadLock, NoSuf|RepPrefixOk, {}
- xstore, 0xfa7c0, PadLock, NoSuf|RepPrefixOk, {}
-
- // Multy-precision Add Carry, rdseed instructions.
--adcx, 0x660f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
--adox, 0xf30f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+<adx:pfx, c:66, o:f3>
-+ad<adx>x, 0x<adx:pfx>66, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
-+ad<adx>x, 0x<adx:pfx>0f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+ad<adx>x, 0x<adx:pfx>66, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-+<adx>
- rdseed, 0xfc7/7, RdSeed, Modrm|NoSuf, { Reg16|Reg32|Reg64 }
-
- // SMAP instructions.
-@@ -2030,12 +2082,12 @@ bnd, 0xf2, MPX, NoSuf|IsPrefix, {}
- // MPX instructions.
- bndmk, 0xf30f1b, MPX, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex, RegBND }
- bndmov, 0x660f1a, MPX, D|Modrm|NoSuf, { Xmmword|Unspecified|BaseIndex|RegBND, RegBND }
--bndcl, 0xf30f1a, MPX|No64, Modrm|Anysize|IgnoreSize|NoSuf, { Reg32|BaseIndex, RegBND }
--bndcl, 0xf30f1a, MPX|x64, Modrm|Anysize|IgnoreSize|NoSuf|NoRex64, { Reg64|BaseIndex, RegBND }
--bndcu, 0xf20f1a, MPX|No64, Modrm|Anysize|IgnoreSize|NoSuf, { Reg32|BaseIndex, RegBND }
--bndcu, 0xf20f1a, MPX|x64, Modrm|Anysize|IgnoreSize|NoSuf|NoRex64, { Reg64|BaseIndex, RegBND }
--bndcn, 0xf20f1b, MPX|No64, Modrm|Anysize|IgnoreSize|NoSuf, { Reg32|BaseIndex, RegBND }
--bndcn, 0xf20f1b, MPX|x64, Modrm|Anysize|IgnoreSize|NoSuf|NoRex64, { Reg64|BaseIndex, RegBND }
-+bndcl, 0xf30f1a, MPX&No64, Modrm|Anysize|IgnoreSize|NoSuf, { Reg32|BaseIndex, RegBND }
-+bndcl, 0xf30f1a, MPX&x64, Modrm|Anysize|IgnoreSize|NoSuf|NoRex64, { Reg64|BaseIndex, RegBND }
-+bndcu, 0xf20f1a, MPX&No64, Modrm|Anysize|IgnoreSize|NoSuf, { Reg32|BaseIndex, RegBND }
-+bndcu, 0xf20f1a, MPX&x64, Modrm|Anysize|IgnoreSize|NoSuf|NoRex64, { Reg64|BaseIndex, RegBND }
-+bndcn, 0xf20f1b, MPX&No64, Modrm|Anysize|IgnoreSize|NoSuf, { Reg32|BaseIndex, RegBND }
-+bndcn, 0xf20f1b, MPX&x64, Modrm|Anysize|IgnoreSize|NoSuf|NoRex64, { Reg64|BaseIndex, RegBND }
- bndstx, 0x0f1b, MPX, Modrm|Anysize|IgnoreSize|NoSuf, { RegBND, BaseIndex }
- bndldx, 0x0f1a, MPX, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex, RegBND }
-
-@@ -2073,26 +2125,29 @@ vsm4rnds4, 0xf2da, SM4, Modrm|Space0F38|Vex|VexVVVV|VexW0|CheckOperandSize|NoSuf
-
- // VAES
-
--vaesdec, 0x66de, VAES|AVX|AVX512F, Modrm|Vex|EVexDYN|Space0F38|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
--vaesdeclast, 0x66df, VAES|AVX|AVX512F, Modrm|Vex|EVexDYN|Space0F38|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
--vaesenc, 0x66dc, VAES|AVX|AVX512F, Modrm|Vex|EVexDYN|Space0F38|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
--vaesenclast, 0x66dd, VAES|AVX|AVX512F, Modrm|Vex|EVexDYN|Space0F38|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vaesdec, 0x66de, VAES&(AVX|AVX512F), Modrm|Vex|EVexDYN|Space0F38|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vaesdeclast, 0x66df, VAES&(AVX|AVX512F), Modrm|Vex|EVexDYN|Space0F38|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vaesenc, 0x66dc, VAES&(AVX|AVX512F), Modrm|Vex|EVexDYN|Space0F38|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vaesenclast, 0x66dd, VAES&(AVX|AVX512F), Modrm|Vex|EVexDYN|Space0F38|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-
- // VAES instructions end
-
- // VPCLMULQDQ instructions
-
--vpclmulqdq, 0x6644, VPCLMULQDQ|AVX|AVX512F, Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
--vpclmullqlqdq, 0x6644/0x00, VPCLMULQDQ|AVX|AVX512F, Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
--vpclmulhqlqdq, 0x6644/0x01, VPCLMULQDQ|AVX|AVX512F, Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
--vpclmullqhqdq, 0x6644/0x10, VPCLMULQDQ|AVX|AVX512F, Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
--vpclmulhqhqdq, 0x6644/0x11, VPCLMULQDQ|AVX|AVX512F, Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vpclmulqdq, 0x6644, VPCLMULQDQ&(AVX|AVX512F), Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vpclmullqlqdq, 0x6644/0x00, VPCLMULQDQ&(AVX|AVX512F), Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vpclmulhqlqdq, 0x6644/0x01, VPCLMULQDQ&(AVX|AVX512F), Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vpclmullqhqdq, 0x6644/0x10, VPCLMULQDQ&(AVX|AVX512F), Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vpclmulhqhqdq, 0x6644/0x11, VPCLMULQDQ&(AVX|AVX512F), Modrm|Space0F3A|Vex|EVexDYN|VexWIG|VexVVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-
- // VPCLMULQDQ instructions end
-
- // AVX512F instructions.
-
- // <Exy> is used for EVEX instructions with x/y suffixes.
-+// NOTE: The order of the "unnamed" ($-prefixed) entries here needs to remain
-+// in sync with <Vxy>, for match_template()'s EVEX-to-VEX lowering to
-+// continue to work.
- <Exy:vl:attr:sr:sae:src:dst, +
- $z::EVex512|Disp8MemShift=6:StaticRounding|SAE:SAE:RegZMM|Unspecified|BaseIndex:RegYMM, +
- $i:AVX512VL:Disp8ShiftVL|IntelSyntax:::RegXMM|RegYMM|Unspecified|BaseIndex:RegXMM, +
-@@ -2106,9 +2161,9 @@ kor<bw>, 0x<bw:kpfx>45, <bw:kcpu>, Modrm|Vex256|Space0F|VexVVVV|VexW0|NoSuf, { R
- kxnor<bw>, 0x<bw:kpfx>46, <bw:kcpu>, Modrm|Vex256|Space0F|VexVVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask }
- kxor<bw>, 0x<bw:kpfx>47, <bw:kcpu>, Modrm|Vex256|Space0F|VexVVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask }
-
--kmov<bw>, 0x<bw:kpfx>90, <bw:kcpu>, Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask|<bw:elem>|Unspecified|BaseIndex, RegMask }
--kmov<bw>, 0x<bw:kpfx>91, <bw:kcpu>, Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask, <bw:elem>|Unspecified|BaseIndex }
--kmov<bw>, 0x<bw:kpfx>92, <bw:kcpu>, D|Modrm|Vex128|Space0F|VexW0|NoSuf, { Reg32, RegMask }
-+kmov<bw>, 0x<bw:kpfx>90, APX_F(<bw:kcpu>), Modrm|Vex128|EVex128|Space0F|VexW0|NoSuf, { RegMask|<bw:elem>|Unspecified|BaseIndex, RegMask }
-+kmov<bw>, 0x<bw:kpfx>91, APX_F(<bw:kcpu>), Modrm|Vex128|EVex128|Space0F|VexW0|NoSuf, { RegMask, <bw:elem>|Unspecified|BaseIndex }
-+kmov<bw>, 0x<bw:kpfx>92, APX_F(<bw:kcpu>), D|Modrm|Vex128|EVex128|Space0F|VexW0|NoSuf, { Reg32, RegMask }
-
- knot<bw>, 0x<bw:kpfx>44, <bw:kcpu>, Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask, RegMask }
- kortest<bw>, 0x<bw:kpfx>98, <bw:kcpu>, Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask, RegMask }
-@@ -2188,11 +2243,11 @@ vcvtudq2pd, 0xF37A, AVX512F, Modrm|EVex=1|Masking|Space0F|VexW=1|Broadcast|Disp8
- vcvtdq2ps, 0x5B, AVX512F, Modrm|Masking|Space0F|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vcvtps2udq, 0x79, AVX512F, Modrm|Masking|Space0F|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-
--vcvtpd2dq<Exy>, 0xf2e6, AVX512F|<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-+vcvtpd2dq<Exy>, 0xf2e6, AVX512F&<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-
--vcvtpd2ps<Exy>, 0x665a, AVX512F|<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-+vcvtpd2ps<Exy>, 0x665a, AVX512F&<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-
--vcvtpd2udq<Exy>, 0x79, AVX512F|<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-+vcvtpd2udq<Exy>, 0x79, AVX512F&<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-
- vcvtph2ps, 0x6613, AVX512F, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Unspecified|BaseIndex, RegZMM }
-
-@@ -2223,8 +2278,8 @@ vcvtusi2ss, 0xF37B, AVX512F, Modrm|EVexLIG|Space0F|VexVVVV|Disp8ShiftVL|No_bSuf|
-
- vcvtss2sd, 0xF35A, AVX512F, Modrm|EVexLIG|Masking|Space0F|VexVVVV|VexW0|Disp8MemShift=2|NoSuf|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM, RegXMM }
-
--vcvttpd2dq<Exy>, 0x66e6, AVX512F|<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sae>, { <Exy:src>|Qword, <Exy:dst> }
--vcvttpd2udq<Exy>, 0x78, AVX512F|<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sae>, { <Exy:src>|Qword, <Exy:dst> }
-+vcvttpd2dq<Exy>, 0x66e6, AVX512F&<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sae>, { <Exy:src>|Qword, <Exy:dst> }
-+vcvttpd2udq<Exy>, 0x78, AVX512F&<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sae>, { <Exy:src>|Qword, <Exy:dst> }
-
- vcvttps2dq, 0xF35B, AVX512F, Modrm|Masking|Space0F|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vcvttps2udq, 0x78, AVX512F, Modrm|Masking|Space0F|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-@@ -2272,8 +2327,8 @@ vmovntdqa, 0x662A, AVX512F, Modrm|Space0F38|VexW=1|Disp8ShiftVL|CheckOperandSize
- vgetexpp<sdh>, 0x6642, <sdh:cpu>, Modrm|Masking|<sdh:spc2>|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vgetexps<sdh>, 0x6643, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc2>|VexVVVV|<sdh:vexw>|Disp8MemShift|NoSuf|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
-
--vinsertf32x4, 0x6618, AVX512F, Modrm|Masking|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|CheckOperandSize|NoSuf, { Imm8, RegXMM|XMMword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
--vinserti32x4, 0x6638, AVX512F, Modrm|Masking|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|CheckOperandSize|NoSuf, { Imm8, RegXMM|XMMword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
-+vinsertf32x4, 0x6618, AVX512F, Modrm|Masking|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|CheckOperandSize|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
-+vinserti32x4, 0x6638, AVX512F, Modrm|Masking|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|CheckOperandSize|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
-
- vinsertf64x4, 0x661A, AVX512F, Modrm|EVex=1|Masking|Space0F3A|VexVVVV|VexW1|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
- vinserti64x4, 0x663A, AVX512F, Modrm|EVex=1|Masking|Space0F3A|VexVVVV|VexW1|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
-@@ -2470,17 +2525,17 @@ clflushopt, 0x660fae/7, ClflushOpt, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex
-
- // XSAVES/XRSTORS instructions.
-
--xrstors, 0xfc7/3, XSAVES, Modrm|NoSuf, { Unspecified|BaseIndex }
--xrstors64, 0xfc7/3, XSAVES|x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
--xsaves, 0xfc7/5, XSAVES, Modrm|NoSuf, { Unspecified|BaseIndex }
--xsaves64, 0xfc7/5, XSAVES|x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
-+xrstors, 0xfc7/3, XSAVES, Modrm|NoSuf|NoEgpr, { Unspecified|BaseIndex }
-+xrstors64, 0xfc7/3, XSAVES&x64, Modrm|NoSuf|Size64|NoEgpr, { Unspecified|BaseIndex }
-+xsaves, 0xfc7/5, XSAVES, Modrm|NoSuf|NoEgpr, { Unspecified|BaseIndex }
-+xsaves64, 0xfc7/5, XSAVES&x64, Modrm|NoSuf|Size64|NoEgpr, { Unspecified|BaseIndex }
-
- // XSAVES instructions end.
-
- // XSAVEC instructions.
-
--xsavec, 0xfc7/4, XSAVEC, Modrm|NoSuf, { Unspecified|BaseIndex }
--xsavec64, 0xfc7/4, XSAVEC|x64, Modrm|NoSuf|Size64, { Unspecified|BaseIndex }
-+xsavec, 0xfc7/4, XSAVEC, Modrm|NoSuf|NoEgpr, { Unspecified|BaseIndex }
-+xsavec64, 0xfc7/4, XSAVEC&x64, Modrm|NoSuf|Size64|NoEgpr, { Unspecified|BaseIndex }
-
- // XSAVEC instructions end.
-
-@@ -2494,108 +2549,108 @@ enclv, 0xf01c0, SE1, NoSuf, {}
-
- // AVX512VL instructions.
-
--vgatherdpd, 0x6692, AVX512F|AVX512VL, Modrm|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB128|NoSuf, { Qword|Unspecified|BaseIndex, RegXMM|RegYMM }
--vgatherdps, 0x6692, AVX512F|AVX512VL, Modrm|EVex=2|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB128|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM }
--vgatherdps, 0x6692, AVX512F|AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { Dword|Unspecified|BaseIndex, RegYMM }
--vgatherqp<sd>, 0x6693, AVX512F|AVX512VL, Modrm|EVex128|Masking|NoDefMask|Space0F38|<sd:vexw>|Disp8MemShift|VecSIB128|NoSuf, { <sd:elem>|Unspecified|BaseIndex, RegXMM }
--vgatherqpd, 0x6693, AVX512F|AVX512VL, Modrm|EVex256|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB256|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
--vgatherqps, 0x6693, AVX512F|AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM }
--vpgatherdd, 0x6690, AVX512F|AVX512VL, Modrm|EVex=2|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB128|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM }
--vpgatherdd, 0x6690, AVX512F|AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { Dword|Unspecified|BaseIndex, RegYMM }
--vpgatherdq, 0x6690, AVX512F|AVX512VL, Modrm|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB128|NoSuf, { Qword|Unspecified|BaseIndex, RegXMM|RegYMM }
--vpgatherq<dq>, 0x6691, AVX512F|AVX512VL, Modrm|EVex128|Masking|NoDefMask|Space0F38|<dq:vexw>|Disp8MemShift|VecSIB128|NoSuf, { <dq:elem>|Unspecified|BaseIndex, RegXMM }
--vpgatherqd, 0x6691, AVX512F|AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM }
--vpgatherqq, 0x6691, AVX512F|AVX512VL, Modrm|EVex256|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB256|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
--
--vpscatterdd, 0x66A0, AVX512F|AVX512VL, Modrm|EVex=2|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB128|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex }
--vpscatterdd, 0x66A0, AVX512F|AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { RegYMM, Dword|Unspecified|BaseIndex }
--vpscatterdq, 0x66A0, AVX512F|AVX512VL, Modrm|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB128|NoSuf, { RegXMM|RegYMM, Qword|Unspecified|BaseIndex }
--vpscatterq<dq>, 0x66A1, AVX512F|AVX512VL, Modrm|EVex128|Masking|NoDefMask|Space0F38|<dq:vexw>|Disp8MemShift|VecSIB128|NoSuf, { RegXMM, <dq:elem>|Unspecified|BaseIndex }
--vpscatterqd, 0x66A1, AVX512F|AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex }
--vpscatterqq, 0x66A1, AVX512F|AVX512VL, Modrm|EVex256|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB256|NoSuf, { RegYMM, Qword|Unspecified|BaseIndex }
--vscatterdpd, 0x66A2, AVX512F|AVX512VL, Modrm|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB128|NoSuf, { RegXMM|RegYMM, Qword|Unspecified|BaseIndex }
--vscatterdps, 0x66A2, AVX512F|AVX512VL, Modrm|EVex=2|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB128|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex }
--vscatterdps, 0x66A2, AVX512F|AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { RegYMM, Dword|Unspecified|BaseIndex }
--vscatterqp<sd>, 0x66A3, AVX512F|AVX512VL, Modrm|EVex128|Masking|NoDefMask|Space0F38|<sd:vexw>|Disp8MemShift|VecSIB128|NoSuf, { RegXMM, <sd:elem>|Unspecified|BaseIndex }
--vscatterqpd, 0x66A3, AVX512F|AVX512VL, Modrm|EVex256|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB256|NoSuf, { RegYMM, Qword|Unspecified|BaseIndex }
--vscatterqps, 0x66A3, AVX512F|AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex }
--
--vcvtdq2pd, 0xF3E6, AVX512F|AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtdq2pd, 0xF3E6, AVX512F|AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
--vcvtudq2pd, 0xF37A, AVX512F|AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtudq2pd, 0xF37A, AVX512F|AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
--
--vcvtph2ps, 0x6613, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtph2ps, 0x6613, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
--
--vcvtps2pd, 0x5A, AVX512F|AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtps2pd, 0x5A, AVX512F|AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
--
--vcvtps2ph, 0x661D, AVX512F|AVX512VL, Modrm|EVex128|Masking|Space0F3A|VexW0|Disp8MemShift=3|NoSuf, { Imm8, RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vcvtps2ph, 0x661D, AVX512F|AVX512VL, Modrm|EVex256|Masking|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, RegXMM|Unspecified|BaseIndex }
--
--vmovddup, 0xF212, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F|VexW1|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
--
--vpmovdb, 0xF331, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
--vpmovdb, 0xF331, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovsdb, 0xF321, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
--vpmovsdb, 0xF321, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovusdb, 0xF311, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
--vpmovusdb, 0xF311, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
--
--vpmovdw, 0xF333, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovdw, 0xF333, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
--vpmovsdw, 0xF323, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovsdw, 0xF323, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
--vpmovusdw, 0xF313, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovusdw, 0xF313, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
--
--vpmovqb, 0xF332, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
--vpmovqb, 0xF332, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
--vpmovsqb, 0xF322, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
--vpmovsqb, 0xF322, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
--vpmovusqb, 0xF312, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
--vpmovusqb, 0xF312, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
--
--vpmovqd, 0xF335, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovqd, 0xF335, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
--vpmovsqd, 0xF325, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovsqd, 0xF325, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
--vpmovusqd, 0xF315, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovusqd, 0xF315, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
--
--vpmovqw, 0xF334, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
--vpmovqw, 0xF334, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovsqw, 0xF324, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
--vpmovsqw, 0xF324, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovusqw, 0xF314, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
--vpmovusqw, 0xF314, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
--
--vpmovsxdq, 0x6625, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
--vpmovsxdq, 0x6625, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
--vpmovzxdq, 0x6635, AVX512F|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
--vpmovzxdq, 0x6635, AVX512F|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-+vgatherdpd, 0x6692, AVX512VL, Modrm|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB128|NoSuf, { Qword|Unspecified|BaseIndex, RegXMM|RegYMM }
-+vgatherdps, 0x6692, AVX512VL, Modrm|EVex=2|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB128|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM }
-+vgatherdps, 0x6692, AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { Dword|Unspecified|BaseIndex, RegYMM }
-+vgatherqp<sd>, 0x6693, AVX512VL, Modrm|EVex128|Masking|NoDefMask|Space0F38|<sd:vexw>|Disp8MemShift|VecSIB128|NoSuf, { <sd:elem>|Unspecified|BaseIndex, RegXMM }
-+vgatherqpd, 0x6693, AVX512VL, Modrm|EVex256|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB256|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
-+vgatherqps, 0x6693, AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM }
-+vpgatherdd, 0x6690, AVX512VL, Modrm|EVex=2|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB128|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM }
-+vpgatherdd, 0x6690, AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { Dword|Unspecified|BaseIndex, RegYMM }
-+vpgatherdq, 0x6690, AVX512VL, Modrm|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB128|NoSuf, { Qword|Unspecified|BaseIndex, RegXMM|RegYMM }
-+vpgatherq<dq>, 0x6691, AVX512VL, Modrm|EVex128|Masking|NoDefMask|Space0F38|<dq:vexw>|Disp8MemShift|VecSIB128|NoSuf, { <dq:elem>|Unspecified|BaseIndex, RegXMM }
-+vpgatherqd, 0x6691, AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM }
-+vpgatherqq, 0x6691, AVX512VL, Modrm|EVex256|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB256|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
-+
-+vpscatterdd, 0x66A0, AVX512VL, Modrm|EVex=2|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB128|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex }
-+vpscatterdd, 0x66A0, AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { RegYMM, Dword|Unspecified|BaseIndex }
-+vpscatterdq, 0x66A0, AVX512VL, Modrm|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB128|NoSuf, { RegXMM|RegYMM, Qword|Unspecified|BaseIndex }
-+vpscatterq<dq>, 0x66A1, AVX512VL, Modrm|EVex128|Masking|NoDefMask|Space0F38|<dq:vexw>|Disp8MemShift|VecSIB128|NoSuf, { RegXMM, <dq:elem>|Unspecified|BaseIndex }
-+vpscatterqd, 0x66A1, AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex }
-+vpscatterqq, 0x66A1, AVX512VL, Modrm|EVex256|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB256|NoSuf, { RegYMM, Qword|Unspecified|BaseIndex }
-+vscatterdpd, 0x66A2, AVX512VL, Modrm|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB128|NoSuf, { RegXMM|RegYMM, Qword|Unspecified|BaseIndex }
-+vscatterdps, 0x66A2, AVX512VL, Modrm|EVex=2|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB128|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex }
-+vscatterdps, 0x66A2, AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { RegYMM, Dword|Unspecified|BaseIndex }
-+vscatterqp<sd>, 0x66A3, AVX512VL, Modrm|EVex128|Masking|NoDefMask|Space0F38|<sd:vexw>|Disp8MemShift|VecSIB128|NoSuf, { RegXMM, <sd:elem>|Unspecified|BaseIndex }
-+vscatterqpd, 0x66A3, AVX512VL, Modrm|EVex256|Masking|NoDefMask|Space0F38|VexW1|Disp8MemShift=3|VecSIB256|NoSuf, { RegYMM, Qword|Unspecified|BaseIndex }
-+vscatterqps, 0x66A3, AVX512VL, Modrm|EVex=3|Masking|NoDefMask|Space0F38|VexW0|Disp8MemShift=2|VecSIB256|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex }
-+
-+vcvtdq2pd, 0xF3E6, AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtdq2pd, 0xF3E6, AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+vcvtudq2pd, 0xF37A, AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtudq2pd, 0xF37A, AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+
-+vcvtph2ps, 0x6613, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtph2ps, 0x6613, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-+
-+vcvtps2pd, 0x5A, AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtps2pd, 0x5A, AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+
-+vcvtps2ph, 0x661D, AVX512VL, Modrm|EVex128|Masking|Space0F3A|VexW0|Disp8MemShift=3|NoSuf, { Imm8, RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vcvtps2ph, 0x661D, AVX512VL, Modrm|EVex256|Masking|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, RegXMM|Unspecified|BaseIndex }
-+
-+vmovddup, 0xF212, AVX512VL, Modrm|EVex=2|Masking|Space0F|VexW1|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-+
-+vpmovdb, 0xF331, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-+vpmovdb, 0xF331, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovsdb, 0xF321, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-+vpmovsdb, 0xF321, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovusdb, 0xF311, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-+vpmovusdb, 0xF311, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-+
-+vpmovdw, 0xF333, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovdw, 0xF333, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+vpmovsdw, 0xF323, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovsdw, 0xF323, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+vpmovusdw, 0xF313, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovusdw, 0xF313, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+
-+vpmovqb, 0xF332, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
-+vpmovqb, 0xF332, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
-+vpmovsqb, 0xF322, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
-+vpmovsqb, 0xF322, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
-+vpmovusqb, 0xF312, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
-+vpmovusqb, 0xF312, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
-+
-+vpmovqd, 0xF335, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovqd, 0xF335, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+vpmovsqd, 0xF325, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovsqd, 0xF325, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+vpmovusqd, 0xF315, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovusqd, 0xF315, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+
-+vpmovqw, 0xF334, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-+vpmovqw, 0xF334, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovsqw, 0xF324, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-+vpmovsqw, 0xF324, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovusqw, 0xF314, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-+vpmovusqw, 0xF314, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-+
-+vpmovsxdq, 0x6625, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-+vpmovsxdq, 0x6625, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-+vpmovzxdq, 0x6635, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-+vpmovzxdq, 0x6635, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-
- // AVX512VL instructions end.
-
- // AVX512BW instructions.
-
--kadd<dq>, 0x<dq:kpfx>4a, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|<dq:kvsz>|NoSuf, { RegMask, RegMask, RegMask }
--kand<dq>, 0x<dq:kpfx>41, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|<dq:kvsz>|NoSuf, { RegMask, RegMask, RegMask }
--kandn<dq>, 0x<dq:kpfx>42, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|<dq:kvsz>|NoSuf|Optimize, { RegMask, RegMask, RegMask }
--kmov<dq>, 0x<dq:kpfx>90, AVX512BW, Modrm|Vex128|Space0F|VexW1|<dq:kvsz>|NoSuf, { RegMask|<dq:elem>|Unspecified|BaseIndex, RegMask }
--kmov<dq>, 0x<dq:kpfx>91, AVX512BW, Modrm|Vex128|Space0F|VexW1|<dq:kvsz>|NoSuf, { RegMask, <dq:elem>|Unspecified|BaseIndex }
--kmov<dq>, 0xf292, AVX512BW, D|Modrm|Vex128|Space0F|<dq:vexw64>|<dq:kvsz>|NoSuf, { <dq:gpr>, RegMask }
--knot<dq>, 0x<dq:kpfx>44, AVX512BW, Modrm|Vex128|Space0F|VexW1|<dq:kvsz>|NoSuf, { RegMask, RegMask }
--kor<dq>, 0x<dq:kpfx>45, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|<dq:kvsz>|NoSuf, { RegMask, RegMask, RegMask }
--kortest<dq>, 0x<dq:kpfx>98, AVX512BW, Modrm|Vex128|Space0F|VexW1|<dq:kvsz>|NoSuf, { RegMask, RegMask }
--ktest<dq>, 0x<dq:kpfx>99, AVX512BW, Modrm|Vex128|Space0F|VexW1|<dq:kvsz>|NoSuf, { RegMask, RegMask }
--kxnor<dq>, 0x<dq:kpfx>46, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|<dq:kvsz>|NoSuf, { RegMask, RegMask, RegMask }
--kxor<dq>, 0x<dq:kpfx>47, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|<dq:kvsz>|NoSuf|Optimize, { RegMask, RegMask, RegMask }
--kunpckdq, 0x4B, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|Vsz512|NoSuf, { RegMask, RegMask, RegMask }
--kunpckwd, 0x4B, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW0|Vsz256|NoSuf, { RegMask, RegMask, RegMask }
--kshiftl<dq>, 0x6633, AVX512BW, Modrm|Vex128|Space0F3A|<dq:vexw>|<dq:kvsz>|NoSuf, { Imm8, RegMask, RegMask }
--kshiftr<dq>, 0x6631, AVX512BW, Modrm|Vex128|Space0F3A|<dq:vexw>|<dq:kvsz>|NoSuf, { Imm8, RegMask, RegMask }
-+kadd<dq>, 0x<dq:kpfx>4a, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|NoSuf, { RegMask, RegMask, RegMask }
-+kand<dq>, 0x<dq:kpfx>41, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|NoSuf, { RegMask, RegMask, RegMask }
-+kandn<dq>, 0x<dq:kpfx>42, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|NoSuf|Optimize, { RegMask, RegMask, RegMask }
-+kmov<dq>, 0x<dq:kpfx>90, APX_F(AVX512BW), Modrm|Vex128|EVex128|Space0F|VexW1|NoSuf, { RegMask|<dq:elem>|Unspecified|BaseIndex, RegMask }
-+kmov<dq>, 0x<dq:kpfx>91, APX_F(AVX512BW), Modrm|Vex128|EVex128|Space0F|VexW1|NoSuf, { RegMask, <dq:elem>|Unspecified|BaseIndex }
-+kmov<dq>, 0xf292, APX_F(AVX512BW), D|Modrm|Vex128|EVex128|Space0F|<dq:vexw64>|NoSuf, { <dq:gpr>, RegMask }
-+knot<dq>, 0x<dq:kpfx>44, AVX512BW, Modrm|Vex128|Space0F|VexW1|NoSuf, { RegMask, RegMask }
-+kor<dq>, 0x<dq:kpfx>45, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|NoSuf, { RegMask, RegMask, RegMask }
-+kortest<dq>, 0x<dq:kpfx>98, AVX512BW, Modrm|Vex128|Space0F|VexW1|NoSuf, { RegMask, RegMask }
-+ktest<dq>, 0x<dq:kpfx>99, AVX512BW, Modrm|Vex128|Space0F|VexW1|NoSuf, { RegMask, RegMask }
-+kxnor<dq>, 0x<dq:kpfx>46, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|NoSuf, { RegMask, RegMask, RegMask }
-+kxor<dq>, 0x<dq:kpfx>47, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|NoSuf|Optimize, { RegMask, RegMask, RegMask }
-+kunpckdq, 0x4B, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|NoSuf, { RegMask, RegMask, RegMask }
-+kunpckwd, 0x4B, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask }
-+kshiftl<dq>, 0x6633, AVX512BW, Modrm|Vex128|Space0F3A|<dq:vexw>|NoSuf, { Imm8, RegMask, RegMask }
-+kshiftr<dq>, 0x6631, AVX512BW, Modrm|Vex128|Space0F3A|<dq:vexw>|NoSuf, { Imm8, RegMask, RegMask }
-
- vdbpsadbw, 0x6642, AVX512BW, Modrm|Masking|Space0F3A|VexVVVV|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-
-@@ -2681,23 +2736,23 @@ vpmov<bw>2m, 0xf329, AVX512BW, Modrm|EVexDYN|Space0F38|<bw:vexw>|NoSuf, { RegXMM
- vpmovm2<bw>, 0xf328, AVX512BW, Modrm|EVexDYN|Space0F38|<bw:vexw>|NoSuf, { RegMask, RegXMM|RegYMM|RegZMM }
-
- vpmovswb, 0xF320, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
--vpmovswb, 0xF320, AVX512BW|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovswb, 0xF320, AVX512BW|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+vpmovswb, 0xF320, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovswb, 0xF320, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-
- vpmovuswb, 0xF310, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
--vpmovuswb, 0xF310, AVX512BW|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovuswb, 0xF310, AVX512BW|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+vpmovuswb, 0xF310, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovuswb, 0xF310, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-
- vpmovwb, 0xF330, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
--vpmovwb, 0xF330, AVX512BW|AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
--vpmovwb, 0xF330, AVX512BW|AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-+vpmovwb, 0xF330, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-+vpmovwb, 0xF330, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-
- vpmovsxbw, 0x6620, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
--vpmovsxbw, 0x6620, AVX512BW|AVX512VL, Modrm|EVex=2|Masking|VexWIG|Space0F38|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
--vpmovsxbw, 0x6620, AVX512BW|AVX512VL, Modrm|EVex=3|Masking|VexWIG|Space0F38|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-+vpmovsxbw, 0x6620, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|VexWIG|Space0F38|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-+vpmovsxbw, 0x6620, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|VexWIG|Space0F38|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
- vpmovzxbw, 0x6630, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
--vpmovzxbw, 0x6630, AVX512BW|AVX512VL, Modrm|EVex=2|Masking|VexWIG|Space0F38|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
--vpmovzxbw, 0x6630, AVX512BW|AVX512VL, Modrm|EVex=3|Masking|VexWIG|Space0F38|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-+vpmovzxbw, 0x6630, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|VexWIG|Space0F38|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-+vpmovzxbw, 0x6630, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|VexWIG|Space0F38|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-
- vpsadbw, 0x66F6, AVX512BW, Modrm|Space0F|VexVVVV|VexWIG|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-
-@@ -2738,36 +2793,36 @@ vcvtpd2qq, 0x667B, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL|
- vcvtpd2uqq, 0x6679, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-
- vcvtps2qq, 0x667B, AVX512DQ, Modrm|EVex512|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegZMM }
--vcvtps2qq, 0x667B, AVX512DQ|AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtps2qq, 0x667B, AVX512DQ|AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+vcvtps2qq, 0x667B, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtps2qq, 0x667B, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
- vcvtps2uqq, 0x6679, AVX512DQ, Modrm|EVex512|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegZMM }
--vcvtps2uqq, 0x6679, AVX512DQ|AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtps2uqq, 0x6679, AVX512DQ|AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+vcvtps2uqq, 0x6679, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtps2uqq, 0x6679, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-
- vcvtqq2pd, 0xF3E6, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vcvtuqq2pd, 0xF37A, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-
--vcvtqq2ps<Exy>, 0x5b, AVX512DQ|<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-+vcvtqq2ps<Exy>, 0x5b, AVX512DQ&<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-
- vcvttpd2qq, 0x667A, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vcvttpd2uqq, 0x6678, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-
- vcvttps2qq, 0x667A, AVX512DQ, Modrm|EVex512|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegZMM }
--vcvttps2qq, 0x667A, AVX512DQ|AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--vcvttps2qq, 0x667A, AVX512DQ|AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+vcvttps2qq, 0x667A, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvttps2qq, 0x667A, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
- vcvttps2uqq, 0x6678, AVX512DQ, Modrm|EVex512|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegZMM }
--vcvttps2uqq, 0x6678, AVX512DQ|AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
--vcvttps2uqq, 0x6678, AVX512DQ|AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-+vcvttps2uqq, 0x6678, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvttps2uqq, 0x6678, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-
--vcvtuqq2ps<Exy>, 0xf27a, AVX512DQ|<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-+vcvtuqq2ps<Exy>, 0xf27a, AVX512DQ&<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
-
- vextractf32x8, 0x661B, AVX512DQ, Modrm|EVex=1|Masking|Space0F3A|VexW=1|Disp8MemShift=5|NoSuf, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
- vextracti32x8, 0x663B, AVX512DQ, Modrm|EVex=1|Masking|Space0F3A|VexW=1|Disp8MemShift=5|NoSuf, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
- vinsertf32x8, 0x661A, AVX512DQ, Modrm|EVex512|Masking|Space0F3A|VexVVVV|VexW0|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
- vinserti32x8, 0x663A, AVX512DQ, Modrm|EVex512|Masking|Space0F3A|VexVVVV|VexW0|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
-
--vpextr<dq>, 0x6616, AVX512DQ|<dq:cpu64>, Modrm|EVex128|Space0F3A|<dq:vexw64>|Disp8MemShift|NoSuf, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
--vpinsr<dq>, 0x6622, AVX512DQ|<dq:cpu64>, Modrm|EVex128|Space0F3A|VexVVVV|<dq:vexw64>|Disp8MemShift|NoSuf, { Imm8, <dq:gpr>|Unspecified|BaseIndex, RegXMM, RegXMM }
-+vpextr<dq>, 0x6616, AVX512DQ&<dq:cpu64>, Modrm|EVex128|Space0F3A|<dq:vexw64>|Disp8MemShift|NoSuf, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
-+vpinsr<dq>, 0x6622, AVX512DQ&<dq:cpu64>, Modrm|EVex128|Space0F3A|VexVVVV|<dq:vexw64>|Disp8MemShift|NoSuf, { Imm8, <dq:gpr>|Unspecified|BaseIndex, RegXMM, RegXMM }
-
- vextractf64x2, 0x6619, AVX512DQ, Modrm|Masking|Space0F3A|VexW=2|Disp8MemShift=4|NoSuf, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
- vextracti64x2, 0x6639, AVX512DQ, Modrm|Masking|Space0F3A|VexW=2|Disp8MemShift=4|NoSuf, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
-@@ -2777,8 +2832,8 @@ vinserti64x2, 0x6638, AVX512DQ, Modrm|Masking|Space0F3A|VexVVVV|VexW1|Disp8MemSh
- vfpclassp<sd>, 0x6666, AVX512DQ, Modrm|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8ShiftVL|NoSuf|IntelSyntax, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
- vfpclassp<sd>, 0x6666, AVX512DQ, Modrm|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8ShiftVL|NoSuf|ATTSyntax, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|<sd:elem>|BaseIndex, RegMask }
- vfpclassp<sd>z, 0x6666, AVX512DQ, Modrm|EVex512|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8MemShift=6|NoSuf, { Imm8|Imm8S, RegZMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
--vfpclassp<sd>x, 0x6666, AVX512DQ|AVX512VL, Modrm|EVex128|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8MemShift=4|NoSuf, { Imm8|Imm8S, RegXMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
--vfpclassp<sd>y, 0x6666, AVX512DQ|AVX512VL, Modrm|EVex256|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8MemShift=5|NoSuf, { Imm8|Imm8S, RegYMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
-+vfpclassp<sd>x, 0x6666, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8MemShift=4|NoSuf, { Imm8|Imm8S, RegXMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
-+vfpclassp<sd>y, 0x6666, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8MemShift=5|NoSuf, { Imm8|Imm8S, RegYMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
- vfpclasss<sdh>, 0x<sdh:pfx>67, <sdh:cpudq>, Modrm|EVexLIG|Masking|Space0F3A|<sdh:vexw>|Disp8MemShift|NoSuf, { Imm8|Imm8S, RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegMask }
-
- vpmov<dq>2m, 0xf339, AVX512DQ, Modrm|EVexDYN|Space0F38|<dq:vexw>|NoSuf, { RegXMM|RegYMM|RegZMM, RegMask }
-@@ -2916,8 +2971,8 @@ vpshufbitqmb, 0x668f, AVX512_BITALG, Modrm|Masking|Space0F38|VexVVVV|VexW0|Disp8
-
- // AVX512 + GFNI instructions
-
--vgf2p8affineinvqb, 0x66cf, GFNI|AVX512F, Modrm|Masking|Space0F3A|VexVVVV|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
--vgf2p8affineqb, 0x66ce, GFNI|AVX512F, Modrm|Masking|Space0F3A|VexVVVV|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vgf2p8affineinvqb, 0x66cf, GFNI&AVX512F, Modrm|Masking|Space0F3A|VexVVVV|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-+vgf2p8affineqb, 0x66ce, GFNI&AVX512F, Modrm|Masking|Space0F3A|VexVVVV|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-
- // AVX512 + GFNI instructions end
-
-@@ -2946,7 +3001,7 @@ clzero, 0xf01fc, CLZERO, AddrPrefixOpReg|NoSuf, { Acc|Word|Dword|Qword }
- monitorx, 0xf01fa, MWAITX, NoSuf, {}
- monitorx, 0xf01fa, MWAITX, AddrPrefixOpReg|NoSuf, { Acc|Word|Dword|Qword, RegC|Dword, RegD|Dword }
- // The 64-bit form exists only for compatibility with older gas.
--monitorx, 0xf01fa, MWAITX|x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
-+monitorx, 0xf01fa, MWAITX&x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
-
- mwaitx, 0xf01fb, MWAITX, NoSuf, {}
- // The 64-bit form exists only for compatibility with older gas.
-@@ -2963,30 +3018,34 @@ wrpkru, 0xf01ef, OSPKE, NoSuf, {}
-
- // RDPID instructions.
-
--rdpid, 0xf30fc7/7, RDPID|No64, Modrm|IgnoreSize|NoSuf, { Reg32 }
--rdpid, 0xf30fc7/7, RDPID|x64, Modrm|NoSuf|NoRex64, { Reg64 }
-+rdpid, 0xf30fc7/7, RDPID&No64, Modrm|IgnoreSize|NoSuf, { Reg32 }
-+rdpid, 0xf30fc7/7, RDPID&x64, Modrm|NoSuf|NoRex64, { Reg64 }
-
- // RDPID instructions end.
-
- // PTWRITE instructions.
-
--ptwrite, 0xf30fae/4, PTWRITE|No64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Unspecified|BaseIndex }
--ptwrite, 0xf30fae/4, PTWRITE|x64, Modrm|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex }
-+ptwrite, 0xf30fae/4, PTWRITE&No64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex }
-+ptwrite, 0xf30fae/4, PTWRITE&x64, Modrm|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex }
-
- // PTWRITE instructions end.
-
- // CET instructions.
-
- incsspd, 0xf30fae/5, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32 }
--incsspq, 0xf30fae/5, SHSTK|x64, Modrm|NoSuf, { Reg64 }
-+incsspq, 0xf30fae/5, SHSTK&x64, Modrm|NoSuf, { Reg64 }
- rdsspd, 0xf30f1e/1, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32 }
--rdsspq, 0xf30f1e/1, SHSTK|x64, Modrm|NoSuf, { Reg64 }
-+rdsspq, 0xf30f1e/1, SHSTK&x64, Modrm|NoSuf, { Reg64 }
- saveprevssp, 0xf30f01ea, SHSTK, NoSuf, {}
- rstorssp, 0xf30f01/5, SHSTK, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
- wrssd, 0x0f38f6, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
--wrssq, 0x0f38f6, SHSTK|x64, Modrm|NoSuf|Size64, { Reg64, Qword|Unspecified|BaseIndex }
-+wrssd, 0x66, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
-+wrssq, 0x0f38f6, SHSTK&x64, Modrm|NoSuf, { Reg64, Qword|Unspecified|BaseIndex }
-+wrssq, 0x66, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
- wrussd, 0x660f38f5, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
--wrussq, 0x660f38f5, SHSTK|x64, Modrm|NoSuf, { Reg64, Qword|Unspecified|BaseIndex }
-+wrussd, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
-+wrussq, 0x660f38f5, SHSTK&x64, Modrm|NoSuf, { Reg64, Qword|Unspecified|BaseIndex }
-+wrussq, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
- setssbsy, 0xf30f01e8, SHSTK, NoSuf, {}
- clrssbsy, 0xf30fae/6, SHSTK, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
- endbr64, 0xf30f1efa, IBT, NoSuf, {}
-@@ -3011,7 +3070,7 @@ pconfig, 0x0f01c5, PCONFIG, NoSuf, {}
-
- // PBNDKB instruction.
-
--pbndkb, 0x0f01c7, PBNDKB|x64, NoSuf, {}
-+pbndkb, 0x0f01c7, PBNDKB, NoSuf, {}
-
- // PBNDKB instruction end.
-
-@@ -3034,7 +3093,9 @@ cldemote, 0x0f1c/0, CLDEMOTE, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex }
- // MOVDIR[I,64B] instructions.
-
- movdiri, 0xf38f9, MOVDIRI, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
- movdir64b, 0x660f38f8, MOVDIR64B, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+movdir64b, 0x66f8, MOVDIR64B&APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 }
-
- // MOVEDIR instructions end.
-
-@@ -3042,7 +3103,7 @@ movdir64b, 0x660f38f8, MOVDIR64B, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|Bas
-
- vcvtne2ps2bf16, 0xf272, AVX512_BF16, Modrm|Space0F38|VexVVVV|Masking|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-
--vcvtneps2bf16<Exy>, 0xf372, AVX512_BF16|<Exy:vl>, Modrm|Space0F38|<Exy:attr>|Masking|VexW0|Broadcast|NoSuf, { <Exy:src>|Dword, <Exy:dst> }
-+vcvtneps2bf16<Exy>, 0xf372, AVX512_BF16&<Exy:vl>, Modrm|Space0F38|<Exy:attr>|Masking|VexW0|Broadcast|NoSuf, { <Exy:src>|Dword, <Exy:dst> }
-
- vdpbf16ps, 0xf352, AVX512_BF16, Modrm|Space0F38|VexVVVV|Masking|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-
-@@ -3063,7 +3124,9 @@ vcvtneps2bf16<Vxy>, 0xf372, AVX_NE_CONVERT, Modrm|<Vxy:vex>|Space0F38|VexW0|NoSu
- // ENQCMD instructions.
-
- enqcmd, 0xf20f38f8, ENQCMD, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+enqcmd, 0xf2f8, APX_F(ENQCMD), Modrm|AddrPrefixOpReg|NoSuf|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 }
- enqcmds, 0xf30f38f8, ENQCMD, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-+enqcmds, 0xf3f8, APX_F(ENQCMD), Modrm|AddrPrefixOpReg|NoSuf|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 }
-
- // ENQCMD instructions end.
-
-@@ -3081,25 +3144,25 @@ mcommit, 0xf30f01fa, MCOMMIT, NoSuf, {}
-
- // SNP instructions
-
--psmash, 0xf30f01ff, SNP|x64, NoSuf, {}
--psmash, 0xf30f01ff, SNP|x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword }
-+psmash, 0xf30f01ff, SNP&x64, NoSuf, {}
-+psmash, 0xf30f01ff, SNP&x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword }
- pvalidate, 0xf20f01ff, SNP, NoSuf, {}
- pvalidate, 0xf20f01ff, SNP, AddrPrefixOpReg|NoSuf, { Acc|Word|Dword|Qword, RegC|Dword, RegD|Dword }
--rmpupdate, 0xf20f01fe, SNP|x64, NoSuf, {}
--rmpupdate, 0xf20f01fe, SNP|x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword }
--rmpadjust, 0xf30f01fe, SNP|x64, NoSuf, {}
--rmpadjust, 0xf30f01fe, SNP|x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
-+rmpupdate, 0xf20f01fe, SNP&x64, NoSuf, {}
-+rmpupdate, 0xf20f01fe, SNP&x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword }
-+rmpadjust, 0xf30f01fe, SNP&x64, NoSuf, {}
-+rmpadjust, 0xf30f01fe, SNP&x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
- // The single-operand forms exist only for compatibility with older gas.
- pvalidate, 0xf20f01ff, SNP, AddrPrefixOpReg|NoSuf, { Acc|Word|Dword|Qword }
--rmpupdate, 0xf20f01fe, SNP|x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword }
--rmpadjust, 0xf30f01fe, SNP|x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword }
-+rmpupdate, 0xf20f01fe, SNP&x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword }
-+rmpadjust, 0xf30f01fe, SNP&x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword }
-
- // SNP instructions end
-
- // RMPQUERY instruction
-
--rmpquery, 0xf30f01fd, RMPQUERY|x64, NoSuf, {}
--rmpquery, 0xf30f01fd, RMPQUERY|x64, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
-+rmpquery, 0xf30f01fd, RMPQUERY, NoSuf, {}
-+rmpquery, 0xf30f01fd, RMPQUERY, AddrPrefixOpReg|NoSuf, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
-
- // RMPQUERY instruction end
-
-@@ -3124,26 +3187,26 @@ xresldtrk, 0xf20f01e9, TSXLDTRK, NoSuf, {}
-
- // AMX instructions.
-
--ldtilecfg, 0x49/0, AMX_TILE|x64, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex }
--sttilecfg, 0x6649/0, AMX_TILE|x64, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex }
-+ldtilecfg, 0x49/0, APX_F(AMX_TILE), Modrm|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex }
-+sttilecfg, 0x6649/0, APX_F(AMX_TILE), Modrm|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex }
-
--tcmmimfp16ps, 0x666c, AMX_COMPLEX|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
--tcmmrlfp16ps, 0x6c, AMX_COMPLEX|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-+tcmmimfp16ps, 0x666c, AMX_COMPLEX, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-+tcmmrlfp16ps, 0x6c, AMX_COMPLEX, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-
--tdpbf16ps, 0xf35c, AMX_BF16|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
--tdpfp16ps, 0xf25c, AMX_FP16|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
--tdpbssd, 0xf25e, AMX_INT8|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
--tdpbuud, 0x5e, AMX_INT8|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
--tdpbusd, 0x665e, AMX_INT8|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
--tdpbsud, 0xf35e, AMX_INT8|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-+tdpbf16ps, 0xf35c, AMX_BF16, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-+tdpfp16ps, 0xf25c, AMX_FP16, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-+tdpbssd, 0xf25e, AMX_INT8, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-+tdpbuud, 0x5e, AMX_INT8, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-+tdpbusd, 0x665e, AMX_INT8, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-+tdpbsud, 0xf35e, AMX_INT8, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM }
-
--tileloadd, 0xf24b, AMX_TILE|x64, Sibmem|Vex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM }
--tileloaddt1, 0x664b, AMX_TILE|x64, Sibmem|Vex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM }
--tilestored, 0xf34b, AMX_TILE|x64, Sibmem|Vex128|Space0F38|VexW0|NoSuf, { RegTMM, Unspecified|BaseIndex }
-+tileloadd, 0xf24b, APX_F(AMX_TILE), Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM }
-+tileloaddt1, 0x664b, APX_F(AMX_TILE), Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM }
-+tilestored, 0xf34b, APX_F(AMX_TILE), Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf, { RegTMM, Unspecified|BaseIndex }
-
--tilerelease, 0x49c0, AMX_TILE|x64, Vex128|Space0F38|VexW0|NoSuf, {}
-+tilerelease, 0x49c0, AMX_TILE, Vex128|Space0F38|VexW0|NoSuf, {}
-
--tilezero, 0xf249, AMX_TILE|x64, Modrm|Vex128|Space0F38|VexW0|NoSuf, { RegTMM }
-+tilezero, 0xf249, AMX_TILE, Modrm|Vex128|Space0F38|VexW0|NoSuf, { RegTMM }
-
- // AMX instructions end.
-
-@@ -3166,19 +3229,19 @@ aesdecwide256kl, 0xf30f38d8/3, WideKL, Modrm|NoSuf, { Unspecified|BaseIndex }
- // TDX instructions.
-
- tdcall, 0x660f01cc, TDX, NoSuf, {}
--seamret, 0x660f01cd, TDX|x64, NoSuf, {}
--seamops, 0x660f01ce, TDX|x64, NoSuf, {}
--seamcall, 0x660f01cf, TDX|x64, NoSuf, {}
-+seamret, 0x660f01cd, TDX&x64, NoSuf, {}
-+seamops, 0x660f01ce, TDX&x64, NoSuf, {}
-+seamcall, 0x660f01cf, TDX&x64, NoSuf, {}
-
- // TDX instructions end.
-
- // UINTR instructions.
-
--uiret, 0xf30f01ec, UINTR|x64, NoSuf, {}
--clui, 0xf30f01ee, UINTR|x64, NoSuf, {}
--stui, 0xf30f01ef, UINTR|x64, NoSuf, {}
--testui, 0xf30f01ed, UINTR|x64, NoSuf, {}
--senduipi, 0xf30fc7/6, UINTR|x64, Modrm|NoSuf|NoRex64, { Reg64 }
-+uiret, 0xf30f01ec, UINTR, NoSuf, {}
-+clui, 0xf30f01ee, UINTR, NoSuf, {}
-+stui, 0xf30f01ef, UINTR, NoSuf, {}
-+testui, 0xf30f01ed, UINTR, NoSuf, {}
-+senduipi, 0xf30fc7/6, UINTR, Modrm|NoSuf|NoRex64, { Reg64 }
-
- // UINTR instructions end.
-
-@@ -3208,37 +3271,37 @@ vcmpph, 0xc2, AVX512_FP16, Modrm|Masking|Space0F3A|VexVVVV|VexW0|Broadcast|Disp8
- vcmp<frel>sh, 0xf3c2/0x<frel:imm>, AVX512_FP16, Modrm|EVexLIG|Masking|Space0F3A|VexVVVV|VexW0|Disp8MemShift=1|NoSuf|ImmExt|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegMask }
- vcmpsh, 0xf3c2, AVX512_FP16, Modrm|EVexLIG|Masking|Space0F3A|VexVVVV|VexW0|Disp8MemShift=1|NoSuf|SAE, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegMask }
-
--vcvtdq2ph<Exy>, 0x5b, AVX512_FP16|<Exy:vl>, Modrm|<Exy:attr>|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Dword, <Exy:dst> }
--vcvtudq2ph<Exy>, 0xf27a, AVX512_FP16|<Exy:vl>, Modrm|<Exy:attr>|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Dword, <Exy:dst> }
-+vcvtdq2ph<Exy>, 0x5b, AVX512_FP16&<Exy:vl>, Modrm|<Exy:attr>|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Dword, <Exy:dst> }
-+vcvtudq2ph<Exy>, 0xf27a, AVX512_FP16&<Exy:vl>, Modrm|<Exy:attr>|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Dword, <Exy:dst> }
-
--vcvtqq2ph<xyz>, 0x5b, AVX512_FP16|<xyz:vl>, Modrm|<xyz:attr>|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<xyz:sr>|<xyz:att>, { <xyz:src>|Qword, RegXMM }
--vcvtuqq2ph<xyz>, 0xf27a, AVX512_FP16|<xyz:vl>, Modrm|<xyz:attr>|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<xyz:sr>|<xyz:att>, { <xyz:src>|Qword, RegXMM }
-+vcvtqq2ph<xyz>, 0x5b, AVX512_FP16&<xyz:vl>, Modrm|<xyz:attr>|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<xyz:sr>|<xyz:att>, { <xyz:src>|Qword, RegXMM }
-+vcvtuqq2ph<xyz>, 0xf27a, AVX512_FP16&<xyz:vl>, Modrm|<xyz:attr>|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<xyz:sr>|<xyz:att>, { <xyz:src>|Qword, RegXMM }
-
--vcvtpd2ph<xyz>, 0x665a, AVX512_FP16|<xyz:vl>, Modrm|<xyz:attr>|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<xyz:sr>|<xyz:att>, { <xyz:src>|Qword, RegXMM }
-+vcvtpd2ph<xyz>, 0x665a, AVX512_FP16&<xyz:vl>, Modrm|<xyz:attr>|Masking|EVexMap5|VexW1|Broadcast|NoSuf|<xyz:sr>|<xyz:att>, { <xyz:src>|Qword, RegXMM }
-
--vcvtps2phx<Exy>, 0x661d, AVX512_FP16|<Exy:vl>, Modrm|<Exy:attr>|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Dword, <Exy:dst> }
-+vcvtps2phx<Exy>, 0x661d, AVX512_FP16&<Exy:vl>, Modrm|<Exy:attr>|Masking|EVexMap5|VexW0|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Dword, <Exy:dst> }
-
- vcvtw2ph, 0xf37d, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
- vcvtuw2ph, 0xf27d, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-
--vcvtph2dq, 0x665b, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtph2dq, 0x665b, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
-+vcvtph2dq, 0x665b, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtph2dq, 0x665b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
- vcvtph2dq, 0x665b, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
-
--vcvtph2udq, 0x79, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtph2udq, 0x79, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
-+vcvtph2udq, 0x79, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtph2udq, 0x79, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
- vcvtph2udq, 0x79, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
-
--vcvtph2qq, 0x667b, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
--vcvtph2qq, 0x667b, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
-+vcvtph2qq, 0x667b, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-+vcvtph2qq, 0x667b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
- vcvtph2qq, 0x667b, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
-
--vcvtph2uqq, 0x6679, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
--vcvtph2uqq, 0x6679, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
-+vcvtph2uqq, 0x6679, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-+vcvtph2uqq, 0x6679, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
- vcvtph2uqq, 0x6679, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
-
--vcvtph2pd, 0x5a, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
--vcvtph2pd, 0x5a, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
-+vcvtph2pd, 0x5a, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-+vcvtph2pd, 0x5a, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
- vcvtph2pd, 0x5a, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
-
- vcvtph2w, 0x667d, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-@@ -3258,24 +3321,24 @@ vcvtsh2ss, 0x13, AVX512_FP16, Modrm|EVexLIG|Masking|EVexMap6|VexVVVV|VexW0|Disp8
-
- vcvtsh2si, 0xf32d, AVX512_FP16, Modrm|EVexLIG|EVexMap5|Disp8MemShift=1|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, Reg32|Reg64 }
-
--vcvttph2dq, 0xf35b, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
--vcvttph2dq, 0xf35b, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
-+vcvttph2dq, 0xf35b, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvttph2dq, 0xf35b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
- vcvttph2dq, 0xf35b, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
-
--vcvttph2udq, 0x78, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
--vcvttph2udq, 0x78, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
-+vcvttph2udq, 0x78, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvttph2udq, 0x78, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
- vcvttph2udq, 0x78, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
-
--vcvttph2qq, 0x667a, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
--vcvttph2qq, 0x667a, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
-+vcvttph2qq, 0x667a, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-+vcvttph2qq, 0x667a, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
- vcvttph2qq, 0x667a, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
-
--vcvttph2uqq, 0x6678, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
--vcvttph2uqq, 0x6678, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
-+vcvttph2uqq, 0x6678, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-+vcvttph2uqq, 0x6678, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
- vcvttph2uqq, 0x6678, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
-
--vcvtph2psx, 0x6613, AVX512_FP16|AVX512VL, Modrm|EVex128|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
--vcvtph2psx, 0x6613, AVX512_FP16|AVX512VL, Modrm|EVex256|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
-+vcvtph2psx, 0x6613, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-+vcvtph2psx, 0x6613, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
- vcvtph2psx, 0x6613, AVX512_FP16, Modrm|EVex512|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
-
- vcvttph2w, 0x667c, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-@@ -3283,7 +3346,7 @@ vcvttph2uw, 0x7c, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8Shift
-
- vcvttsh2si, 0xf32c, AVX512_FP16, Modrm|EVexLIG|EVexMap5|Disp8MemShift=1|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, Reg32|Reg64 }
-
--vfpclassph<xyz>, 0x66, AVX512_FP16|<xyz:vl>, Modrm|<xyz:attr>|Masking|Space0F3A|VexW0|Broadcast|NoSuf|<xyz:att>, { Imm8|Imm8S, <xyz:src>|Word, RegMask }
-+vfpclassph<xyz>, 0x66, AVX512_FP16&<xyz:vl>, Modrm|<xyz:attr>|Masking|Space0F3A|VexW0|Broadcast|NoSuf|<xyz:att>, { Imm8|Imm8S, <xyz:src>|Word, RegMask }
-
- vmovw, 0x666e, AVX512_FP16, D|Modrm|EVex128|VexWIG|EVexMap5|Disp8MemShift=1|NoSuf, { Word|Unspecified|BaseIndex, RegXMM }
- vmovw, 0x667e, AVX512_FP16, D|RegMem|EVex128|VexWIG|EVexMap5|NoSuf, { RegXMM, Reg32 }
-@@ -3300,14 +3363,14 @@ vrsqrtsh, 0x664f, AVX512_FP16, Modrm|EVexLIG|Masking|EVexMap6|VexVVVV|VexW0|Disp
-
- // PREFETCHI instructions.
-
--prefetchit0, 0xf18/7, PREFETCHI|x64, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex }
--prefetchit1, 0xf18/6, PREFETCHI|x64, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex }
-+prefetchit0, 0xf18/7, PREFETCHI, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex }
-+prefetchit1, 0xf18/6, PREFETCHI, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex }
-
- // PREFETCHI instructions end.
-
- // CMPCCXADD instructions.
-
--cmp<cc>xadd, 0x66e<cc:opc>, CMPCCXADD|x64, Modrm|Vex|Space0F38|VexVVVV|SwapSources|CheckOperandSize|NoSuf, { Reg32|Reg64, Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+cmp<cc>xadd, 0x66e<cc:opc>, APX_F(CMPCCXADD), Modrm|Vex|EVex128|Space0F38|VexVVVV|SwapSources|CheckOperandSize|NoSuf, { Reg32|Reg64, Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-
- // CMPCCXADD instructions end.
-
-@@ -3319,30 +3382,52 @@ wrmsrns, 0x0f01c6, WRMSRNS, NoSuf, {}
-
- // MSRLIST instructions.
-
--rdmsrlist, 0xf20f01c6, MSRLIST|x64, NoSuf, {}
--wrmsrlist, 0xf30f01c6, MSRLIST|x64, NoSuf, {}
-+rdmsrlist, 0xf20f01c6, MSRLIST, NoSuf, {}
-+wrmsrlist, 0xf30f01c6, MSRLIST, NoSuf, {}
-
- // MSRLIST instructions end.
-
- // RAO-INT instructions.
-
--aadd, 0xf38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
--aand, 0x660f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
--aor, 0xf20f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
--axor, 0xf30f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+<rao:pfx, add:, and:66, or:f2, xor:f3>
-+a<rao>, 0x<rao:pfx>0f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+a<rao>, 0x<rao:pfx>fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-+<rao>
-
- // RAO-INT instructions end.
-
- // LKGS instruction.
-
--lkgs, 0xf20f00/6, LKGS|x64, Modrm|IgnoreSize|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64 }
--lkgs, 0xf20f00/6, LKGS|x64, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { Word|Unspecified|BaseIndex }
-+lkgs, 0xf20f00/6, LKGS, Modrm|IgnoreSize|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64 }
-+lkgs, 0xf20f00/6, LKGS, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { Word|Unspecified|BaseIndex }
-
- // LKGS instruction end.
-
- // FRED instructions.
-
--erets, 0xf20f01ca, FRED|x64, NoSuf, {}
--eretu, 0xf30f01ca, FRED|x64, NoSuf, {}
-+erets, 0xf20f01ca, FRED, NoSuf, {}
-+eretu, 0xf30f01ca, FRED, NoSuf, {}
-
- // FRED instructions end.
-+
-+// USER_MSR instructions.
-+
-+urdmsr, 0xf20f38f8, USER_MSR, RegMem|NoSuf|NoRex64, { Reg64, Reg64 }
-+urdmsr, 0xf2f8, USER_MSR&APX_F, RegMem|EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
-+urdmsr, 0xf2f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
-+uwrmsr, 0xf30f38f8, USER_MSR, Modrm|NoSuf|NoRex64, { Reg64, Reg64 }
-+uwrmsr, 0xf3f8, USER_MSR&APX_F, Modrm|EVexMap4|VexW0|NoSuf, { Reg64, Reg64 }
-+// Immediates want to be first; md_assemble() takes care of swapping operands
-+// accordingly.
-+uwrmsr, 0xf3f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 }
-+
-+// USER_MSR instructions end.
-+
-+// APX Push2/Pop2 instructions.
-+
-+push2, 0xff/6, APX_F, Modrm|VexW0|EVexMap4|VexVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
-+push2p, 0xff/6, APX_F, Modrm|VexW1|EVexMap4|VexVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
-+pop2, 0x8f/0, APX_F, Modrm|VexW0|EVexMap4|VexVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
-+pop2p, 0x8f/0, APX_F, Modrm|VexW1|EVexMap4|VexVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
-+
-+// APX Push2/Pop2 instructions end.
diff --git a/gdb-rhel2295897-pre-read-DWZ-file-in-DWARF-reader.patch b/gdb-rhel2295897-pre-read-DWZ-file-in-DWARF-reader.patch
deleted file mode 100644
index a212228..0000000
--- a/gdb-rhel2295897-pre-read-DWZ-file-in-DWARF-reader.patch
+++ /dev/null
@@ -1,149 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Tom Tromey <tom@tromey.com>
-Date: Mon, 23 Oct 2023 16:44:53 -0600
-Subject: gdb-rhel2295897-pre-read-DWZ-file-in-DWARF-reader.patch
-
-;; backport of upstream commit 91874afabcd
-;; This (somehow) solves a double-free when reading minimal symbols
-
-Pre-read DWZ file in DWARF reader
-
-While working on background reading of DWARF, I came across the
-DWZ-reading code. This code can query the user (via the debuginfod
-support) -- something that cannot be done off the main thread.
-
-Looking into it, I realized that this code can be run much earlier,
-avoiding this problem. Digging a bit deeper, I also found a
-discrepancy here between how the DWARF reader works in "readnow" mode
-as compared to the normal modes.
-
-This patch cleans this up by trying to read the DWZ file earlier, and
-also by having the DWARF reader convert any exception here into a
-warning. This unifies the various cases, but also makes it so that
-errors do not prevent gdb from continuing on to the extent possible.
-
-Regression tested on x86-64 Fedora 38.
-
-diff --git a/gdb/dwarf2/dwz.c b/gdb/dwarf2/dwz.c
---- a/gdb/dwarf2/dwz.c
-+++ b/gdb/dwarf2/dwz.c
-@@ -29,6 +29,7 @@
- #include "gdbcore.h"
- #include "gdbsupport/pathstuff.h"
- #include "gdbsupport/scoped_fd.h"
-+#include "run-on-main-thread.h"
-
- const char *
- dwz_file::read_string (struct objfile *objfile, LONGEST str_offset)
-@@ -196,8 +197,20 @@ dwarf2_get_dwz_file (dwarf2_per_bfd *per_bfd, bool require)
- size_t buildid_len;
- bfd_byte *buildid;
-
-- if (per_bfd->dwz_file != NULL)
-- return per_bfd->dwz_file.get ();
-+ if (per_bfd->dwz_file.has_value ())
-+ {
-+ dwz_file *result = per_bfd->dwz_file->get ();
-+ if (require && result == nullptr)
-+ error (_("could not read '.gnu_debugaltlink' section"));
-+ return result;
-+ }
-+
-+ /* This may query the user via the debuginfod support, so it may
-+ only be run in the main thread. */
-+ gdb_assert (is_main_thread ());
-+
-+ /* Set this early, so that on error it remains NULL. */
-+ per_bfd->dwz_file.emplace (nullptr);
-
- bfd_set_error (bfd_error_no_error);
- gdb::unique_xmalloc_ptr<char> data
-@@ -283,5 +296,5 @@ dwarf2_get_dwz_file (dwarf2_per_bfd *per_bfd, bool require)
-
- gdb_bfd_record_inclusion (per_bfd->obfd, result->dwz_bfd.get ());
- per_bfd->dwz_file = std::move (result);
-- return per_bfd->dwz_file.get ();
-+ return per_bfd->dwz_file->get ();
- }
-diff --git a/gdb/dwarf2/read.c b/gdb/dwarf2/read.c
---- a/gdb/dwarf2/read.c
-+++ b/gdb/dwarf2/read.c
-@@ -3387,6 +3387,17 @@ dwarf2_initialize_objfile (struct objfile *objfile)
-
- dwarf_read_debug_printf ("called");
-
-+ /* Try to fetch any potential dwz file early, while still on the
-+ main thread. */
-+ try
-+ {
-+ dwarf2_get_dwz_file (per_bfd);
-+ }
-+ catch (const gdb_exception_error &err)
-+ {
-+ warning (_("%s"), err.what ());
-+ }
-+
- /* If we're about to read full symbols, don't bother with the
- indices. In this case we also don't care if some other debug
- format is making psymtabs, because they are all about to be
-@@ -5294,16 +5305,7 @@ create_all_units (dwarf2_per_objfile *per_objfile)
- &per_objfile->per_bfd->abbrev, 0,
- types_htab, rcuh_kind::TYPE);
-
-- dwz_file *dwz;
-- try
-- {
-- dwz = dwarf2_get_dwz_file (per_objfile->per_bfd);
-- }
-- catch (const gdb_exception_error &)
-- {
-- per_objfile->per_bfd->all_units.clear ();
-- throw;
-- }
-+ dwz_file *dwz = dwarf2_get_dwz_file (per_objfile->per_bfd);
- if (dwz != NULL)
- {
- /* Pre-read the sections we'll need to construct an index. */
-diff --git a/gdb/dwarf2/read.h b/gdb/dwarf2/read.h
---- a/gdb/dwarf2/read.h
-+++ b/gdb/dwarf2/read.h
-@@ -520,7 +520,7 @@ struct dwarf2_per_bfd
-
- /* The shared '.dwz' file, if one exists. This is used when the
- original data was compressed using 'dwz -m'. */
-- std::unique_ptr<struct dwz_file> dwz_file;
-+ gdb::optional<std::unique_ptr<struct dwz_file>> dwz_file;
-
- /* Whether copy relocations are supported by this object format. */
- bool can_copy;
-diff --git a/gdb/testsuite/gdb.dwarf2/dwzbuildid.exp b/gdb/testsuite/gdb.dwarf2/dwzbuildid.exp
---- a/gdb/testsuite/gdb.dwarf2/dwzbuildid.exp
-+++ b/gdb/testsuite/gdb.dwarf2/dwzbuildid.exp
-@@ -142,13 +142,6 @@ proc do_test {} {
-
- gdb_load ${::binfile}-${::testname}
-
-- if { $::testname == "mismatch" && [readnow] } {
-- # Main is found in the minimal symbols. When using readnow, a
-- # failure to read the dwarf also causes the minimal symbols to be
-- # unavailable.
-- # Setup a kfail for "FAIL: gdb_breakpoint: set breakpoint at main".
-- setup_kfail "symtab/26797" *-*-*
-- }
- if {![runto_main]} {
- return
- }
-diff --git a/gdb/testsuite/gdb.dwarf2/no-gnu-debuglink.exp b/gdb/testsuite/gdb.dwarf2/no-gnu-debuglink.exp
---- a/gdb/testsuite/gdb.dwarf2/no-gnu-debuglink.exp
-+++ b/gdb/testsuite/gdb.dwarf2/no-gnu-debuglink.exp
-@@ -37,8 +37,8 @@ if { [build_executable $testfile.exp $testfile [list $srcfile $asm_file]] } {
-
- clean_restart
-
--set msg "\r\ncould not find '\.gnu_debugaltlink' file for \[^\r\n\]*"
-+set msg "\r\nwarning: could not find '\.gnu_debugaltlink' file for \[^\r\n\]*"
- gdb_test "file $binfile" "$msg" "file command"
-
- set question "Load new symbol table from .*\? .y or n. "
--gdb_test "file $binfile" "$msg" "file command, again" $question "y"
-+gdb_test "file $binfile" "" "file command, again" $question "y"
diff --git a/gdb-sync-coffread-with-elfread.patch b/gdb-sync-coffread-with-elfread.patch
deleted file mode 100644
index 92c9e6d..0000000
--- a/gdb-sync-coffread-with-elfread.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
-From: Andrew Burgess <aburgess@redhat.com>
-Date: Thu, 12 Oct 2023 19:42:19 +0100
-Subject: gdb-sync-coffread-with-elfread.patch
-
-;; Backport upstream commit 7628a997f27.
-
-gdb/coffread: bring separate debug file logic into line with elfread.c
-
-In this commit:
-
- commit 8a92335bfca80cc9b4cd217505ea0dcbfdefbf07
- Date: Fri Feb 1 19:39:04 2013 +0000
-
-the logic for when we try to load a separate debug file in elfread.c
-was extended. The new code checks that the objfile doesn't already
-have a separate debug objfile linked to it, and that the objfile isn't
-itself a separate debug objfile for some other objfile.
-
-The coffread code wasn't extended at the same time.
-
-I don't know if it's possible for the coffread code to get into the
-same state where these checks are needed, but I don't see why having
-these checks would be a problem. In a later commit I plan to merge
-this part of the elfread and coffread code, so bringing these two
-pieces of code into line first makes that job easier.
-
-I've tested this with a simple test binary compiled with the mingw
-toolchain on a Linux host. After compiling the binary and splitting
-out the debug info GDB still finds and loads the separate debug info.
-
-Approved-By: Tom Tromey <tom@tromey.com>
-
-diff --git a/gdb/coffread.c b/gdb/coffread.c
---- a/gdb/coffread.c
-+++ b/gdb/coffread.c
-@@ -725,7 +725,9 @@ coff_symfile_read (struct objfile *objfile, symfile_add_flags symfile_flags)
- }
-
- /* Try to add separate debug file if no symbols table found. */
-- if (!objfile->has_partial_symbols ())
-+ else if (!objfile->has_partial_symbols ()
-+ && objfile->separate_debug_objfile == NULL
-+ && objfile->separate_debug_objfile_backlink == NULL)
- {
- deferred_warnings warnings;
- std::string debugfile
diff --git a/gdb.spec b/gdb.spec
index 2e5818f..c3f839d 100644
--- a/gdb.spec
+++ b/gdb.spec
@@ -41,11 +41,11 @@ Name: %{?scl_prefix}gdb
# See timestamp of source gnulib installed into gnulib/ .
%global snapgnulib 20220501
%global tarname gdb-%{version}
-Version: 14.2
+Version: 15.1
# The release always contains a leading reserved number, start it at 1.
# `upstream' is not a part of `name' to stay fully rpm dependencies compatible for the testing.
-Release: 15%{?dist}
+Release: 1%{?dist}
License: GPL-3.0-or-later AND BSD-3-Clause AND FSFAP AND LGPL-2.1-or-later AND GPL-2.0-or-later AND LGPL-2.0-or-later AND LicenseRef-Fedora-Public-Domain AND GFDL-1.3-or-later AND LGPL-2.0-or-later WITH GCC-exception-2.0 AND GPL-3.0-or-later WITH GCC-exception-3.1 AND GPL-2.0-or-later WITH GNU-compiler-exception
# Do not provide URL for snapshots as the file lasts there only for 2 days.
@@ -926,6 +926,37 @@ fi
# endif scl
%changelog
+* Wed Jul 24 2024 Alexandra Hájková <ahajkova@redhat.com> - 15.1-1
+- Rebase to FSF GDB 15.1.
+- Update local patches:
+ gdb-6.3-gstack-20050411.patch
+ gdb-6.6-buildid-locate-solib-missing-ids.patch
+ gdb-6.6-buildid-locate.patch
+ gdb-add-missing-debug-ext-lang-hook.patch
+ gdb-add-rpm-suggestion-script.patch
+ gdb-merge-debug-symbol-lookup.patch
+- Dropped:
+ gdb-add-missing-debug-ext-lang-hook.patch
+ gdb-add-missing-debug-info-python-hook.patch
+ gdb-do-not-import-py-curses-ascii-module.patch
+ gdb-ftbs-swapped-calloc-args.patch
+ gdb-handle-no-python-gdb-module.patch
+ gdb-refactor-find-and-add-separate-symbol-file.patch
+ gdb-reformat-missing-debug-py-file.patch
+ gdb-remove-path-in-test-name.patch
+ gdb-remove-use-of-py-isascii
+ gdb-rhbz-2232086-cpp-ify-mapped-symtab.patch
+ gdb-rhbz-2232086-generate-dwarf-5-index-consistently.patch
+ gdb-rhbz-2232086-generate-gdb-index-consistently.patch
+ gdb-rhbz-2232086-reduce-size-of-gdb-index.patch
+ gdb-rhbz2232086-refactor-selftest-support.patch
+ gdb-rhbz2250652-avoid-PyOS_ReadlineTState.patch
+ gdb-rhbz2250652-gdbpy_gil.patch
+ gdb-rhbz2261580-intrusive_list-assertion-fix.patch
+ gdb-rhbz2277160-apx-disasm.patch
+ gdb-rhel2295897-pre-read-DWZ-file-in-DWARF-reader.patch
+ gdb-sync-coffread-with-elfread.patch
+
* Thu Jul 18 2024 Fedora Release Engineering <releng@fedoraproject.org>
- Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild
diff --git a/sources b/sources
index 081568d..9976a77 100644
--- a/sources
+++ b/sources
@@ -1 +1 @@
-SHA512 (gdb-14.2.tar.xz) = 7e07941f1fe661288cc571b4964012ceabc1760624fce20320db2f470c01439b2386f859b5288da13204b758e2e3b22a74c68c012178db93b9529b06f1e22ede
+SHA512 (gdb-15.1.tar.xz) = 0217434073023a8b8316088bf3ee95d53a1b6a7897f6269095429016a8900f9a05e130c390d8d5d5550cc515c16519de1071d8eef96aa58e38056c7e37da1d8b
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