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* [rpms/rocblas] epel10: Update preview to 7.13
@ 2026-06-11 14:33 Tom Rix
  0 siblings, 0 replies; only message in thread
From: Tom Rix @ 2026-06-11 14:33 UTC (permalink / raw)
  To: git-commits

            A new commit has been pushed.

            Repo   : rpms/rocblas
            Branch : epel10
            Commit : d903e3f1416152c28c2349b8c6565f439ca3b844
            Author : Tom Rix <Tom.Rix@amd.com>
            Date   : 2026-05-20T06:41:48-07:00
            Stats  : +73/-67 in 7 file(s)
            URL    : https://src.fedoraproject.org/rpms/rocblas/c/d903e3f1416152c28c2349b8c6565f439ca3b844?branch=epel10

            Log:
            Update preview to 7.13

Signed-off-by: Tom Rix <Tom.Rix@amd.com>

---
diff --git a/0001-improve-the-warning-for-asm-caps-mismatches.patch b/0001-improve-the-warning-for-asm-caps-mismatches.patch
index 84d6312..7e1cf2d 100644
--- a/0001-improve-the-warning-for-asm-caps-mismatches.patch
+++ b/0001-improve-the-warning-for-asm-caps-mismatches.patch
@@ -1,4 +1,4 @@
-From 91d36d8801293fcaf5b0d8c99fad24e9323e73ca Mon Sep 17 00:00:00 2001
+From 393571163851ee7dd5508007dbd887cde2141c5c Mon Sep 17 00:00:00 2001
 From: Tom Rix <Tom.Rix@amd.com>
 Date: Sun, 8 Mar 2026 10:48:50 -0700
 Subject: [PATCH 1/6] improve the warning for asm caps mismatches
@@ -12,10 +12,10 @@ Signed-off-by: Tom Rix <Tom.Rix@amd.com>
  1 file changed, 9 insertions(+)
 
 diff --git a/shared/tensile/Tensile/Common.py b/shared/tensile/Tensile/Common.py
-index 8d9cf2771b11..f335bcc34583 100644
+index 55954296e907..a4db814f542f 100644
 --- a/shared/tensile/Tensile/Common.py
 +++ b/shared/tensile/Tensile/Common.py
-@@ -2010,6 +2010,14 @@ def locateExe( defaultPath, exeName ): # /opt/rocm/bin, hip-clang
+@@ -2011,6 +2011,14 @@ def locateExe( defaultPath, exeName ): # /opt/rocm/bin, hip-clang
        return exePath
    return None
  
@@ -30,7 +30,7 @@ index 8d9cf2771b11..f335bcc34583 100644
  def GetAsmCaps(isaVersion: IsaVersion, hipVersion: SemanticVersion, cachedAsmCaps: Dict[IsaVersion, dict]) -> Dict[IsaVersion, dict]:
    """ Determine assembler capabilities by testing short instructions sequences """
    if globalParameters["AssemblerPath"] is not None:
-@@ -2132,6 +2140,7 @@ def GetAsmCaps(isaVersion: IsaVersion, hipVersion: SemanticVersion, cachedAsmCap
+@@ -2133,6 +2141,7 @@ def GetAsmCaps(isaVersion: IsaVersion, hipVersion: SemanticVersion, cachedAsmCap
          exitFlag = True
        if exitFlag:
          printWarning("Cached asm caps differ from derived asm caps for {}".format(isaVersion))

diff --git a/0002-add-generic-gpu-targets.patch b/0002-add-generic-gpu-targets.patch
index e6ec749..1c94256 100644
--- a/0002-add-generic-gpu-targets.patch
+++ b/0002-add-generic-gpu-targets.patch
@@ -1,4 +1,4 @@
-From 1facb97e3b5ad1570562aff89a0e279155db6c18 Mon Sep 17 00:00:00 2001
+From a8a0e23fbaf6aacb42f7b505feb1ab8f06adbbea Mon Sep 17 00:00:00 2001
 From: Tom Rix <Tom.Rix@amd.com>
 Date: Sun, 8 Mar 2026 01:32:28 +0000
 Subject: [PATCH 2/6] add generic gpu targets
@@ -30,7 +30,7 @@ Signed-off-by: Tom Rix <Tom.Rix@amd.com>
  5 files changed, 375 insertions(+), 17 deletions(-)
 
 diff --git a/shared/tensile/Tensile/AsmCaps.py b/shared/tensile/Tensile/AsmCaps.py
-index 48eeec1f9a6c..58776e249b78 100644
+index 4bed5cd9f4ff..ed71b8dee02d 100644
 --- a/shared/tensile/Tensile/AsmCaps.py
 +++ b/shared/tensile/Tensile/AsmCaps.py
 @@ -169,6 +169,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
@@ -84,7 +84,7 @@ index 48eeec1f9a6c..58776e249b78 100644
       (9, 0, 6): {'HasAddLshl': True,
                   'HasAtomicAdd': False,
                   'HasDirectToLdsDest': False,
-@@ -345,6 +389,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
+@@ -389,6 +433,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
                   'v_mov_b64': True,
                   'v_pk_fma_f16': True,
                   'v_pk_fmac_f16': False},
@@ -135,7 +135,7 @@ index 48eeec1f9a6c..58776e249b78 100644
       (9, 5, 0): {'HasAddLshl': True,
                   'HasAtomicAdd': True,
                   'HasDirectToLdsDest': False,
-@@ -433,6 +521,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
+@@ -477,6 +565,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
                    'v_mov_b64': False,
                    'v_pk_fma_f16': True,
                    'v_pk_fmac_f16': False},
@@ -186,7 +186,7 @@ index 48eeec1f9a6c..58776e249b78 100644
       (10, 1, 1): {'HasAddLshl': True,
                    'HasAtomicAdd': False,
                    'HasDirectToLdsDest': False,
-@@ -565,6 +697,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
+@@ -609,6 +741,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
                    'v_mov_b64': False,
                    'v_pk_fma_f16': True,
                    'v_pk_fmac_f16': False},
@@ -237,7 +237,7 @@ index 48eeec1f9a6c..58776e249b78 100644
       (10, 3, 1): {'HasAddLshl': True,
                    'HasAtomicAdd': False,
                    'HasDirectToLdsDest': False,
-@@ -873,6 +1049,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
+@@ -917,6 +1093,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
                    'v_mov_b64': False,
                    'v_pk_fma_f16': True,
                    'v_pk_fmac_f16': False},
@@ -288,7 +288,7 @@ index 48eeec1f9a6c..58776e249b78 100644
       (11, 0, 1): {'HasAddLshl': True,
                    'HasAtomicAdd': True,
                    'HasDirectToLdsDest': False,
-@@ -1225,6 +1445,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
+@@ -1269,6 +1489,50 @@ def getCapabilitiesCache(rocmVersion: NamedTuple) -> dict:
                    'v_mov_b64': False,
                    'v_pk_fma_f16': True,
                    'v_pk_fmac_f16': False},
@@ -340,29 +340,29 @@ index 48eeec1f9a6c..58776e249b78 100644
                    'HasAtomicAdd': False,
                    'HasDirectToLdsDest': False,
 diff --git a/shared/tensile/Tensile/Common.py b/shared/tensile/Tensile/Common.py
-index f335bcc34583..89bf6f4aa20f 100644
+index a4db814f542f..ef13633f4571 100644
 --- a/shared/tensile/Tensile/Common.py
 +++ b/shared/tensile/Tensile/Common.py
 @@ -246,12 +246,12 @@ globalParameters["NumMergedFiles"] = 1            # The number of files that ker
  
  globalParameters["MaxFileName"] = 64              # If a file name would be longer than this, shorten it with a hash.
  globalParameters["SupportedISA"] = [(8,0,3),
--                                    (9,0,0), (9,0,6), (9,0,8), (9,0,10),
+-                                    (9,0,0), (9,0,6), (9,0,8), (9,0,10), (9,0,12),
 -                                    (9,4,2), (9,5,0),
 -                                    (10,1,0), (10,1,1), (10,1,2), (10,3,0), (10,3,1), (10,3,2), (10,3,3), (10,3,4), (10,3,5), (10,3,6),
 -                                    (11,0,0), (11,0,1), (11,0,2), (11,0,3),
-+                                    (9,0,0), (9,0,6), (9,0,8), (9,0,10), (9,0,-1),
++                                    (9,0,0), (9,0,6), (9,0,8), (9,0,10), (9,0,12), (9,0,-1),
 +                                    (9,4,2), (9,4,-1), (9,5,0),
 +                                    (10,1,0), (10,1,1), (10,1,2), (10,1,-1), (10,3,0), (10,3,1), (10,3,2), (10,3,3), (10,3,4), (10,3,5), (10,3,6), (10,3,-1),
 +                                    (11,0,0), (11,0,1), (11,0,2), (11,0,3), (11,0,-1),
                                      (11,5,0), (11,5,1), (11,5,2), (11,5,3),
--                                    (12,0,0), (12,0,1)] # assembly kernels writer supports these architectures
-+                                    (12,0,0), (12,0,1), (12,0,-1)] # assembly kernels writer supports these architectures
+-                                    (12,0,0), (12,0,1), (12,5,0)] # assembly kernels writer supports these architectures
++                                    (12,0,0), (12,0,1), (12,5,0), (12,0,-1)] # assembly kernels writer supports these architectures
  
  globalParameters["KeepBuildTmp"] = True                           # Do not remove build artifacts during the build process or build_tmp after build completes
  globalParameters["GenerateManifestAndExit"] = False               # Output manifest file with list of expected library objects and exit
 @@ -320,15 +320,15 @@ architectureMap = {
-   'gfx803':'r9nano', 'gfx900':'vega10', 'gfx900:xnack-':'vega10',
+   'gfx803':'r9nano', 'gfx900':'vega10', 'gfx900:xnack-':'vega10', 'gfx90c':'vega10',
    'gfx906':'vega20', 'gfx906:xnack+':'vega20', 'gfx906:xnack-':'vega20',
    'gfx908':'arcturus','gfx908:xnack+':'arcturus', 'gfx908:xnack-':'arcturus',
 -  'gfx90a':'aldebaran', 'gfx90a:xnack+':'aldebaran', 'gfx90a:xnack-':'aldebaran',
@@ -378,12 +378,12 @@ index f335bcc34583..89bf6f4aa20f 100644
 +  'gfx1100':'navi31', 'gfx1101':'navi32', 'gfx1102':'navi33', 'gfx1103':'gfx1103', 'gfx11-generic':'gfx11-generic',
    'gfx1150':'strixpoint', 'gfx1151':'strixhalo', 'gfx1152':'gfx1152', 'gfx1153':'gfx1153',
    'gfx1200':'gfx1200',
--  'gfx1201':'gfx1201'
+-  'gfx1201':'gfx1201',
 +  'gfx1201':'gfx1201', 'gfx12-generic':'gfx12-generic',
+   'gfx1250':'gfx1250'
  }
  
- def getArchitectureName(gfxName: str) -> Optional[str]:
-@@ -2201,6 +2201,21 @@ def tryAssembler(isaVersion, asmString, debug=False, *options):
+@@ -2202,6 +2202,21 @@ def tryAssembler(isaVersion, asmString, debug=False, *options):
  
  def gfxArch(name: str) -> Optional[IsaVersion]:
      import re
@@ -405,7 +405,7 @@ index f335bcc34583..89bf6f4aa20f 100644
      match = re.search(r'gfx([0-9a-fA-F]{3,})', name)
      if not match: return None
  
-@@ -2219,11 +2234,23 @@ def gfxArch(name: str) -> Optional[IsaVersion]:
+@@ -2220,11 +2235,23 @@ def gfxArch(name: str) -> Optional[IsaVersion]:
      return rv
  
  def gfxName(arch):
@@ -432,7 +432,7 @@ index f335bcc34583..89bf6f4aa20f 100644
  def detectIsaWindows(output):
      i = 0
      for line in output:
-@@ -2475,7 +2502,7 @@ def assignGlobalParameters( config, capabilitiesCache: Optional[dict] = None ):
+@@ -2476,7 +2503,7 @@ def assignGlobalParameters( config, capabilitiesCache: Optional[dict] = None ):
      if os.name == "nt":
        globalParameters["CurrentISA"] = (9,0,6)
        printWarning("Failed to detect ISA so forcing (gfx906) on windows")
@@ -442,10 +442,10 @@ index f335bcc34583..89bf6f4aa20f 100644
      isaString = ', '.join(map(gfxName, isasWithDisabledHWMonitor))
      printWarning(f"HardwareMonitor currently disabled for {isaString}")
 diff --git a/shared/tensile/Tensile/Source/cmake/TensileSupportedArchitectures.cmake b/shared/tensile/Tensile/Source/cmake/TensileSupportedArchitectures.cmake
-index a1fb7166cf63..5f3e2d54a003 100644
+index 56e3057d8511..2139617551c4 100644
 --- a/shared/tensile/Tensile/Source/cmake/TensileSupportedArchitectures.cmake
 +++ b/shared/tensile/Tensile/Source/cmake/TensileSupportedArchitectures.cmake
-@@ -35,11 +35,14 @@ if(NOT BUILD_ADDRESS_SANITIZER)
+@@ -36,11 +36,14 @@ if(NOT BUILD_ADDRESS_SANITIZER)
          "gfx906"
          "gfx908"
          "gfx90a"
@@ -460,7 +460,7 @@ index a1fb7166cf63..5f3e2d54a003 100644
          "gfx1030"
          "gfx1031"
          "gfx1032"
-@@ -47,6 +50,7 @@ if(NOT BUILD_ADDRESS_SANITIZER)
+@@ -48,6 +51,7 @@ if(NOT BUILD_ADDRESS_SANITIZER)
          "gfx1034"
          "gfx1035"
          "gfx1036"
@@ -468,30 +468,31 @@ index a1fb7166cf63..5f3e2d54a003 100644
          "gfx1100"
          "gfx1101"
          "gfx1102"
-@@ -55,8 +59,11 @@ if(NOT BUILD_ADDRESS_SANITIZER)
+@@ -56,9 +60,12 @@ if(NOT BUILD_ADDRESS_SANITIZER)
          "gfx1151"
          "gfx1152"
          "gfx1153"
 +        "gfx11-generic"
          "gfx1200"
--        "gfx1201")
-+        "gfx1201"
-+	"gfx12-generic"
+         "gfx1201"
+-        "gfx1250")
++        "gfx1250"
++        "gfx12-generic"
 +      )
  
      set(SUPPORTED_ARCHITECTURES ${BASE_ARCHITECTURES})
      list(APPEND SUPPORTED_ARCHITECTURES
 diff --git a/shared/tensile/Tensile/Source/lib/include/Tensile/AMDGPU.hpp b/shared/tensile/Tensile/Source/lib/include/Tensile/AMDGPU.hpp
-index 1d22bfe712da..be9d5a78c077 100644
+index f2bf41b507a3..4b71db91f814 100644
 --- a/shared/tensile/Tensile/Source/lib/include/Tensile/AMDGPU.hpp
 +++ b/shared/tensile/Tensile/Source/lib/include/Tensile/AMDGPU.hpp
-@@ -81,7 +81,13 @@ namespace Tensile
-             gfx1152 = 1152,
+@@ -83,7 +83,13 @@ namespace Tensile
              gfx1153 = 1153,
              gfx1200 = 1200,
--            gfx1201 = 1201
-+            gfx1201 = 1201,
-+	    gfx9_generic = -900,
+             gfx1201 = 1201,
+-            gfx1250 = 1250
++            gfx1250 = 1250,
++            gfx9_generic = -900,
 +	    gfx9_4_generic = -940,
 +	    gfx10_1_generic = -1010,
 +	    gfx10_3_generic = -1030,
@@ -500,11 +501,11 @@ index 1d22bfe712da..be9d5a78c077 100644
          };
  
          static std::string toString(Processor p)
-@@ -142,6 +148,18 @@ namespace Tensile
-                 return "gfx1200";
-             case AMDGPU::Processor::gfx1201:
+@@ -148,6 +154,18 @@ namespace Tensile
                  return "gfx1201";
-+	    case AMDGPU::Processor::gfx9_generic:
+             case AMDGPU::Processor::gfx1250:
+                 return "gfx1250";
++            case AMDGPU::Processor::gfx9_generic:
 +                return "gfx9-generic";
 +	    case AMDGPU::Processor::gfx9_4_generic:
 +                return "gfx9-4-generic";
@@ -519,11 +520,11 @@ index 1d22bfe712da..be9d5a78c077 100644
              }
              return "";
          }
-@@ -256,6 +274,30 @@ namespace Tensile
+@@ -270,6 +288,30 @@ namespace Tensile
              {
-                 return AMDGPU::Processor::gfx1201;
+                 return AMDGPU::Processor::gfx1250;
              }
-+	    else if(deviceString.find("gfx9-generic") != std::string::npos)
++            else if(deviceString.find("gfx9-generic") != std::string::npos)
 +            {
 +                return AMDGPU::Processor::gfx9_generic;
 +            }
@@ -551,14 +552,14 @@ index 1d22bfe712da..be9d5a78c077 100644
              {
                  return static_cast<AMDGPU::Processor>(0);
 diff --git a/shared/tensile/Tensile/Source/lib/include/Tensile/PlaceholderLibrary.hpp b/shared/tensile/Tensile/Source/lib/include/Tensile/PlaceholderLibrary.hpp
-index c164bde1c13f..dcf4af10bda4 100644
+index 9e21d4ac0805..421b21c5f7dd 100644
 --- a/shared/tensile/Tensile/Source/lib/include/Tensile/PlaceholderLibrary.hpp
 +++ b/shared/tensile/Tensile/Source/lib/include/Tensile/PlaceholderLibrary.hpp
-@@ -66,6 +66,12 @@ namespace Tensile
-         gfx1153,
+@@ -68,6 +68,12 @@ namespace Tensile
          gfx1200,
          gfx1201,
-+	gfx9_generic,
+         gfx1250,
++        gfx9_generic,
 +	gfx9_4_generic,
 +	gfx10_1_generic,
 +	gfx10_3_generic,
@@ -567,11 +568,11 @@ index c164bde1c13f..dcf4af10bda4 100644
          All
      };
  
-@@ -130,6 +136,18 @@ namespace Tensile
-             return "TensileLibrary_*_gfx1200";
-         case LazyLoadingInit::gfx1201:
+@@ -136,6 +142,18 @@ namespace Tensile
              return "TensileLibrary_*_gfx1201";
-+	case LazyLoadingInit::gfx9_generic:
+         case LazyLoadingInit::gfx1250:
+             return "TensileLibrary_*_gfx1250";
++        case LazyLoadingInit::gfx9_generic:
 +            return "TensileLibrary_*_gfx9-generic";
 +	case LazyLoadingInit::gfx9_4_generic:
 +            return "TensileLibrary_*_gfx9-4-generic";

diff --git a/0003-improve-fallback-name-to-handle-generics.patch b/0003-improve-fallback-name-to-handle-generics.patch
index 46b6544..792eae9 100644
--- a/0003-improve-fallback-name-to-handle-generics.patch
+++ b/0003-improve-fallback-name-to-handle-generics.patch
@@ -1,4 +1,4 @@
-From 9a54945335d17213700a4b08f3e3b1cff8d42906 Mon Sep 17 00:00:00 2001
+From fc89fe29ed8f4ea26aa6041d6655c1c9b46715dd Mon Sep 17 00:00:00 2001
 From: Tom Rix <Tom.Rix@amd.com>
 Date: Sun, 8 Mar 2026 13:38:28 -0700
 Subject: [PATCH 3/6] improve fallback name to handle generics
@@ -14,10 +14,10 @@ Signed-off-by: Tom Rix <Tom.Rix@amd.com>
  1 file changed, 2 insertions(+), 1 deletion(-)
 
 diff --git a/shared/tensile/Tensile/TensileCreateLibrary.py b/shared/tensile/Tensile/TensileCreateLibrary.py
-index 543b0379c41e..eb7147a4fd8a 100644
+index cfb04a938d2c..af55b172422a 100644
 --- a/shared/tensile/Tensile/TensileCreateLibrary.py
 +++ b/shared/tensile/Tensile/TensileCreateLibrary.py
-@@ -962,7 +962,8 @@ def addFallback(masterLibraries: Dict[str, MasterSolutionLibrary]) -> None:
+@@ -1001,7 +1001,8 @@ def addFallback(masterLibraries: Dict[str, MasterSolutionLibrary]) -> None:
              value.insert(masterLibraries["fallback"])
  
      for archName in archs:

diff --git a/0004-generic-arches-need-a-solution-index.patch b/0004-generic-arches-need-a-solution-index.patch
index 3853b01..1a7046b 100644
--- a/0004-generic-arches-need-a-solution-index.patch
+++ b/0004-generic-arches-need-a-solution-index.patch
@@ -1,4 +1,4 @@
-From 5e411dc64dde73141fd1958c58ec2876ca064b4f Mon Sep 17 00:00:00 2001
+From 83e07d10fff2097878bfbae3e956c2f5177aa4ed Mon Sep 17 00:00:00 2001
 From: Tom Rix <Tom.Rix@amd.com>
 Date: Sun, 8 Mar 2026 16:21:07 -0700
 Subject: [PATCH 4/6] generic arches need a solution index

diff --git a/0005-rocblas-add-rocblas_internal_get_generic_arch_name.patch b/0005-rocblas-add-rocblas_internal_get_generic_arch_name.patch
index d8f9f85..ec3518c 100644
--- a/0005-rocblas-add-rocblas_internal_get_generic_arch_name.patch
+++ b/0005-rocblas-add-rocblas_internal_get_generic_arch_name.patch
@@ -1,4 +1,4 @@
-From 9e5a358d9251d4770edd74be248b4d3ded705018 Mon Sep 17 00:00:00 2001
+From d9c3f1d52a6a35d69bb0dc9a69dd67521156b032 Mon Sep 17 00:00:00 2001
 From: Tom Rix <Tom.Rix@amd.com>
 Date: Sun, 29 Mar 2026 10:48:52 -0700
 Subject: [PATCH 5/6] rocblas add rocblas_internal_get_generic_arch_name
@@ -9,7 +9,7 @@ Subject: [PATCH 5/6] rocblas add rocblas_internal_get_generic_arch_name
  2 files changed, 64 insertions(+)
 
 diff --git a/projects/rocblas/library/src/include/utility.hpp b/projects/rocblas/library/src/include/utility.hpp
-index 092df38d8930..73aeb9e908e4 100644
+index 3ec82e012822..a9f7371b07c2 100644
 --- a/projects/rocblas/library/src/include/utility.hpp
 +++ b/projects/rocblas/library/src/include/utility.hpp
 @@ -806,6 +806,15 @@ std::string rocblas_internal_get_arch_name(int device);

diff --git a/0006-rocblas-generalize-finding-tensile-for-generics.patch b/0006-rocblas-generalize-finding-tensile-for-generics.patch
index b7fd693..265ae85 100644
--- a/0006-rocblas-generalize-finding-tensile-for-generics.patch
+++ b/0006-rocblas-generalize-finding-tensile-for-generics.patch
@@ -1,17 +1,17 @@
-From 451b914cba95faacd1d37e179b4869b16ad53c16 Mon Sep 17 00:00:00 2001
+From 9839138308b7bb8972c1e57b63614fe3fd164908 Mon Sep 17 00:00:00 2001
 From: Tom Rix <Tom.Rix@amd.com>
 Date: Sun, 29 Mar 2026 11:03:43 -0700
 Subject: [PATCH 6/6] rocblas generalize finding tensile for generics
 
 ---
- projects/rocblas/library/src/tensile_host.cpp | 78 +++++++++++--------
- 1 file changed, 45 insertions(+), 33 deletions(-)
+ projects/rocblas/library/src/tensile_host.cpp | 76 +++++++++++--------
+ 1 file changed, 44 insertions(+), 32 deletions(-)
 
 diff --git a/projects/rocblas/library/src/tensile_host.cpp b/projects/rocblas/library/src/tensile_host.cpp
-index 45a7dab90ae6..f72e717c0581 100644
+index d36f686cfeff..d2e8c1bf5708 100644
 --- a/projects/rocblas/library/src/tensile_host.cpp
 +++ b/projects/rocblas/library/src/tensile_host.cpp
-@@ -792,63 +792,75 @@ namespace
+@@ -813,12 +813,21 @@ namespace
  #endif
  
              // The name of the current GPU platform
@@ -22,11 +22,9 @@ index 45a7dab90ae6..f72e717c0581 100644
 +	    std::string processor;
  
              static std::string base_path;
-             static int         determined_path = determine_tensile_base_path(base_path);
+             static int         determined_path{determine_tensile_base_path(base_path)};
  
 -            path = base_path;
--            if(TestPath(path + "/" + processor))
--                path += "/" + processor;
 +            // Loop over processors to find a valid Tensile library
 +            // Only call rocblas_abort on the final processor
 +            for(int i = 0; i < 2; ++i)
@@ -34,7 +32,14 @@ index 45a7dab90ae6..f72e717c0581 100644
 +	        processor = processors[i];
 +
 +		path = base_path;
-+		if(TestPath(path + "/" + processor))
+             // Probe subdirectories from most-specific to least-specific so that shard
+             // overlays compose correctly regardless of how TheRock splits arch builds:
+             //   1. library/<arch>-<xnack>/  – split single-xnack-variant shard
+@@ -836,56 +845,59 @@ namespace
+                 }
+             }
+             if(!found_subdir && TestPath(path + "/" + processor))
+-                path += "/" + processor;
 +		  path += "/" + processor;
  
  #ifdef TENSILE_YAML

diff --git a/rocblas.spec b/rocblas.spec
index 4502954..167e777 100644
--- a/rocblas.spec
+++ b/rocblas.spec
@@ -26,7 +26,7 @@
 
 %bcond_with preview
 %if %{with preview}
-%global rocm_release 7.12
+%global rocm_release 7.13
 %global rocm_patch 0
 %global pkg_src therock-%{rocm_release}
 %else
@@ -275,7 +275,7 @@ BuildRequires:  pkgconfig(libzstd)
 
 %if %{with test}
 %if %{with preview}
-BuildRequires:  amdsmi%{pkg_suffix}-static
+BuildRequires:  amdsmi%{pkg_suffix}-devel
 %endif
 BuildRequires:  libomp-devel
 BuildRequires:  rocminfo%{pkg_suffix}

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2026-06-11 14:33 [rpms/rocblas] epel10: Update preview to 7.13 Tom Rix

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